National Instruments Network Card NI PCI 1426 User Manual

NI Vision  
NI PCI-1426 User Manual  
Base Configuration Camera Link Image Acquisition Device  
NI PCI-1426 User Manual  
February 2007  
374040C-01  
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Regulations  
Determining FCC Class  
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Conventions  
The following conventions are used in this manual:  
<>  
Angle brackets that contain numbers separated by an ellipsis represent a  
range of values associated with a bit or signal name—for example,  
AO <3..0>.  
This icon denotes a note, which alerts you to important information.  
bold  
Bold text denotes items that you must select or click in the software, such  
as menu items and dialog box options. Bold text also denotes parameter  
names.  
italic  
Italic text denotes variables, emphasis, a cross-reference, or an introduction  
to a key concept. Italic text also denotes text that is a placeholder for a word  
or value that you must supply.  
monospace  
Text in this font denotes text or characters that you should enter from the  
keyboard, sections of code, programming examples, and syntax examples.  
This font is also used for the proper names of disk drives, paths, directories,  
programs, subprograms, subroutines, device names, functions, operations,  
variables, filenames, and extensions.  
NI 1426  
NI 1426 refers to the NI PCI-1426 image acquisition device.  
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Chapter 1  
National Instruments Application Software....................................................1-2  
Vision Builder for Automated Inspection.........................................1-3  
Integration with DAQ and Motion ..................................................................1-4  
Chapter 2  
High-Speed Timing .........................................................................................2-7  
Acquisition and Region of Interest (ROI) .......................................................2-7  
Bus Master PCI Interface ................................................................................2-8  
Chapter 3  
Signal Connections  
Connectors .....................................................................................................................3-2  
MDR 26-Pin Connector...................................................................................3-2  
15-pin D-SUB Connector................................................................................3-3  
Connector Signal Connection Descriptions.....................................................3-4  
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Contents  
Appendix A  
Cabling  
Technical Support and Professional Services  
Glossary  
Index  
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1
Introduction  
The NI 1426 is an interface device that supports a diverse range of Camera  
Link-compatible cameras. The NI 1426 acquires digital images in real time  
and stores the images in onboard frame memory or transfers them directly  
to system memory. Featuring a high-speed data flow path, the NI 1426 is  
ideal for both industrial and scientific environments.  
The NI 1426 is easy to install and configure. It ships with NI-IMAQ, the  
National Instruments complete Vision driver software you can use to  
directly control the NI 1426 and other National Instruments Vision  
applications without having to program the device at the register level.  
The NI 1426 supports the Camera Link Base configuration. The  
MDR 26-pin connector provides access to base configuration cameras. For  
further configuration information, refer to the Camera Link and the  
NI 1426 section of Chapter 2, Hardware Overview.  
The 15-pin D-SUB connector has four external TTL input/output (I/O)  
lines you can use as triggers or as high-speed digital I/O lines. Should you  
choose not to use the TTL I/O lines, the 15-pin D-SUB connector also  
provides access to two optically isolated inputs and two RS-422 inputs.  
These inputs can be individually selected in software.  
For more advanced digital or analog system triggering or digital I/O lines,  
you can use the NI 1426 and NI-IMAQ with the National Instruments data  
acquisition (DAQ) or motion control product lines.  
Synchronizing several functions to a common trigger or timing event can  
be a challenge with image acquisition devices. The NI 1426 uses the  
Real-Time System Integration (RTSI) bus to solve this problem.  
The RTSI bus uses the National Instruments RTSI bus interface and ribbon  
cable to route additional timing and trigger signals between the NI 1426  
and up to four National Instruments DAQ, Motion Control, or image  
acquisition devices.  
For detailed specifications of the NI 1426, refer to the Specifications  
section of Getting Started with the NI PCI-1426.  
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Chapter 1  
Introduction  
Software Overview  
Programming the NI 1426 requires the NI-IMAQ driver software for  
controlling the hardware. National Instruments also offers the following  
application software packages for analyzing and processing your acquired  
images.  
Vision Builder for Automated Inspection—Allows you to configure  
solutions to common inspection tasks.  
Vision Development Module—Provides customized control over  
hardware and algorithms.  
NI-IMAQ Driver Software  
The NI-IMAQ driver software ships with the NI 1426. NI-IMAQ has an  
extensive library of functions—such as routines for video configuration,  
continuous and single shot image acquisition, memory buffer allocation,  
trigger control, and device configuration—you can call from the  
application development environment (ADE). NI-IMAQ handles many of  
the complex issues between the computer and the image acquisition device,  
such as programming interrupts and camera control.  
NI-IMAQ performs all functions required for acquiring and saving images  
but does not perform image analysis. Refer to the National Instruments  
Application Software section for image analysis functionality.  
NI-IMAQ is also the interface between the NI 1426 and LabVIEW,  
LabWindows/CVI, or a text-based programming environment. The  
NI-IMAQ software kit includes a series of libraries for image acquisition  
for LabVIEW, LabWindows/CVI, and Measurement Studio, which  
contains libraries for Microsoft Visual Basic.  
NI-IMAQ features both high-level and low-level functions. Examples  
of high-level functions include the sequences to acquire images in  
multi-buffer, single-shot, or continuous mode. An example of a low-level  
function is configuring an image sequence, since it requires advanced  
understanding of the Vision device and image acquisition.  
National Instruments Application Software  
This section describes the National Instruments application software  
packages you can use to analyze and process the images you acquire with  
the NI 1426.  
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Chapter 1  
Introduction  
Vision Builder for Automated Inspection  
NI Vision Builder for Automated Inspection (AI) is configurable machine  
vision software that you can use to prototype, benchmark, and deploy  
applications. Vision Builder AI does not require programming, but is  
scalable to powerful programming environments.  
Vision Builder AI allows you to easily configure and benchmark a  
sequence of visual inspection steps, as well as deploy the visual inspection  
system for automated inspection. With Vision Builder AI, you can perform  
powerful visual inspection tasks and make decisions based on the results  
of individual tasks. You also can migrate the configured inspection to  
LabVIEW, extending the capabilities of the applications if necessary.  
Vision Development Module  
NI Vision Development Module, which consists of NI Vision and  
NI Vision Assistant, is an image acquisition, processing, and analysis  
library of more than 270 functions for the following common machine  
vision tasks:  
Pattern matching  
Particle analysis  
Gauging  
Taking measurements  
Grayscale, color, and binary image display  
You can use the Vision Development Module functions individually or  
in combination. With the Vision Development Module, you can acquire,  
display, and store images, as well as perform image analysis and  
processing. Using the Vision Development Module, imaging novices and  
experts can program the most basic or complicated image applications  
without knowledge of particular algorithm implementations.  
As a part of the Vision Development Module, NI Vision Assistant is an  
interactive prototyping tool for machine vision and scientific imaging  
developers. With Vision Assistant, you can prototype vision applications  
quickly and test how various image processing functions work.  
Vision Assistant generates a Builder file, which is a text description  
containing a recipe of the machine vision and image processing functions.  
This Builder file provides a guide you can use for developing applications  
in any ADE, such as LabWindows/CVI or Visual Basic, using the Vision  
Assistant machine vision and image processing libraries. Using the  
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Chapter 1  
Introduction  
LabVIEW VI creation wizard, Vision Assistant can create LabVIEW VI  
diagrams that perform the prototype you created in Vision Assistant.  
You can then use LabVIEW to add functionality to the generated VI.  
Integration with DAQ and Motion  
Platforms that support NI-IMAQ also support NI-DAQ and a variety of  
National Instruments DAQ devices. This allows integration between image  
acquisition devices and National Instruments DAQ devices.  
Use National Instruments high-performance stepper and servo motion  
control products with pattern matching software in inspection and guidance  
applications, such as locating alignment markers on semiconductor wafers,  
guiding robotic arms, inspecting the quality of manufactured parts, and  
locating cells.  
Camera Link  
This section provides a brief overview of the Camera Link standard. Refer  
to the Specifications of the Camera Link Interface Standard for Digital  
Cameras and Frame Grabbers manual for more detailed information about  
Camera Link specifications. This manual is available on several Web sites,  
including the Automated Imaging Association site at  
Overview  
Developed by a consortium of camera and image acquisition device  
manufacturers, Camera Link is a standard for interfacing digital cameras  
with image acquisition devices. Camera Link simplifies connectivity  
between the image acquisition device and the camera by defining a single  
standard connector for both. This standard ensures physical compatibility  
of devices bearing the Camera Link logo.  
The basis for the Camera Link standard is the National Semiconductor  
Channel Link chipset, a data transmission method consisting of a  
general-purpose transmitter/receiver pair. The Channel Link driver takes  
28 bits of parallel digital data and a clock and serializes the stream to  
four LVDS (EIA-644) data streams and an LVDS clock, providing  
high-speed data transmission across 10 wires and over distances of up  
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2
Hardware Overview  
This chapter provides an overview of NI 1426 hardware functionality and  
explains the operations of the NI 1426 functional units.  
Functional Overview  
The NI 1426 features a flexible, high-speed data path optimized for  
receiving and formatting video data from Camera Link cameras.  
Figure 2-1 illustrates the key functional components of the NI 1426.  
Synchronous Dynamic RAM  
Data  
Data  
SDRAM  
Data  
Interface  
Enables  
Channel  
Link  
PCI Interface  
Pixel Clock and Camera Enables  
and  
Scatter-Gather  
Receiver  
Pixel  
Clock  
DMA Controllers  
Camera  
Control  
Advanced  
Timing  
Acquisition,  
ROI, and Triggering  
Serial  
Differential  
Converter  
Control  
UART  
External Triggers  
RTSI Bus  
Figure 2-1. NI 1426 Block Diagram  
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Chapter 2  
Hardware Overview  
Camera Link and the NI 1426  
The NI 1426 supports the Camera Link Base configuration.  
Base Configuration  
The Camera Link Base configuration places 24 data bits and four enable  
signals (Frame Valid, Line Valid, Data Valid, and a spare) on a single  
Channel Link part and cable.  
The Base configuration includes asynchronous serial transmission as well  
as four digital camera control lines for controlling exposure time, frame  
rates, and other camera control signals. These four control lines are  
configured in the camera file to generate precise timing signals for  
controlling digital camera acquisition.  
Base configuration includes the following bit allocations:  
8-bit × 1, 2, and 3 taps (channels)  
10-bit × 1 and 2 taps  
12-bit × 1 and 2 taps  
14-bit × 1 tap  
16-bit × 1 tap  
24-bit RGB  
Data Transmission  
A 28-to-4 serializing Channel Link chip drives the data and camera enable  
signals across the Camera Link cable, and the camera’s pixel clock controls  
the Channel Link’s data transmission. The four LVDS pairs are then  
deserialized by another Channel Link chip on the NI 1426.  
Note Exact timing of camera and image acquisition device communication is camera  
dependent. Refer to the Specifications of the Camera Link Interface Standard for Digital  
Cameras and Frame Grabbers manual for more information about Camera Link timing  
requirements.  
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Chapter 2  
Hardware Overview  
Hardware Binarization  
The NI 1426 supports binarization and inverse binarization. Binarization  
and inverse binarization segment an image into two regions: a particle  
region and a background region. Use binarization and inverse binarization  
to isolate objects of interest in an image.  
To separate objects under consideration from the background, select a pixel  
value range. This pixel value range is known as the gray-level interval, or  
the threshold interval. Binarization works by setting all image pixels that  
fall within the threshold interval to the image white value and setting all  
other image pixels to 0. Pixels inside the threshold interval are considered  
part of the particle region. Pixels outside the threshold interval are  
considered part of the background region.  
Inverse binarization flips the assigned bit numbers of the particle region and  
the background region. Thus, all pixels that belong in the threshold interval,  
or the particle region, are set to 0, while all pixels outside the threshold  
interval, or the background region, are set to the image white value.  
Figure 2-2 illustrates binarization and inverse binarization.  
NORMAL  
INVERSE  
Sampled Data  
Sampled Data  
Figure 2-2. Binarization and Inverse Binarization  
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Chapter 2  
Hardware Overview  
Multiple-Tap Data Formatter  
Many digital cameras transfer multiple taps, or channels, of data  
simultaneously to increase the frame rate of the camera. However, the data  
in each tap may not be transferred in the traditional top-left to bottom-right  
direction. Also, the taps may not transfer data in the same direction.  
The multiple-tap data formatting circuitry on the NI 1426 can reorder the  
data from up to three taps. The data from each tap can be independently  
scanned either from left-to-right or right-to-left and top-to-bottom or  
bottom-to-top.  
Note For your convenience, data reformatting instructions for these cameras have been  
preprogrammed into the camera files.  
SDRAM  
Depending on the memory option purchased, the NI 1426 has 16 MB or  
32 MB of onboard high-speed synchronous dynamic RAM (SDRAM). The  
NI 1426 uses the onboard RAM as a FIFO buffer to ensure a complete  
acquisition. Even when the data rate from the camera exceeds PCI  
throughput, you can acquire without interruption until the onboard RAM  
is full.  
Trigger Control and Mapping Circuitry  
The trigger control and mapping circuitry routes, monitors, and drives  
the external and RTSI bus trigger lines. You can configure each line to start  
an acquisition on a rising or falling edge and drive each line asserted or  
unasserted, much like a digital I/O line. You also can map pulses from the  
high-speed timing circuitry or many of the NI 1426 status signals to these  
trigger lines. Four RTSI bus triggers and four external triggers (all of  
which are programmable for polarity and direction) are available for  
simultaneous use.  
Individually configure the four external triggers in Measurement and  
Automation Explorer (MAX), the National Instruments Configuration  
utility, as single-ended I/O lines or, alternatively, as isolated or RS-422  
input only lines. You can configure the four external triggers in any  
combination of single-ended I/O or input only lines. Table 2-1 lists the  
configuration options available for each trigger source.  
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Hardware Overview  
Table 2-1. Trigger Configuration Options for the NI 1426  
Single-ended  
Input/Output  
Alternative  
Input Only  
Trigger Number  
0
1
2
3
TTL_TRIG(0)  
TTL_TRIG(1)  
TTL_TRIG(2)  
TTL_TRIG(3)  
ISO_IN(0)  
ISO_IN(1)  
RS422_IN(0)  
RS422_IN(1)  
Note If not configured as single-ended I/O lines, triggers have input only capability.  
Wiring an Isolated Input to Output Devices  
You can wire an isolated input to both sourcing and sinking output devices.  
Refer to Figures 2-3 and 2-4 for wiring examples by output type. Refer to  
Getting Started with the NI PCI-1426 for information about switching  
thresholds and current requirements.  
Caution Do not apply a voltage greater than 30 VDC to the isolated inputs. Voltage greater  
than 30 VDC may damage the NI 1426.  
Note Isolated inputs are compatible with 5 V logic if the external circuit meets the voltage  
and current requirements listed in Getting Started with the NI PCI-1426.  
Sensor  
Power  
PNP (Sourcing)  
Output Device  
Vcc  
IN+  
IN–  
Current  
Limiter  
Sensor  
Common  
NI 1426  
Figure 2-3. Example of Connecting an Isolated Input to a Sourcing Output Device  
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Hardware Overview  
Sensor  
Power  
Vcc  
IN+  
IN–  
Current  
Limiter  
NPN (Sinking)  
Output Device  
NI 1426  
Sensor  
Common  
Figure 2-4. Example of Connecting an Isolated Input to a Sinking Output Device  
Connecting to a Quadrature Encoder  
The NI 1426 accepts differential (RS-422) line driver inputs. Shielded  
encoder cables are recommended for all applications. Unshielded cables  
are more susceptible to noise and can corrupt the encoder signals. Refer to  
Figure 2-5 for an example of connecting differential line drivers.  
Encoder  
NI 1426  
Phase A+  
7
8
+
Phase A  
Phase B  
26LS32  
26LS32  
Twisted  
Pair  
Phase A–  
Phase A–  
Phase B+  
14  
15  
+
Twisted  
Pair  
Phase B–  
Phase B–  
Figure 2-5. Example of Connecting Differential Line Drivers  
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Chapter 2  
Hardware Overview  
High-Speed Timing  
Built from high-speed counters, the high-speed timing circuitry on the  
NI 1426 can generate precise real-time control signals for your camera.  
Map the output of this circuitry to a trigger line to provide accurate pulses  
and pulse trains. Map these control signals to the camera control lines to  
control exposure time and frame rate.  
Note For your convenience, the external control for cameras that support the NI 1426 has  
been preprogrammed into the camera file. You can use MAX to specify the frequency and  
duration of these signals in easy-to-use units.  
The NI 1426 also allows you to route the external trigger inputs 0–3 onto  
the camera control lines 1–4. Use MAX to select the source for the camera  
control lines. You have the option to choose either the default control signal  
that is specified in the camera file or the external trigger input as the source  
for the camera control lines.  
Acquisition and Region of Interest (ROI)  
The acquisition and ROI circuitry monitors incoming video signals and  
routes the active pixels to the multiple-tap data formatter and SDRAM.  
The NI 1426 can perform ROI acquisitions on all video lines and frames.  
In an ROI acquisition, select an area within the acquisition window to  
transfer across the PCI bus to system memory.  
Configure the following parameters on the NI 1426 to control the video  
acquisition window:  
Acquisition window—The NI 1426 allows the user to specify a  
particular region of active pixels and active lines within the incoming  
video data. The active pixel region selects the starting pixel and  
number of pixels to be acquired relative to the assertion edge of the  
horizontal (or line) enable signal from the camera. The active line  
region selects the starting line and number of lines to be acquired  
relative to the assertion edge of the vertical (or frame) enable signal.  
Region of interestThe NI 1426 uses a second level of active pixel  
and active line regions for selecting a region of interest. Using the  
region-of-interest circuitry, the device acquires only a selected subset  
of the acquisition window.  
Note You can use MAX to set the acquisition window on the NI 1426.  
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Chapter 2  
Hardware Overview  
Scatter-Gather DMA Controllers  
The NI 1426 uses three independent onboard direct memory access (DMA)  
controllers. The DMA controllers transfer data between the onboard  
SDRAM memory buffers and the PCI bus. Each of these controllers  
supports scatter-gather DMA, which allows the DMA controller to  
reconfigure on-the-fly. The NI 1426 can perform continuous image  
transfers directly to either contiguous or fragmented memory buffers.  
Bus Master PCI Interface  
The NI 1426 implements the PCI interface with a National Instruments  
custom application-specific integrated circuit (ASIC), the PCI miniMITE.  
The PCI interface can transfer data at a theoretical maximum rate of  
133 MB/s in bus master mode.  
Start Conditions  
The NI 1426 can start acquisitions in the following ways:  
Software control—The NI 1426 supports software control of a start  
acquisition. You can configure the NI 1426 to capture a fixed number  
of frames. This configuration is useful for capturing a single frame or  
a sequence of frames.  
Trigger controlYou can start an acquisition by enabling external  
or RTSI bus trigger lines. Each of these inputs can start a video  
acquisition on a rising or falling edge. You can use all four external  
triggers and up to four RTSI bus triggers simultaneously.  
Delayed acquisition—Use either software or triggers to start  
acquisitions instantaneously or after skipping a specific number of  
frames. You can use delayed acquisition for post-trigger applications.  
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Chapter 2  
Hardware Overview  
Serial Interface  
The NI 1426 provides serial connections to and from the camera through  
two LVDS pairs in the Camera Link cable. All Camera Link serial  
communication uses one start bit, one stop bit, no parity, and no hardware  
handshaking.  
The NI 1426 supports the following baud rates: 56000, 38400, 19200,  
9600, 7200, 4800, 3600, 2400, 2000, 1800, 1200, 600, and 300 bps.  
You can use the serial interface interactively with MAX and  
clsercon.exe, or programmatically with LabVIEW and C.  
Interactively:  
MAX—Use MAX with a camera file containing preprogrammed  
commands. When an acquisition is initiated, the commands are sent to  
the camera.  
clsercon.exe—Use the National Instruments terminal emulator for  
Camera Link, clsercon.exe, if a camera file with preprogrammed  
serial commands does not exist for your camera. With  
clsercon.exe, you can still communicate serially with your  
camera. Go to <NI-IMAQ>\binto access clsercon.exe.  
Programmatically:  
LabVIEW—Use the serial interface programmatically, through calls  
to the NI-IMAQ driver using the IMAQ Serial Write and IMAQ Serial  
Read VIs. Go to <LabVIEW>\vi.lib\vision\driver\  
imaqll.llbto access these files.  
C—Use the serial interface programmatically, through calls to the  
NI-IMAQ driver using imgSessionSerialWriteand  
imgSessionSerialRead.  
Note IMAQ Serial Read, IMAQ Serial Write, clsercon.exe,  
imgSessionSerialRead, and imgSessionSerialWriteare used for directly  
accessing the NI 1426 serial port and are not required for most users.  
National Instruments also fully supports the recommended serial API  
described in the Specifications of the Camera Link Interface Standard for  
Digital Cameras and Frame Grabbers manual. This manual is available on  
several websites, including the Automated Image Association Web site at  
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3
Signal Connections  
Figure 3-1 shows the connectors on the front panel of the NI 1426.  
1
2
1
MDR 26-Pin Connector  
2
15-Pin D-SUB Connector  
Figure 3-1. NI 1426 Connectors  
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Chapter 3  
Signal Connections  
Connectors  
This section describes the MDR 26-pin connector and the 15-pin D-SUB  
connector on the NI 1426.  
MDR 26-Pin Connector  
The MDR 26-pin connector provides reliable high-frequency transfer rates  
between the camera and the acquisition device. To access this connector,  
use a 3M Camera Link cable. Refer to the Camera Link Cables section of  
Appendix A, Cabling, for additional information about Camera Link  
cables, including available cable lengths and ordering information.  
Figure 3-2 shows the NI 1426 MDR 26-pin connector assignments. Refer  
to Table 3-1 for a description of the MDR 26-pin and 15-pin D-SUB signal  
connections.  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23 10  
24 11  
25 12  
26 13  
1
2
3
4
5
6
7
8
9
DGND  
CC(4)+  
CC(3)–  
CC(2)+  
CC(1)–  
SerTFG–  
SerTC+  
X(3)–  
XCLK–  
X(2)–  
X(1)–  
X(0)–  
DGND  
DGND  
CC(4)–  
CC(3)+  
CC(2)–  
CC(1)+  
SerTFG+  
SerTC–  
X(3)+  
XCLK+  
X(2)+  
X(1)+  
X(0)+  
DGND  
Figure 3-2. MDR 26-Pin Connector Assignments  
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Chapter 3  
Signal Connections  
15-pin D-SUB Connector  
The 15-pin D-SUB connector connects to general purpose digital I/O. The  
I/O lines, two optically isolated input lines, and two RS-422 input lines.  
National Instruments provides a generic 15-pin cable assembly kit  
(part number 190912-04) that breaks the connector out into 15 color-coded  
Specifications section of Appendix A, Cabling, for information about  
ordering a cable assembly kit.  
If you require twisted pair wiring, you must build a custom cable. Refer to  
the connector pin assignments in Figure 3-3 and the 15-Pin D-SUB Cable  
Specifications section of Appendix A, Cabling, to build a custom cable for  
the 15-pin D-SUB connector.  
1
2
3
4
5
6
7
8
TTL_TRIG(0)  
TTL_TRIG(1)  
TTL_TRIG(2)  
TTL_TRIG(3)  
ISO_IN(0)+  
ISO_IN(0)–  
PHASE_A+  
PHASE_A–  
9
DGND  
DGND  
DGND  
ISO_IN(1)+  
ISO_IN(1)–  
PHASE_B+  
PHASE_B–  
10  
11  
12  
13  
14  
15  
Figure 3-3. 15-Pin D-SUB Connector Pin Assignments  
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Chapter 3  
Signal Connections  
Connector Signal Connection Descriptions  
Table 3-1 describes the MDR 26-pin and 15-pin D-SUB signal  
connections.  
Table 3-1. I/O Connector Signals  
Signal Name  
TTL_TRIG<3..0>  
DGND  
Description  
TTL external triggers/DIO lines (I/O).  
Direct connection to digital GND on the NI 1426.  
30 V isolated input only lines.  
ISO_IN<1..0>  
Use these lines instead of, not in addition to, TTL_TRIG<1..0>.  
The primary use of these signals is for interfacing to a quadrature encoder.  
PHASE_A  
PHASE_B  
Alternatively, these pairs can be used as independent RS-422 trigger inputs  
instead of, not in addition to, TTL_TRIG<3..2>.  
X<3..0>  
XCLK  
LVDS Base configuration data and enable signals from the camera to the  
acquisition device.  
Transmission clock on the Base configuration chip for Camera Link  
communication between the acquisition device and the camera.  
SerTC  
Serial transmission to the camera from the image acquisition device.  
Serial transmission to the frame grabber from the camera.  
SerTFG  
CC<4..1>  
Four LVDS pairs, defined as camera inputs and acquisition device outputs,  
reserved for camera control.  
On some cameras, the camera controls allow the acquisition device to control  
exposure time and frame rate.  
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A
Cabling  
This appendix contains cabling requirements for the NI 1426, including  
Camera Link cable ordering information.  
15-Pin D-SUB Cable Specifications  
National Instruments provides a generic 15-pin cable assembly kit  
(part number 190912-04) that breaks the connector out into 15 color-coded  
wires for easy connectivity. Visit the National Instruments Web site at  
ni.com/catalogto purchase a cable assembly kit for the NI 1426.  
If you decide to build a custom cable, National Instruments recommends  
that you use twisted pair wiring to help reduce noise pickup from outside  
sources and crosstalk. TTL I/O lines should be twisted together with a wire  
connected to DGND. Isolated input and RS-422 input lines should be  
twisted together in their proper +/– pairs.  
Refer to the Connectors section of Chapter 3, Signal Connections, for  
connector pin assignments.  
Camera Link Cables  
Use a standard Camera Link cable to connect your camera to the MDR  
26-pin connector on the NI 1426. Camera Link cables consist of two MDR  
26-pin male plugs linked with a twin-axial shielded cable and are available  
in two shell configurations.  
Note National Instruments recommends purchasing a Camera Link cable. Building your  
own cable is not recommended due to the high-speed signaling on the Camera Link  
interface.  
Refer to the Specifications of the Camera Link Interface Standard for  
Digital Cameras and Frame Grabbers manual for more information about  
Camera Link cables.  
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Appendix A  
Cabling  
Figure A-1 illustrates the Camera Link cable.  
1
2
1
MDR 26-Pin Male Plug  
2
2X Thumbscrews  
Figure A-1. Camera Link Cable  
Ordering Information  
Camera Link cables are manufactured by 3M corporation and are available  
from both National Instruments and 3M.  
Two-meter Camera Link cables (part number 187676-02) are available  
from the National Instruments Web site at ni.com/catalog. Camera  
Link cables are available in 1 to 10 m lengths from the 3M Web site at  
www.3m.com. Refer to Figure A-2 for 3M part number information.  
14X26-SZLB-XXX-0LC  
Shell Retention Options:  
B = Thumbscrew shell kit  
T = Thumbscrew overmold shell  
Length:  
100 = 1 meter  
200 = 2 meters  
300 = 3 meters  
450 = 4.5 meters  
500 = 5 meters  
700 = 7 meters  
A00 = 10 meters  
Figure A-2. 3M Part Number Ordering Information  
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B
Technical Support and  
Professional Services  
Visit the following sections of the National Instruments Web site at  
ni.comfor technical support and professional services:  
Support—Online technical support resources at ni.com/support  
include the following:  
Self-Help Resources—For answers and solutions, visit the  
award-winning National Instruments Web site for software drivers  
and updates, a searchable KnowledgeBase, product manuals,  
step-by-step troubleshooting wizards, thousands of example  
programs, tutorials, application notes, instrument drivers, and  
so on.  
Free Technical Support—All registered users receive free Basic  
Service, which includes access to hundreds of Application  
Engineers worldwide in the NI Discussion Forums at  
ni.com/forums. National Instruments Application Engineers  
make sure every question receives an answer.  
For information about other technical support options in your  
area, visit ni.com/servicesor contact your local office at  
ni.com/contact.  
Training and Certification—Visit ni.com/trainingfor  
self-paced training, eLearning virtual classrooms, interactive CDs,  
and Certification program information. You also can register for  
instructor-led, hands-on courses at locations around the world.  
System Integration—If you have time constraints, limited in-house  
technical resources, or other project challenges, National Instruments  
Alliance Partner members can help. To learn more, call your local  
NI office or visit ni.com/alliance.  
Declaration of Conformity (DoC)—A DoC is our claim of  
compliance with the Council of the European Communities using  
the manufacturer’s declaration of conformity. This system affords  
the user protection for electronic compatibility (EMC) and product  
safety. You can obtain the DoC for your product by visiting  
ni.com/certification.  
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Appendix B  
Technical Support and Professional Services  
Calibration Certificate—If your product supports calibration,  
you can obtain the calibration certificate for your product at  
ni.com/calibration.  
If you searched ni.comand could not find the answers you need, contact  
your local office or NI corporate headquarters. Phone numbers for our  
worldwide offices are listed at the front of this manual. You also can visit  
the Worldwide Offices section of ni.com/niglobalto access the branch  
office Web sites, which provide up-to-date contact information, support  
phone numbers, email addresses, and current events.  
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Glossary  
A
acquisition window  
The image size specific to a video standard or camera resolution.  
active line region  
The region of lines actively being stored. Defined by a line start (relative to  
the vertical synchronization signal) and a line count.  
active pixel region  
The region of pixels actively being stored. Defined by a pixel start (relative  
to the horizontal synchronization signal) and a pixel count.  
API  
area  
Application programming interface.  
A rectangular portion of an acquisition window or frame that is controlled  
and defined by software.  
ASIC  
Application-Specific Integrated Circuit. A proprietary semiconductor  
component designed and manufactured to perform a set of specific  
functions for specific customer needs.  
B
buffer  
Temporary storage for acquired data.  
bus  
A group of conductors that interconnect individual circuitry in a computer,  
such as the PCI bus; typically the expansion vehicle to which I/O or other  
devices are connected.  
C
Camera Link  
Interface standard for digital video data and camera control based on the  
Channel Link chipset.  
Channel Link  
National Semiconductor chipset for high-speed data serialization and  
deserialization for transmission across cables up to 10 m.  
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Glossary  
D
DAQ  
Data acquisition. (1) Collecting and measuring electrical signals from  
sensors, transducers, and test probes or fixtures and inputting them to a  
computer for processing. (2) Collecting and measuring the same kinds of  
electrical signals with A/D or DIO boards plugged into a computer, and  
possibly generating control signals with D/A and/or DIO boards in the  
same computer.  
DMA  
Direct memory access. A method by which data can be transferred to and  
from computer memory from and to a device or memory on the bus while  
the processor does something else; DMA is the fastest method of  
transferring data to/from computer memory.  
F
FIFO  
First-in first-out memory buffer. The first data stored is the first data sent  
to the acceptor; FIFOs are used on Vision devices to temporarily store  
incoming data until that data can be retrieved.  
L
LVDS  
Low Voltage Differential Signaling (EIA-644).  
N
NI-IMAQ  
Driver software for National Instruments Vision hardware.  
P
PCI  
Peripheral Component Interconnect. A high-performance expansion bus  
architecture originally developed by Intel to replace ISA and EISA. PCI  
offers a theoretical maximum transfer rate of 133 Mbytes/s.  
pixel  
Picture element. The smallest division that makes up the video scan line;  
for display on a computer monitor, a pixel’s optimum dimension is square  
(aspect ratio of 1:1, or the width equal to the height).  
pixel clock  
Divides the incoming horizontal video line into pixels.  
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Glossary  
Q
quadrature encoder  
A device that converts angular rotation into two pulse trains, A and B. The  
phase difference between A and B transmits information about the  
direction of rotation and the number of transitions indicates the amount of  
rotation.  
R
real time  
A property of an event or system in which data is processed as it is acquired  
instead of being accumulated and processed at a later time.  
resolution  
RGB  
The smallest signal increment that can be detected by a measurement  
system. Resolution can be expressed in bits, in proportions, or in  
percent of full scale. For example, a system has 12-bit resolution,  
one part in 4,096 resolution, and 0.0244 percent of full scale.  
Color encoding scheme using red, green, and blue (RGB) color information  
where each pixel in the color image is encoded using 32 bits: eight bits for  
red, eight bits for green, eight bits for blue, and eight bits for the alpha value  
(unused).  
ROI  
Region of interest. A hardware-programmable rectangular portion of the  
acquisition window.  
RTSI bus  
Real-Time System Integration Bus. The National Instruments timing bus  
that connects image acquisition and DAQ devices directly, by means of  
connectors on the devices, for precise synchronization of functions.  
S
scatter-gather DMA  
A type of DMA that allows the DMA controller to reconfigure on-the-fly.  
Synchronous dynamic RAM.  
SDRAM  
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Glossary  
T
tap  
A stream of pixels from a camera. Some cameras send multiple streams,  
or taps, of data over a cable simultaneously to increase transfer rate.  
transfer rate  
The rate, measured in bytes/s, at which data is moved from source to  
destination after software initialization and set up operations. The  
maximum rate at which the hardware can operate.  
trigger  
Any event that causes or starts some form of data capture.  
trigger control and  
mapping circuitry  
Circuitry that routes, monitors, and drives external and RTSI bus trigger  
lines. You can configure each of these lines to start or stop acquisition on a  
rising or falling edge.  
TTL  
Transistor-transistor logic.  
V
VI  
Virtual Instrument. (1) A combination of hardware and/or software  
elements, typically used with a PC, that has the functionality of a classic  
stand-alone instrument. (2) A LabVIEW software module (VI), which  
consists of a front panel user interface and a block diagram program.  
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Index  
configuration, Camera Link  
Base configuration, 2-2  
connectors  
15-pin D-SUB connector, 3-3  
I/O connector signals (table), 3-4  
MDR 26-pin connector (figure), 3-2  
Numerics  
15-pin D-SUB connector, 3-3  
cable specifications, A-1  
A
circuitry, 2-7  
acquisition start conditions, 2-8  
acquisition window control  
D
data formatter, multiple tap, 2-3, 2-4  
data transmission, 2-2  
Declaration of Conformity (NI resources), B-1  
delayed acquisition start conditions, 2-8  
DGND signal (table), 3-4  
diagnostic tools (NI resources), B-1  
DMA controllers, 2-8  
B
Base configuration, Camera Link, 2-2  
documentation  
conventions used in the manual, v  
drivers (NI resources), B-1  
D-SUB connector, 15-pin, 3-3  
C
cabling  
15-pin D-SUB connector, A-1  
Camera Link cable (figure), A-2  
Camera Link cables, A-1  
calibration certificate (NI resources), B-2  
Camera Link  
overview, 3-3  
pin assignments (figure), 3-3  
Base configuration, 2-2  
cabling  
description, A-1  
ordering information, A-2  
overview, 1-4  
H
hardware overview, 2-1  
acquisition, region of interest (ROI), 2-7  
binarization, 2-3  
block diagram (figure), 2-1  
CC<4..1> signal (table), 3-4  
clock signals, XCLK signal (table), 3-4  
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Index  
bus master PCI interface, 2-8  
Camera Link, Base configuration, 2-2  
data transmission, 2-2  
National Instruments  
application software, 1-2  
NI 1426  
high-speed timing, 2-7  
multiple-tap data formatter, 2-4  
SDRAM, 2-4  
wiring an isolated input to a  
sourcing/sinking output device, 2-5  
wiring an isolated input to output  
Inspection, 1-3  
NI Vision Development Module, 1-3  
NI-IMAQ driver software, 1-2  
help, technical support, B-1  
I
I/O connector. See connectors  
installation, cabling  
PHASE_A signal (table), 3-4  
15-pin D-SUB cable specifications, A-1  
Camera Link cables, A-1  
integration with DAQ and motion control, 1-4  
ISO_IN signal (table), 3-4  
Q
K
KnowledgeBase, B-1  
L
Real-Time System Integration (RTSI) bus, 1-1  
region of interest (ROI) circuitry, 2-7  
region of interest, in acquisition window  
control, 2-7  
M
mapping circuitry, 2-4  
multiple-tap data formatter, 2-3, 2-4  
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Index  
S
scatter-gather DMA controllers, 2-8  
SDRAM, 2-4  
technical support, B-1  
timing circuitry, high-speed, 2-7  
serial interface, 2-9  
training and certification (NI resources), B-1  
trigger  
SerTC signal (table), 3-4  
SerTFG signal (table), 3-4  
signal connections  
configuration options (table), 2-5  
control and mapping circuitry, 2-4  
troubleshooting (NI resources), B-1  
TTL_TRIG signal (table), 3-4  
connectors  
15-pin D-SUB connector, 3-3  
MDR 26-pin connector, 3-2  
NI 1426 connectors (figure), 3-1  
software programming choices, 1-2  
Inspection, 1-3  
Web resources, B-1  
X<3..0> signal (table), 3-4  
XCLK signal (table), 3-4  
NI Vision Development Module, 1-3  
NI-IMAQ driver software, 1-2  
start conditions  
delayed acquisition, 2-8  
software control, 2-8  
trigger control, 2-8  
support, technical, B-1  
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