Epson RTC 4543SA User Manual

MQ252-03  
Application Manual  
Real Time Clock Module  
RTC-4543SA/SB  
Model  
Product Number  
RTC-4543SA  
RTC-4543SB  
Q4145435x000200  
Q4145436x000200  
RTC - 4543 SA/SB  
CONTENTS  
1. OVERVIEW........................................................................................................1  
2. BLOCK DIAGRAM...........................................................................................1  
3. PIN CONNECTIONS.......................................................................................2  
4. PIN FUNCTIONS..............................................................................................2  
5. ELECTRICAL CHARACTERISTICS.........................................................3  
5-1. ABSOLUTE MAXIMUM RATINGS ..........................................................................................3  
5-2. OPERATING CONDITION.......................................................................................................3  
5-3. FREQUENCY CHARACTERISTICS........................................................................................3  
5-4. DC CHARACTERISTICS ........................................................................................................3  
5-5. AC CHARACTERISTICS.........................................................................................................4  
5-6. TIMING CHARTS.....................................................................................................................5  
6. TIMER DATA ORGANIZATION..................................................................6  
7. DESCRIPTION OF OPERATION...............................................................7  
7-1.DATA READS............................................................................................................................7  
7-2. DATA WRITES.........................................................................................................................7  
7-3. DATA WRITES (DIVIDER RESET).........................................................................................8  
7-4. FOUT OUTPUT AND 1 HZ CARRIES...................................................................................8  
8. EXAMPLES OF EXTERNAL CIRCUITS .................................................9  
9. EXTERNAL DIMENSIONS.........................................................................10  
10. LAYOUT OF PACKAGE MARKINGS ..................................................10  
11. REFERENCE DATA...................................................................................11  
12. APPLICATION NOTES..............................................................................12  
12-1. NOTES ON HANDLING.......................................................................................................12  
12-2. NOTES ON PACKAGING ....................................................................................................12  
RTC - 4543 SA/SB  
32-kHz Output Serial RTC Module  
RTC - 4543 SA/SB  
zꢀ Built-in crystal permits operation without requiring adjustment  
zꢀ Built-in time counters (seconds, minutes, hours) and calendar counters (days, days of the week  
months, years)  
zꢀ Operating voltage range: 2.5 V to 5.5 V  
zꢀ Supply voltage detection voltage: 1.7 ±0.3 V  
zꢀ Low current consumption: 1.0 µA/2.0 V (Max.)  
zꢀ Automatic processing for leap years  
zꢀ Output selectable between 32.768 kHz/1 Hz  
1. Overview  
This module is a real-time clock with a serial interface and a built-in crystal oscillator. This module  
is also equipped with clock and calendar circuits, an automatic leap year compensation function,  
and a supply voltage detection function.  
In addition, this module has a 32.768 kHz/1 Hz selectable output function for hardware control that  
is independent of the RTC circuit.  
This module is available in a compact SOP 14-pin package (RTC-4543SA) and a thin SOP 18-pin  
package (RTC-4543SB).  
2. Block diagram  
32.768 kHz  
CLOCK AND CALENDAR  
DIVIDER  
OSC  
FOUT  
FSEL  
OUTPUT  
CONTROLLER  
SHIFT REGISTER  
FOE  
VOLTAGE  
DETECT  
DATA  
CLK  
WR  
I / O  
CONTROL  
CIRCUIT  
CONTROLLER  
CE  
Page - 1  
MQ - 252 - 03  
RTC - 4543 SA/SB  
3. Pin Connections  
RTC - 4543SA  
RTC - 4543SB  
14 FOUT  
1
2
GND  
N.C  
1 N.C  
2 N.C  
3 N.C  
18 N.C  
17 N.C  
1
18  
1
14  
13  
N.C  
N.C  
16  
15  
N.C  
12  
11 DATA  
CLK  
3
4
5
CE  
N.C  
4
N.C  
FSEL  
WR  
5 FOE  
6 WR  
14 VDD  
13 N.C  
10  
7
12 CLK  
11 DATA  
10 FOUT  
FSEL  
7
8
9 VDD  
8 N.C  
6 FOE  
7 N.C  
9
10  
8 CE  
9 GND  
SOP - 14pin  
SOP - 18pin  
Function  
4. Pin Functions  
Pin No.  
SOP-14pin  
Signal  
I/O  
(SOP-18pin)  
1
( 9 )  
GND  
Connects to negative (-) side (ground) of the power supply.  
Chip enable input pin.  
3
( 8 )  
When high,the chip is enabled. When low,the DATA pin goes to  
high impedance and the CLK,DATA,and WR pins are not able to  
accept input.In addition, when low,the TM bit is cleared.  
Serect the frequency that is output from the FOUT pin.  
High : 1 Hz  
Low : 32.768 kHz  
DATA pin input/output switching pin.  
High : DATA input (when writing the RTC)  
Low : DATA output (when reading the RTC)  
When high, the frequency selected by the FSEL pin is output from  
the FOUT pin.  
Input  
CE  
FSEL  
WR  
4
( 7 )  
Input  
Input  
Input  
5
( 6 )  
6
( 5 )  
FOE  
When low, the FOUT pin goes to high impedance.  
9
V
DD  
Connects to positive (+) side of the power supply.  
( 14 )  
Serial clock input pin.  
Data is gotten at the rising edge during a write, and data is output  
at the rising edge during a read.  
10  
( 12 )  
CLK  
Input  
11  
( 11 )  
DATA  
FOUT  
Bi-directional Input/outout pin that is used for writing and reading data.  
Outputs the frequency selected by the FSEL pin. 1 Hz output is  
14  
( 10 )  
Output  
synchronized with the internal one-second signal.  
This output is not affected by the CE pin.  
Although these pins are not connected internally,they should  
always be left open in order to obtain the most stable oscillation  
possible.  
2,7,8,12,13  
( 1,2,3,4,13,  
15,16,17,18 )  
N.C.  
* Always connect a passthrough capacitor of at least 0.1 µF as close as possible between V and GND.  
DD  
Page - 2  
MQ - 252 - 03  
RTC - 4543 SA/SB  
5. Electrical Characteristics  
5-1. Absolute Maximum Ratings  
Item  
Symbol  
Conditions  
Min.  
-0.3  
GND-0.3  
GND-0.3  
-55  
Max.  
7.0  
Unit  
V
V
Supply voltage  
Input voltage  
Output voltage  
Storage temperature  
V
DD  
V
I
V
V
+0.3  
DD  
Ta=+25 °C  
V
O
+0.3  
DD  
V
T
-
+125  
STG  
°C  
5-2. Operating Condition  
Item  
Symbol  
Conditions  
-
Min.  
2.5  
Max.  
5.5  
Unit  
V
Operating supply  
voltage  
V
DD  
Data holding voltage  
Operating temperature  
V
-
1.4  
-40  
5.5  
+85  
V
CLK  
No condensation  
T
OPR  
°C  
5-3. Frequency Characteristics  
Item  
Symbol  
Conditions  
Max.  
Unit  
f/fO  
Ta=+25 °C , VDD=5.0 V  
5 ± 23 *  
×10-6  
Frequency tolerance  
Frequency temperature  
characteristics  
-10to+70 °C +25 °C ref  
×10-6  
Top  
+ 10 / - 120  
Frequency voltage  
characteristics  
Ta=+25 °C , V =2.0 to 5.5 V  
± 2  
×10-6/V  
f/V  
DD  
Oscillation start time  
Aging  
t
3
s
STA  
Ta=+25 °C , V =2.5 V  
DD  
Ta=+25 °C , V =5 V , first year  
± 5  
×10-6  
fa  
DD  
*
Monthly deviation: Approx. 1 min.  
5-4. DC Characteristics  
Unless specified otherwise: V = 5 V ± 10 %, Ta = - 40 to +85 °C  
DD  
Item  
Symbol  
Conditions  
Min.  
Typ.  
1.5  
1.0  
0.5  
4.0  
2.5  
Max.  
Unit  
CE=L , FOE=L  
Current consumption(1)  
Current consumption(2)  
Current consumption(3)  
Current consumption(4)  
Current consumption(5)  
I
I
I
I
I
1
2
3
4
5
V
V
V
V
V
=5.0 V  
=3.0 V  
=2.0 V  
=5.0 V  
=3.0 V  
3.0  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
µA  
µA  
µA  
µA  
µA  
FSEL=H  
2.0  
1.0  
CE=L , FOE=H  
FSEL=L  
10.0  
6.5  
No load on the  
FOUT pin  
Current consumption(6)  
Input voltage  
I
6
DD  
V
DD  
=2.0 V  
1.5  
4.0  
µA  
WR,DATA,CE,CLK,  
FOE,FSEL pins  
V
IH  
0.8 V  
V
V
DD  
V
IL  
0.2 V  
DD  
WR,CE,CLK,FOE,FSEL pins  
VIN = VDD or GND  
Input off/leak current  
Output voltage  
I
0.5  
OFF  
µA  
V
V
V
V
V
V
=5.0 V  
=3.0 V  
=5.0 V  
=3.0 V  
I
=-1.0 mA  
4.5  
2.0  
V
V
V
V
OH(1)  
DD  
DD  
DD  
DD  
OH  
DATA , FOUT pins  
= 1.0 mA  
OH(2)  
V
V
I
0.5  
0.8  
OL(1)  
OL  
DATA , FOUT pins  
OL(2)  
Output load condition  
( fanout )  
FOUT pin  
N / CL  
2 LSTTL / 30 pF Max.  
Output leak current  
I
V
=5.5 V DATA , FOUT pins  
=0 V DATA , FOUT pins  
OUT  
-1.0  
1.0  
1.0  
OZH  
OUT  
µA  
µA  
I
V
-1.0  
OZL  
Supply voltage detection  
voltage  
V
DT  
-
1.4  
1.7  
2.0  
V
Page - 3  
MQ - 252 - 03  
RTC - 4543 SA/SB  
5-5. AC Characteristics  
Item  
Unless specified otherwise: Ta = - 40 to +85 °C, CL = 50 pF  
Symbol  
Unit  
V =5 V ± 10 %  
DD  
V =3 V ± 10 %  
DD  
Min.  
Max.  
Min.  
Max.  
CLK clock cycle  
t
0.75  
7800  
3900  
1.5  
7800  
3900  
CLK  
µs  
µs  
CLK low pulse width  
CLK high pulse width  
CLK setup time  
t
0.375  
0.75  
CLKL  
t
0.375  
25  
3900  
3900  
0.9  
0.75  
50  
3900  
3900  
0.9  
CLKH  
µs  
ns  
t
CLKS  
CE setup time  
t
t
0.375  
0.375  
0.75  
0.75  
CES  
CEH  
µs  
µs  
s
CE hold time  
CE enable time  
t
t
CE  
SD  
HD  
Write data setup time  
Write data hold time  
WR setup time  
0.1  
0.1  
0.2  
0.1  
µs  
µs  
ns  
ns  
t
t
100  
100  
100  
100  
WRS  
WR hold time  
t
WRH  
DATA output delay time  
DATA output floating time  
Clock input rise time  
Clock input fall time  
FOUT rise time (CL=30 pF)  
FOUT fall time (CL=30 pF)  
t
0.2  
0.1  
50  
0.4  
0.2  
DATD  
µs  
µs  
ns  
ns  
ns  
ns  
ns  
ns  
%
t
DZ  
t
100  
100  
200  
200  
200  
200  
60  
r1  
f1  
r2  
f2  
t
50  
t
t
100  
100  
100  
100  
60  
Disable time  
Enable time  
(CL=30 pF)  
(CL=30 pF)  
t
t
XZ  
ZX  
FOUT duty ratio (CL=30 pF)  
Wait time  
Duty  
40  
40  
t
0.95  
1.9  
RCV  
µs  
Page - 4  
MQ - 252 - 03  
RTC - 4543 SA/SB  
5-6. Timing Charts  
( 1 ) Data read  
tCE  
WR  
CE  
tWRS  
tWRH  
tCES tCLK  
tCEH  
tRCV  
CLK  
tCLKH  
tCLKL  
tDZ  
tCLKS  
tr1 tf1  
DATA  
tDATD  
( 2 ) Data write  
t
CE  
WR  
CE  
t
t
WRH  
WRS  
t
t
CEH RCV  
t
t
CLK  
CES  
CLK  
t
t
CLKL  
CLKH  
t
t
t
f1  
r1  
CLKS  
t
HD  
t
SD  
DATA  
( 3 ) FOUT output  
FOUT  
tH  
tf2  
90%  
50%  
10%  
tr2  
t
t
H
=
×
Duty  
100 %  
[ ]  
t
( 4 ) Disable/enable  
FOE  
VIH  
Enable  
Disable  
VIL  
tXZ  
tZX  
High impedance  
FOUT  
Page - 5  
MQ - 252 - 03  
RTC - 4543 SA/SB  
6. Timer Data Organization  
The counter data is BCD code.  
The timer automatically adjusts for different month lengths and for leap year.  
The time is indicated in 24-hour format.  
Writes and reads are both performed on an LSB-first basis.  
MSB  
LSB  
s1  
Second  
( 0 to 59 )  
FDT  
s40  
mi40  
*
s20  
mi20  
h20  
s10  
mi10  
h10  
s8  
s4  
s2  
Minutes  
( 0 to 59 )  
*
*
mi8  
mi4  
mi2  
mi1  
Hour ( 0 to 23 )  
h8  
*
h4  
h2  
h1  
Day of the week  
( 1 to 7 )  
w4  
w2  
w1  
Day ( 1 to 31 )  
Month ( 1 to 12 )  
Year ( 0 to 99 )  
*
*
*
d20  
*
d10  
mo10  
y10  
d8  
mo8  
y8  
d4  
mo4  
y4  
d2  
mo2  
y2  
d1  
mo1  
y1  
TM  
y80  
y40  
y20  
* bits: Any data may be written to these bits.  
FDT bit: Supply voltage detection bit  
This bit is set to “1” when voltage of 1.7 ±0.3 V or less is detected between VDD and GND.  
The FDT bit is cleared if all of the digits up to the year digits are read.  
Although this bit can be both read and written, normally set this bit to “0”.  
VDD  
VDET  
0.5 s  
0.5 s  
Detection  
pulse  
Mode  
Read  
FDT bit  
The supply voltage detection circuit monitors the supply voltage once every 0.5 seconds;  
if the supply voltage is lower than the detection voltage value, the FDT bit is set to “1”.  
TM bit: This is a test bit for SEIKO-EPSON’s use. Always set this bit to “0”.  
Page - 6  
MQ - 252 - 03  
RTC - 4543 SA/SB  
7. Description of Operation  
7-1.Data reads  
1
2
52  
53  
54  
54+n  
CLK  
CE  
WR  
s1 s2 s4 s8 s10 s20 s40 FDT  
Sec  
y8 y10 y20 y40 y80  
Year  
DATA  
Output data does not change  
1) When the WR pin is low and the CE pin is high, the RTC enters data output mode.  
2) At the first rising edge of the CLK signal, the clock and calendar data are loaded into the shift  
register and the LSB of the seconds digits is output from the DATA pin.  
3) The remaining seconds, minutes, hour, day of the week, day, month, and year data is shifted out,  
in sequence and in synchronization with the rising edge of the CLK signal, so that the data is  
output from the DATA pin.  
The output data is valid until the rising edge of the 52nd clock pulse; even if more than 52 clock  
pulses are input, the output data does not change.  
4) If data is required in less than 52 clock pulses, that part of the data can be gotten by setting the  
CE pin low after the necessary number of clock pulses have been output.  
Example: If only the data from “seconds” to “day of the week” is needed:  
After 28 clock pulses, set the CE pin low in order to get the data from “seconds” to “day of  
the week.”  
5) When performing successive data read operations, a wait (tRCV) is necessary after the CE pin  
is set low.  
6) Note that if an update operation (a one-second carry) occurs during a data read operation,  
the data that is read will have an error of -1 second.  
7) Complete data read operations within tCE (Max.) = 0.9 seconds, as described earlier.  
7-2. Data writes  
1
2
52  
53  
54  
54+n  
CLK  
CE  
WR  
0
s1 s2 s4 s8 s10 s20 s40  
Seconds  
y8 y10 y20 y40 y80  
Year  
DATA  
( FDT )  
1) When the WR pin is high and the CE pin is high, the RTC enters data input mode.  
2) In this mode, data is input, in succession and in synchronization with the rising edge of the CLK  
signal, to the shift register from the DATA pin, starting from the LSB of the seconds digits.  
3) The sub-seconds counter is reset between the falling edge of the first clock pulse and the rising  
edge of the second clock pulse. In addition, carries to the seconds counter are prohibited at the  
falling edge of the first clock pulse.  
4) After the last data is input to the shift register at the rising edge of the 52nd clock pulse, the  
contents of the shift register are transferred to the timer counter.  
5) Note that during a data write operation, 52 bits of data must be input.  
Correct write-access isn't completed when CE terminal turned into low on a state of less  
than 52 bits.  
If more than 52 bits of data are input, the 53rd and subsequent bits are ignored.  
(The first 52 bits of data are valid.)  
6) Once the CE pin is set low, the prohibition on carries to the seconds counter is lifted.  
Complete data write operations within t (Max.) = 0.9 seconds, as described earlier.  
CE  
7) If a data read operation is to be performed immediately after a data write operation, a wait (tRCV)  
is necessary after the CE pin is set low.  
* Malfunction will result if illegal data is written. Therefore, be certain to write legal data.  
Page - 7  
MQ - 252 - 03  
RTC - 4543 SA/SB  
7-3. Data writes (Divider Reset)  
CE  
WR  
1
2
52  
CLK  
N Seconds  
DATA  
s1 s2 s4 s8 s10 s20 s40  
y8 y10 y20 y40 y80  
Timer,counter  
N seconds  
0 seconds  
N seconds  
Divider reset  
Pulse  
Carry stop  
Pulse  
After the counter is reset, carries to the seconds digit are halted.After the data write operation,  
the prohibition on carries to the seconds counter is lifted by setting the CE pin low.  
Complete data write operations within tCE (Max.) = 0.9 seconds, as described earlier.  
7-4. FOUT output and 1 Hz carries  
CE  
WR  
tCES  
CLK  
0
1.0 s  
-7.8 ms  
tCLK  
1Hz  
FOUT  
15.6 ms  
15.6 ms  
During a data write operation, because a reset is applied to the Devider counter (from the 128 Hz  
level to the 1 Hz level) after the CE pin goes high during the time between the falling edge of the first  
clock cycle and the rising edge of the second clock cycle, the length of the first 1 Hz cycle after the  
data write operation is 1.0 s +0 / 7.8ms +tCES+tCLK. Subsequent cycles are output at 1.0-second intervals.  
The 1-Hz signal that is output on FOUT is the internal 1-Hz signal with a 15.6-ms shift applied.  
Page - 8  
MQ - 252 - 03  
RTC - 4543 SA/SB  
8. Examples of External Circuits  
Example 1. When used as an RTC + clock source  
VDD  
Power supply  
Switching circuit  
VDD  
Power supply  
Detection circuit  
RTC 4543  
VDD  
CE  
WR  
DATA  
CLK  
0.1 µF  
FOUT  
FSEL  
FOE  
*1  
*2  
GND  
*1: FOUT output frequency setting (High: 1 Hz; low: 32.768 kHz)  
*2: Prohibits FOUT output during back up, reducing current consumption.  
Example 2. When used as a clock source (oscillator)  
VDD  
RTC-4543  
DD  
V
CE  
WR  
VDD  
VDD  
DATA  
CLK  
0.1 µF  
FOUT  
FSEL  
FOE  
1  
GND  
Page - 9  
MQ - 252 - 03  
RTC - 4543 SA/SB  
9. External Dimensions  
RTC - 4543 SA ( SOP-14pin )  
10.1 ± 0.2  
5.0 7.4 ± 0.2  
0.05  
Min.  
3.2 ± 0.1  
0.15  
0 - 10°  
0.35  
1.27  
1.2  
0.6  
The cylinder of the crystal oscillator can be seen in this area ( front ),  
but it has no affect on the performance of the device.  
RTC - 4543 SB ( SOP-18pin )  
0.2  
11.4 ±  
0.2  
7.8 ±  
5.4  
0.15  
1.8 2.0  
Max.  
0.4  
1.27  
0.1  
0 Min.  
0.2  
0.6 ±  
0 - 10  
0.12  
10. Layout of Package Markings  
Model  
RTC - 4543 SA  
Frequency  
torerance  
( SOP-14pin )  
R4543 B  
E 1234A  
Manufacturing  
Lot  
Model  
Frequency  
tolerance  
RTC - 4543 SB  
( SOP-18pin )  
R4543 B  
1234A  
E
Manufacturing  
Lot  
Note :  
The markings and their positions as pictured above are only approximations.  
These illustrations do not define the details of the style, size, and position of the characters marked on the packages.  
Page - 10  
MQ - 252 - 03  
RTC - 4543 SA/SB  
11. Reference Data  
(1) Example of Frequency-Temperature Characteristics  
T = +25 °C Typ.  
θ
Determining the frequency stability (clock accuracy)  
-6  
2
α = -0.035 × 10 / °C Typ.  
10-6  
1.The frequency-temperature characteristics can be  
×
+10  
0
-10  
-20  
-30  
-40  
-50  
-60  
-70  
-80  
approximated by the following equation:  
2
fT = α( T- X)  
θ θ  
fT  
α( /°  
: Frequency deviation at any given temperature  
: Second-order temperature  
C2  
)
((-0.035 0.005) 10-6/ C2)  
±
×
°
: Highest temperature(+25 C 5 C)  
T( C)  
θ °  
° ± °  
-90  
: Any given temperature  
X( C)  
θ
°
-100  
-110  
-120  
-130  
-140  
-150  
2. In order to determine the clock accuracy, add in the  
frequency tolerance and the voltage characteristics.  
f/f = f/f0 + fT + fv  
-50 -40 -30 -20 -10  
0
+10 +20 +30 +40 +50 +60 +70 +80 +90+100  
Temperature [°C]  
f/f  
: Clock accuracy at any given temperature  
and voltage (frequency stability)  
f/f  
: Frequency accuracy  
0
fT  
fv  
: Frequency deviation at any given temperature  
: Frequency deviation at any given voltage  
3. Determining the daily error  
Daily error =f/f × 86400 (seconds)  
-6  
With error of 11.574 × 10 , the error of the clock is  
about one second per day.  
(2)Example of Frequency-Voltage  
Characteristics  
(3)Example of Current Consumption-Voltage  
Characteristics  
Current consumpiton[ A ]  
µ
Frequency [ 10-6 ]  
×
Conditions  
No load, Ta=+25 C  
Conditions  
°
5 V reference Voltage,  
+1.0  
0.0  
Ta=+25 C  
°
2.0  
1.0  
2
3
4
5
-1.0  
-2.0  
Supply voltage (VDD)[V]  
0.0  
2.0  
3.0  
4.0  
5.0  
Supply voltage (VDD) [V]  
Note :  
This data shows values obtained from a sample lot.  
Page - 11  
MQ - 252 - 03  
RTC - 4543 SA/SB  
12. Application notes  
12-1. Notes on handling  
This module uses a C-MOS IC to realize low power consumption. Carefully note the following cautions when  
handling.  
(1) Static electricity  
While this module has built-in circuitry designed to protect it against electrostatic discharge, the chip  
could still be damaged by a large discharge of static electricity. Containers used for packing and  
transport should be constructed of conductive materials. In addition, only soldering irons, measurement  
circuits, and other such devices which do not leak high voltage should be used with this module, which  
should also be grounded when such devices are being used.  
(2) Noise  
If a signal with excessive external noise is applied to the power supply or input pins, the device may  
malfunction or "latch up." In order to ensure stable operation, connect a filter capacitor (preferably  
ceramic) of greater that 0.1F as close as possible to the power supply pins (between VDD and GNDs).  
Also, avoid placing any device that generates high level of electronic noise near this module.  
* Do not connect signal lines to the shaded area in the figure shown in Fig. 1 and, if possible, embed  
this area in a GND land.  
(3) Voltage levels of input pins  
When the input pins are at the mid-level, this will cause increased current consumption and a reduced  
noise margin, and can impair the functioning of the device. Therefore, try as much as possible to apply  
the voltage level close to VDD or GND.  
(4) Handling of unused pins  
Since the input impedance of the input pins is extremely high, operating the device with these pins in  
the open circuit state can lead to unstable voltage level and malfunctions due to noise. Therefore, pull-  
up or pull-down resistors should be provided for all unused input pins.  
12-2. Notes on packaging  
(1) Soldering heat resistance.  
If the temperature within the package exceeds 260, the characteristics of the crystal oscillator will be  
degraded and it may be damaged. The reflow conditions within our reflow profile is recommended.  
Therefore, always check the mounting temperature and time before mounting this device. Also, check  
again if the mounting conditions are later changed.  
* See Fig. 2 profile for our evaluation of Soldering heat resistance for reference.  
(2) Mounting equipment  
While this module can be used with general-purpose mounting equipment, the internal crystal oscillator  
may be damaged in some circumstances, depending on the equipment and conditions. Therefore, be  
sure to check this. In addition, if the mounting conditions are later changed, the same check should be  
performed again.  
(3) Ultrasonic cleaning  
Depending on the usage conditions, there is a possibility that the crystal oscillator will be damaged by  
resonance during ultrasonic cleaning. Since the conditions under which ultrasonic cleaning is carried  
out (the type of cleaner, power level, time, state of the inside of the cleaning vessel, etc.) vary widely,  
this device is not warranted against damage during ultrasonic cleaning.  
(4) Mounting orientation  
This device can be damaged if it is mounted in the wrong orientation. Always confirm the orientation of  
the device before mounting.  
(5) Leakage between pins  
Leakage between pins may occur if the power is turned on while the device has condensation or dirt on  
it. Make sure the device is dry and clean before supplying power to it.  
Fig. 1: Example GND Pattern  
Fig. 2: Reference profile for our evaluation of Soldering heat resistance.  
( SOP-14pin )  
RTC - 4543 SA  
Temperature [ °C ]  
+260 °C Max.  
1 5 °C / s  
+1 +5 °C / s  
( SOP-18pin )  
RTC - 4543 SB  
+170 °C  
100 s  
+220 °C  
35 s  
+1 +5 C / s  
°
Pre-heating area  
Stable Melting area  
time [ s ]  
Page - 12  
MQ - 252 - 03  
Application Manual  
Distributor  
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