Cypress Computer Hardware CY62138F User Manual

CY62138F MoBL®  
2-Mbit (256K x 8) Static RAM  
Features  
Functional Description [1]  
• High speed: 45 ns  
The CY62138F is a high performance CMOS static RAM  
organized as 256K words by 8 bits. This device features  
advanced circuit design to provide ultra low active current.  
• Wide voltage range: 4.5 V – 5.5 V  
• Pin compatible with CY62138V  
• Ultra low standby power  
®
This is ideal for providing More Battery Life™ (MoBL ) in  
portable applications such as cellular telephones. The device  
also has an automatic power down feature that significantly  
reduces power consumption when addresses are not toggling.  
Placing the device into standby mode reduces power  
— Typical standby current: 1 µA  
— Maximum standby current: 5 µA  
• Ultra low active power  
consumption by more than 99% when deselected (CE HIGH  
1
or CE LOW).  
2
— Typical active current: 1.6 mA @ f = 1 MHz  
To write to the device, take Chip Enable (CE LOW and CE  
1
2
• Easy memory expansion with CE , CE and OE features  
1
2,  
HIGH) and Write Enable (WE) inputs LOW. Data on the eight  
IO pins (IO through IO ) is then written into the location  
• Automatic power down when deselected  
• CMOS for optimum speed and power  
0
7
specified on the address pins (A through A ).  
0
17  
• Available in Pb-free 32-pin SOIC and 32-pin TSOP II  
packages  
To read from the device, take Chip Enable (CE LOW and CE  
1
2
HIGH) and output enable (OE) LOW while forcing Write  
Enable (WE) HIGH. Under these conditions, the contents of  
the memory location specified by the address pins appear on  
the IO pins.  
The eight input and output pins (IO through IO ) are placed  
0
7
in a high impedance state when the device is deselected (CE  
1
HIGH or CE LOW), the outputs are disabled (OE HIGH), or  
2
during a write operation (CE LOW and CE HIGH and WE  
1
2
LOW).  
Logic Block Diagram  
IO  
DATA IN DRIVERS  
0
A
A
A
A
A
A
A
A
A
0
1
2
3
4
5
6
7
8
IO  
IO  
IO  
IO  
IO  
IO  
IO  
1
2
3
4
5
6
7
256K x 8  
ARRAY  
A
A
A
9
10  
11  
CE  
CE  
1
2
POWER  
DOWN  
COLUMN DECODER  
WE  
OE  
Note  
1. For best practice recommendations, refer to the Cypress application note “System Design Guidelines” at http://www.cypress.com.  
Cypress Semiconductor Corporation  
Document #: 001-13194 Rev. *A  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised March 26, 2007  
Download from Www.Somanuals.com. All Manuals Search And Download.  
 
CY62138F MoBL®  
DC Input Voltage  
............ –0.5V to 6.0V (V  
+ 0.5V)  
Maximum Ratings  
CCmax  
Output Current into Outputs (LOW) ............................ 20 mA  
Exceeding maximum ratings may impair the useful life of the  
device. These user guidelines are not tested.  
Static Discharge Voltage ......................................... > 2001V  
(MIL–STD–883, Method 3015)  
Storage Temperature ................................65°C to + 150°C  
Latch-up Current ................................................... > 200 mA  
Ambient Temperature with  
Power Applied ...........................................55°C to + 125°C  
Operating Range  
Supply Voltage to Ground  
Ambient  
Potential ................................–0.5V to 6.0V (V  
+ 0.5V)  
+ 0.5V)  
CCmax  
Device  
Range  
V
CC  
Temperature  
DC Voltage Applied to Outputs  
[4, 5]  
CY62138FLL  
Industrial –40°C to +85°C 4.5V to 5.5V  
in High-Z state  
................–0.5V to 6.0V (V  
CCmax  
Electrical Characteristics (Over the Operating Range)  
45 ns  
Parameter  
Description  
Test Conditions  
Unit  
[3]  
Min  
Typ  
Max  
V
V
V
V
I
Output HIGH Voltage  
Output LOW Voltage  
Input HIGH Voltage  
Input LOW Voltage  
I
I
= –1.0 mA  
2.4  
V
V
OH  
OL  
IH  
OH  
= 2.1 mA  
0.4  
OL  
V
= 4.5V to 5.5V  
= 4.5V to 5.5V  
2.2  
–0.5  
–1  
V
+ 0.5  
CC  
V
CC  
CC  
V
0.8  
+1  
+1  
18  
V
IL  
Input Leakage Current  
Output Leakage Current  
GND < V < V  
CC  
µA  
µA  
mA  
IX  
I
I
I
GND < V < V , Output Disabled  
–1  
OZ  
O
CC  
V
Operating Supply  
f = f  
= 1/t  
V
= V  
CC(max)  
13  
CC  
CC  
max  
RC  
CC  
Current  
I
= 0 mA  
OUT  
f = 1 MHz  
1.6  
1
2.5  
CMOS levels  
[7]  
I
Automatic CE Power Down CE > V – 0.2V or CE < 0.2V  
5
µA  
SB2  
1
CC  
2
Current CMOS inputs  
V
> V – 0.2V or V < 0.2V,  
CC IN  
IN  
f = 0, V = V  
CC  
CC(max)  
[8]  
Capacitance (For all packages)  
Parameter  
Description  
Input capacitance  
Output capacitance  
Test Conditions  
T = 25°C, f = 1 MHz,  
Max  
10  
Unit  
pF  
C
C
IN  
OUT  
A
V
= V  
CC  
CC(typ)  
10  
pF  
Thermal Resistance [8]  
Parameter  
Description  
Test Conditions  
SOIC  
TSOP II  
Unit  
Θ
Thermal Resistance  
(Junction to Ambient)  
Still air, soldered on a 3 × 4.5 inch  
two-layer printed circuit board  
44.53  
44.16  
°C/W  
JA  
Θ
Thermal Resistance  
(Junction to Case)  
24.05  
11.97  
°C/W  
JC  
Notes  
4.  
V
= –2.0V for pulse durations less than 20 ns.  
IL(min)  
5.  
V
= V +0.75V for pulse durations less than 20ns.  
IH(max)  
CC  
6. Full device AC operation assumes a 100 µs ramp time from 0 to V (min) and 200 µs wait time after V stabilization.  
CC  
CC  
7. Only chip enables (CE and CE ) must be at CMOS level to meet the I / I spec. Other inputs can be left floating.  
SB2 CCDR  
1
2
8. Tested initially and after any design or process changes that may affect these parameters.  
Document #: 001-13194 Rev. *A  
Page 3 of 10  
Download from Www.Somanuals.com. All Manuals Search And Download.  
         
CY62138F MoBL®  
AC Test Loads and Waveforms  
R1  
ALL INPUT PULSES  
90%  
V
CC  
3.0V  
GND  
OUTPUT  
90%  
10%  
10%  
R2  
30 pF  
Rise Time = 1 V/ns  
Fall Time = 1 V/ns  
INCLUDING  
JIG AND  
SCOPE  
Equivalent to:  
THEVENIN EQUIVALENT  
R
TH  
OUTPUT  
V
Parameters  
5.0V  
1800  
990  
Unit  
R1  
R2  
R
639  
TH  
TH  
V
1.77  
V
Data Retention Characteristics (Over the Operating Range)  
[3]  
Parameter  
Description  
Conditions  
Min  
Typ  
Max  
Unit  
V
V
I
V
for Data Retention  
2.0  
DR  
CC  
Data Retention Current  
V
V
= V , CE > V 0.2V or CE < 0.2V,  
1
5
µA  
CCDR  
CC  
IN  
DR  
1
CC  
2
> V - 0.2V or V < 0.2V  
CC  
IN  
t
t
Chip Deselect to Data  
Retention Time  
0
ns  
ns  
CDR  
R
Operation Recovery Time  
t
RC  
Data Retention Waveform [10]  
DATA RETENTION MODE  
> 2.0V  
V
V
V
CC(min)  
CC(min)  
VCC  
CE  
DR  
t
t
R
CDR  
Notes:  
9. Full device AC operation requires linear V ramp from V to V  
> 100 µs or stable at V  
> 100 µs.  
CC  
DR  
CC(min)  
CC(min)  
10. CE is the logical combination of CE and CE . When CE is LOW and CE is HIGH, CE is LOW; when CE is HIGH or CE is LOW, CE is HIGH.  
1
2
1
2
1
2
Document #: 001-13194 Rev. *A  
Page 4 of 10  
Download from Www.Somanuals.com. All Manuals Search And Download.  
     
CY62138F MoBL®  
Switching Characteristics (Over the Operating Range)  
45 ns  
Parameter  
Read Cycle  
Description  
Unit  
Min  
45  
Max  
t
t
t
t
t
t
t
t
t
t
t
Read Cycle Time  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
RC  
Address to Data Valid  
45  
AA  
Data Hold from Address Change  
10  
OHA  
ACE  
DOE  
LZOE  
HZOE  
LZCE  
HZCE  
PU  
45  
22  
CE LOW and CE HIGH to Data Valid  
1
2
OE LOW to Data Valid  
OE LOW to Low-Z  
5
10  
0
OE HIGH to High-Z  
18  
18  
45  
CE LOW and CE HIGH to Low Z  
1
2
CE HIGH or CE LOW to High-Z  
1
2
to power up  
CE LOW and CE HIGH  
1
2
to power down  
CE HIGH or CE LOW  
PD  
1
2
Write Cycle  
t
t
t
t
t
t
t
t
t
t
Write Cycle Time  
45  
35  
35  
0
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
WC  
to Write End  
CE LOW and CE HIGH  
SCE  
AW  
1
2
Address Setup to Write End  
Address Hold from Write End  
Address Setup to Write Start  
WE Pulse Width  
HA  
0
SA  
35  
25  
0
PWE  
SD  
Data Setup to Write end  
Data Hold from Write End  
HD  
WE LOW to High-Z  
18  
HZWE  
LZWE  
WE HIGH to Low-Z  
10  
Notes  
11. Test conditions for all parameters other than tri-state parameters assume signal transition time of 3 ns (1V/ns) or less, timing reference levels of V  
/2, input  
CC(typ)  
pulse levels of 0 to V  
, and output loading of the specified I /I as shown in the AC Test Loads and Waveforms on page 4.  
CC(typ)  
OL OH  
12. At any given temperature and voltage condition, t  
is less than t  
, t  
is less than t  
, and t  
is less than t  
for any given device.  
HZCE  
LZCE HZOE  
LZOE  
HZWE  
LZWE  
13. t  
, t  
, and t  
transitions are measured when the outputs enter a high impedance state.  
HZOE HZCE  
HZWE  
14. The internal write time of the memory is defined by the overlap of WE, CE = V , and CE = V . All signals must be ACTIVE to initiate a write and any of these  
1
IL  
2
IH  
signals can terminate a write by going INACTIVE. The data input setup and hold timing must be referenced to the edge of the signal that terminates the write.  
Document #: 001-13194 Rev. *A  
Page 5 of 10  
Download from Www.Somanuals.com. All Manuals Search And Download.  
       
CY62138F MoBL®  
Switching Waveforms  
Read Cycle 1 (Address transition controlled)  
tRC  
ADDRESS  
t
AA  
t
OHA  
DATA OUT  
PREVIOUS DATA VALID  
DATA VALID  
[10, 16, 17]  
Read Cycle No. 2 (OE controlled)  
ADDRESS  
t
RC  
CE  
OE  
t
ACE  
t
HZOE  
t
DOE  
t
HZCE  
t
LZOE  
HIGH  
IMPEDANCE  
HIGH IMPEDANCE  
DATA VALID  
DATA OUT  
t
LZCE  
t
PD  
ICC  
t
V
CC  
PU  
50%  
SUPPLY  
CURRENT  
50%  
ISB  
Write Cycle No. 1 (WE controlled)  
t
WC  
ADDRESS  
CE  
t
SCE  
t
t
HA  
AW  
t
SA  
t
PWE  
WE  
OE  
t
t
SD  
HD  
DATA IO  
NOTE  
DATA VALID  
t
HZOE  
Notes:  
15. The device is continuously selected. OE, CE = V , CE = V  
.
1
IL  
2
IH  
16. WE is HIGH for read cycle.  
17. Address valid before or similar to CE transition LOW and CE transition HIGH.  
1
2
18. Data IO is high impedance if OE = V  
.
IH  
19. If CE goes HIGH or CE goes LOW simultaneously with WE HIGH, the output remains in high impedance state.  
1
2
20. During this period, the IOs are in output state. Do not apply input signals.  
Document #: 001-13194 Rev. *A  
Page 6 of 10  
Download from Www.Somanuals.com. All Manuals Search And Download.  
           
CY62138F MoBL®  
Switching Waveforms (continued)  
Write Cycle No. 2 (CE1 or CE2 controlled)  
t
WC  
ADDRESS  
CE  
t
SCE  
t
SA  
t
t
AW  
HA  
t
PWE  
WE  
t
t
HD  
SD  
DATA IO  
DATA VALID  
Write Cycle No. 3 (WE controlled, OE LOW)  
t
WC  
ADDRESS  
CE  
t
SCE  
t
t
HA  
AW  
t
SA  
t
PWE  
WE  
t
t
HD  
SD  
NOTE  
DATA VALID  
DATA IO  
t
t
LZWE  
HZWE  
Truth Table  
CE  
H
L
WE  
OE  
X
Inputs/Outputs  
Mode  
Power  
Standby (I  
X
H
L
High Z  
Deselect/Power Down  
)
SB  
L
Data Out  
Data In  
High Z  
Read  
Write  
Active (I  
Active (I  
Active (I  
)
CC  
L
X
)
CC  
L
H
H
Selected, Outputs Disabled  
)
CC  
Ordering Information  
Speed  
Package  
Diagram  
Operating  
Range  
Package Type  
(ns)  
Ordering Code  
CY62138FLL-45SXI  
CY62138FLL-45ZSXI  
45  
51-85081 32-pin Small Outline Integrated Circuit (Pb-free)  
51-85095 32-pin Thin Small Outline Package II (Pb-free)  
Industrial  
Contact your local Cypress sales representative for availability of these parts.  
Document #: 001-13194 Rev. *A  
Page 7 of 10  
Download from Www.Somanuals.com. All Manuals Search And Download.  
CY62138F MoBL®  
Package Diagrams  
Figure 1. 32-pin (450 Mil) Molded SOIC, 51-85081  
16  
1
0.546[13.868]  
0.566[14.376]  
0.440[11.176]  
0.450[11.430]  
17  
32  
0.793[20.142]  
0.817[20.751]  
0.006[0.152]  
0.012[0.304]  
0.101[2.565]  
0.111[2.819]  
0.118[2.997]  
MAX.  
0.004[0.102]  
0.047[1.193]  
0.063[1.600]  
0.004[0.102]  
0.050[1.270]  
0.023[0.584]  
0.039[0.990]  
MIN.  
BSC.  
0.014[0.355]  
0.020[0.508]  
51-85081-*B  
SEATING PLANE  
Document #: 001-13194 Rev. *A  
Page 8 of 10  
Download from Www.Somanuals.com. All Manuals Search And Download.  
CY62138F MoBL®  
Package Diagrams (continued)  
Figure 2. 32-Pin TSOP II, 51-85095  
51-85095-**  
MoBL is a registered trademark, and More Battery Life is a trademark, of Cypress Semiconductor. All product and company names  
mentioned in this document may be the trademarks of their respective holders.  
Document #: 001-13194 Rev. *A  
Page 9 of 10  
© Cypress Semiconductor Corporation, 2007. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use  
of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be  
used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its  
products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress  
products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.  
Download from Www.Somanuals.com. All Manuals Search And Download.  
CY62138F MoBL®  
Document History Page  
®
Document Title: CY62138F MoBL 2-Mbit (256K x 8) Static RAM  
Document Number: 001-13194  
Orig. of  
REV.  
ECN NO. Issue Date  
Change  
Description of Change  
New Data Sheet  
**  
797956  
940341  
See ECN  
See ECN  
VKN  
*A  
VKN  
Added footnote #7 related to I  
and I  
SB2 CCDR  
Document #: 001-13194 Rev. *A  
Page 10 of 10  
Download from Www.Somanuals.com. All Manuals Search And Download.  

Curtis MP3 Docking Station IP1002MUK User Manual
Dixon Lawn Mower 1857 0599 User Manual
Dixon Lawn Mower 14186 0303 User Manual
D Link Network Router DWL 922 User Manual
Dynex CRT Television DX R24TV User Manual
EverFocus Security Camera EQ610 User Manual
Fisher Price Baby Accessories M7932 User Manual
Fisher Price Clock C5218 User Manual
Gardena Water Pump T 380 User Manual
GE Washer 175D1807P283 User Manual