Omega Computer Hardware OME A822PG User Manual

Users Guide  
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OME-A822PG  
ISA-Bus Multi-Functional Board  
Hardware Manual  
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OME-A-822PGH/PGL  
Enhanced Multi-Function Card  
Hardware Manual  
OME-A-822PGL/PGH Hardware Manual ---- 1  
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Tables of Contents  
OME-A-822PGL/PGH Hardware Manual ---- 2  
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OME-A-822PGL/PGH Hardware Manual ---- 3  
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1. Introduction  
1.1 General Description  
The OME-A-822PGL/PGH is a high performance, multifunction analog, digital I/O  
board for PC AT compatible computers. The OME-A-822PGL provides low gain (0.5,1, 2, 4,  
8). The OME-A-822PGH provides high gain (0.5,1,5,10,50,100,500,1000). The  
OME-A-822PGL/PGH contains a 12-bit ADC with up to 16 single-ended or 8 differential  
analog inputs. The maximum sample rate of the A/D converter is 100Ksample/sec. There are  
two 12-bit DACs with voltage output, 16 channels of TTL-compatible digital input, 16  
channels of TTL-compatible digital output and one 16-bit counter/timer channel for timing  
input and output.  
The following A/D performance bench marks were achieved on a 33MHz 486  
computer:  
z Polling mode  
z Interrupt mode  
z DMA mode  
: about 100Ksample/sec (with single-task OS)  
: about 60Ksample/sec (with single-task OS)  
: about 100Ksample/sec (with single-task OS)  
1.2 Features  
z
z
z
z
z
z
z
z
z
z
z
z
The maximum sample rate of the A/D converter is 100 K samples/sec  
Software selectable input ranges  
PC AT compatible ISA bus  
A/D trigger mode : software trigger , pacer trigger, external trigger  
16 single-ended or 8 differential analog input signals  
Programmable high gain : 0.5,1,5,10,50,100,500,1000 (OME-A-822PGH)  
Programmable low gain : 0.5,1,2,4,8 (OME-A-822PGL)  
2 channel 12-bit D/A voltage output  
16 digital input /16 digital output (TTL compatible)  
Interrupt handling  
Bipolar/Unipolar operation  
1 channel general purpose programmable 16 bit timer/counter  
OME-A-822PGL/PGH Hardware Manual ---- 4  
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1.3 Specifications  
1.3.1 Power Consumption :  
z +5V @960 mA maximum, OME-A-822PGL/PGH  
z Operating temperature : -20°C to 60°C  
1.3.2 Analog Inputs  
z Channels : 16 single-ended or 8 differential  
z Input range : (software programmable)  
OME-A-822PGL:bipolar  
unipolar : 0 to 10V, 0 to 5V, 0 to 0.2.5V, 0 to 1.25.V  
OME-A-822PGH:bipolar : ±10,±5V,±1V, ±0.5V, ±0.1V, ±0.05V, ±0.01V, ± 0.005V  
unipolar : 0 to 10V, 0 to 1V, 0 to 0.1V, 0 to 0.01V  
Input current : 250 nA max (125 nA typical ) at 25 deg. C  
: ±10V,±5V, ±2.5V, ±1.25V, ±0.0625V  
z
z
z
z
On chip sample and hold  
Caution: refer to  
Sec. 2.9 first  
Over voltage : continuous single channel to 70Vp-p  
Input impedance : 1010 // 6pF  
1.3.3 A/D Converter  
z
Type : successive approximation , Burr Brown ADS 774 or SIPEX-SP774B  
( equivalent)  
z Conversion time : 8 microsec.  
z Accuracy : +/- 1 bit  
z Resolution : 12 bits  
OME-A-822PGL/PGH Hardware Manual ---- 5  
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1.3.4 DA Converter  
z Channels : 2 independent  
z type : 12 bit multiplying , Analog device AD-7541  
z Linearity : +/- 1/2 bit  
z Output range : 0 to 5V or 0 to 10V jumper selected , may be used with other  
AC or DC reference input. Maximum output limit +/- 10V  
z Output drive : +/- 5mA  
z settling time : 0.6 microseconds to 0.01% for full scale step  
1.3.5 Digital I/O  
z Output port  
: 16 bits, TTL compatible  
Output Low: VOL=05.Vmax @IOL = 8 mA max  
Output High: VOH = 2.7Vmin @IOH = -400µA max  
z Input port  
: 16 bits, TTL compatible  
Input Low: VIL=0.8V max; IIL = -0.4mA max  
Input High: VIH=2.0V min; IIL = 20µA max  
1.3.6 Interrupt Channel  
z Level : 3,4,5,6,7,10,11,12,14,15, jumper selectable  
z Enable : Via control register  
OME-A-822PGL/PGH Hardware Manual ---- 6  
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1.3.7 Programmable Timer/Counter  
z Type : 82C54 -8 programmable timer/counter  
z
Counters : Counter1 and counter2 are cascaded as a 32 bit pacer timer.  
Counter0 is a user available timer/counter. The software driver also uses  
counter0 to implement a machine independent timer.  
z Clock input frequency : DC to 10 MHz  
z Pacer output : 0.00047Hz to 0.5MHz  
z Input ,gate : TTL compatible  
z Internal Clock : 2 MHz  
1.3.8 Direct Memory Access Channel (DMA)  
z Level : CH1 or CH3, jumper selectable  
z Enable : via DMA bit of control register  
z Termination : by interrupt on T/C  
z Transfer rate : 100K conversions/sec.  
OME-A-822PGL/PGH Hardware Manual ---- 7  
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1.4 Applications  
z Signal analysis  
z FFT & frequency analysis  
z Transient analysis  
z Production testing  
z Process control  
z Vibration analysis  
z Energy management  
z Industrial and laboratory. measurement and control  
1.5 Product Check List  
The OME-A-8322PGL/PGH includes the following items:  
z OME-A-822PGL/PGH multifunction card  
z OME-A-822PGL/PGH CD ROM  
Attention !  
If any of these items are missing or damaged, please contact our  
customer service department. Save the shipping materials and carton  
in case you want to ship or store the product in the future.  
OME-A-822PGL/PGH Hardware Manual ---- 8  
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2. Hardware Configuration  
2.1 Board Layout  
OME-A-822PGL/PGH Hardware Manual ---- 9  
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2.2 I/O Base Address Setting  
The OME-A-822PGL/PGH occupies 16 consecutive locations in I/O address  
space. The base address is set by DIP switch SW1. The default address is  
0x220.  
A9  
A8  
A7  
A6  
A5  
A4  
ON  
1
2
3
4
5
6
SW1 : BASE ADDRESS  
BASE  
A9  
A8  
A7  
A6  
A5  
A4  
ADDR  
200-20F  
210-21F  
OFF  
OFF  
ON  
ON  
ON  
ON  
:
ON  
ON  
ON  
ON  
:
ON  
ON  
ON  
ON  
:
ON  
ON  
OFF  
OFF  
:
ON  
OFF  
ON  
OFF  
:
220-22F(;) OFF  
230-23F  
OFF  
:
:
300-30F  
:
OFF  
:
OFF  
:
ON  
:
ON  
:
ON  
:
ON  
:
3F0-3FF  
OFF  
OFF  
OFF  
OFF  
OFF  
(;) : default base address is 0x220  
OME-A-822PGL/PGH Hardware Manual ---- 10  
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The PC I/O port map is given below.  
ADDRESS Device  
ADDRESS DEVICE  
000-1FF  
200-20F  
210-21F  
238-23F  
278-27F  
2B0-2DF  
2E0-2E7  
2E8-2EF  
2F8-2FF  
300-31F  
PC reserved  
320-32F  
378-37F  
380-38F  
XT Hard Disk  
Game/control  
Parallel Printer  
SDLC  
XT Expansion Unit  
Bus Mouse/Alt. Bus Mouse 3A0-3AF  
SDLC  
Parallel Printer  
EGA  
3B0-3BF  
3C0-3CF  
3D0-3DF  
3E8-3EF  
3F0-3F7  
3F8-3FF  
MDA/Parallel Printer  
EGA  
AT GPIB  
CGA  
Serial Port  
Serial Port  
Prototype Card  
Serial Port  
Floppy Disk  
Serial Port  
2.3 Jumper Settings  
2.3.1 JP1 : D/A Internal Reference Voltage  
Selection  
(-10V)  
(-10V)  
Reference  
Voltage  
-5V  
Reference  
Voltage  
-10V  
1
2
3
1
2
3
(default)  
(-5V)  
(-5V)  
Select (-5V) : D/A voltage output = 0 to 5V (both channel)  
Select (-10V) : D/A voltage output = 0 to 10V (both channel)  
JP1 is valid only if JP2 is set to D/A internal reference voltage  
OME-A-822PGL/PGH Hardware Manual ---- 11  
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2.3.2 JP2 : D/A Int/Ext Ref Voltage Selection  
JP2(vref)  
JP2(vref)  
Ch 1 = INT  
Ch 2 = INT  
(default)  
Ch 1 =EXT  
(ExtRef1)  
Ch 2 =EXT  
(ExtRef2)  
JP2(vref)  
JP2(vref)  
Ch 1 = INT  
Ch 2 =EXT  
(ExtRef2)  
Ch 1 =EXT  
(ExtRef1)  
Ch 2 = INT  
If JP2 is set to internal reference, then JP1 should be set to -5V or -10V internal reference  
voltage.  
If JP2 is set to external reference, then ExtRef1, CN3 pin 31, is the external reference  
voltage for D/A channel 1. and ExtRef2, CN3 pin 12, is the external reference voltage for  
D/A Channel 2.  
2.3.3 JP3 : Single-ended/Differential Selection  
SINGLE  
Single-ended  
(default)  
SINGLE  
Differential  
DIFF  
DIFF  
The OME-A-822PGL/PGH offers 16 single-ended or 8 differential analog input channels.  
The JP3 jumper sets the inputs to single-ended or differential mode. You can not select  
single-ended and differential simultaneously.  
Refer to Sec. 2.9 first.  
OME-A-822PGL/PGH Hardware Manual ---- 12  
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2.3.4 JP4 : A/D Trigger Source Selection  
INTTRG  
Internal  
Trigger  
(default)  
INTTRG  
External  
Trigger  
EXTTRG  
EXTTRG  
The OME-A-822PGL/PGH supports two trigger types, internal trigger and  
external trigger. The external trigger comes from ExtTrg, CN3 pin 17.  
There are two types of internal triggers, software trigger and pacer trigger.  
More detailed information is given in section 2.4.8.  
2.3.5 JP5 : Interrupt Level Selection  
NO Interrupt  
IRQ  
3
4
5
6 7 9 10 11 12 14 15 NC  
Interrupt 15  
(default)  
IRQ  
3
4
5
6 7 9 10 11 12 14 15 NC  
The interrupt channel can not be shared. The OME-A-822 software driver can support  
8 different cards in one system but only 2 of these cards can use the interrupt transfer  
function.  
OME-A-822PGL/PGH Hardware Manual ---- 13  
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2.3.6 JP6 : User Timer/Counter Clock Input  
Selection  
INTCLK  
Internal 2M  
Clock  
INTCLK  
External  
Clock  
(default)  
EXTCLK  
EXTCLK  
The OME-A-822PGL/PGH has 3 independent 16 bit timer/counters.  
The cascaded counter1 and counter2 are used as a pacer timer. Counter0 can  
be used as a user programmable timer/counter. The user programmable  
timer/counter can be set to 2M internal clock or external clock ExtCLK,  
CN3 pin 37. The block diagram is given in section 2.6. The clock source must  
be very stable. Using the 2M internal clock is strongly suggested.  
The OME-A-822PGL/PGH software driver uses counter0 as a machine  
independent timer. If users program calls the A-822_Delay() subroutine,  
counter0 will be programmed as a machine independent timer. More detailed  
information is provided in section 2.6.  
NOTE : if you use A-822_Delay(), the JP6 jumper must  
be set to internal 2M clock.  
OME-A-822PGL/PGH Hardware Manual ---- 14  
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2.3.7 JP7 : DMA DACK Selection,  
JP8 : DMA DRQ Selection  
DRQ  
NO DMA  
DACK  
1
5
2
6
1
5
2
6
JP7  
JP8  
DRQ  
DMA 1  
DACK  
1
5
2
6
(default)  
1
5
2
6
JP7  
DRQ  
JP7  
JP8  
DACK  
JP8  
DMA 3  
1
5
2
6
1
5
2
6
The DMA channel can not shared. The OME-A-822 software driver can support 8  
different boards in one PC based system, but only two of these boards can use the DMA  
transfer function.  
OME-A-822PGL/PGH Hardware Manual ---- 15  
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2.4 I/O Register Address  
The OME-A-822PGL/PGH occupies 16 consecutive PC I/O addresses. The  
following table lists the registers and their locations.  
Address  
Base+0  
Base+1  
Base+2  
Base+3  
Base+4  
Base+5  
Base+6  
Base+7  
Base+8  
Base+9  
Base+A  
Base+B  
Base+C  
Base+D  
Base+E  
Base+F  
Read  
Write  
8254 Counter 0  
8254 Counter 1  
8254 Counter 2  
Reserved  
8254 Counter 0  
8254 Counter 1  
8254 Counter 2  
8254 Counter Control  
D/A Channel 0 Low Byte  
D/A Channel 0 High Byte  
D/A Channel 1 Low Byte  
D/A Channel 1 High Byte  
A/D Clear Interrupt Request  
A/D Gain Control  
A/D Multiplexer Control  
A/D Mode Control  
A/D Software Trigger Control  
DO Low Byte  
A/D Low Byte  
A/D High Byte  
DI Low Byte  
DI High Byte  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
DO High Byte  
Reserved  
Reserved  
OME-A-822PGL/PGH Hardware Manual ---- 16  
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2.4.1 8254 Counter  
The 8254 Programmable timer/counter has 4 registers from Base+0 through  
Base+3. For detailed programming information on the 8254 , please refer to  
Intel‘s “Microsystem Components Handbook”.  
Address  
Base+0  
Base+1  
Base+2  
Base+3  
Read  
Write  
8254 Counter 0  
8254 Counter 1  
8254 Counter 2  
Reserved  
8254 Counter 0  
8254 Counter 1  
8254 Counter 2  
8254 Counter Control  
2.4.2 A/D Input Buffer Register  
(READ) Base+4 : A/D Low Byte Data Format  
Bit 7  
D7  
Bit 6  
D6  
Bit 5  
D5  
Bit 4  
D4  
Bit 3  
D3  
Bit 2  
D2  
Bit 1  
D1  
Bit 0  
D0  
(READ) Base+5 : A/D High Byte Data Format  
Bit 7  
0
Bit 6  
0
Bit 5  
0
Bit 4  
Bit 3  
Bit 2  
D10  
Bit 1  
D9  
Bit 0  
D8  
READY D11  
A/D 12 bit data : D11…..D0, D11=MSB, D0=LSB  
READY =1 : A/D 12 bit data not ready  
=0 : A/D 12 bit data is ready  
The low 8 bit A/D data is stored in address BASE+4 and the high 4 bit data is stored in  
address BASE+5. The READY bit is used as an indicator for the A/D conversion. When an  
A/D conversion is completed, the READY bit will clear to zero.  
OME-A-822PGL/PGH Hardware Manual ---- 17  
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2.4.3 D/A Output Latch Register  
(WRITE) Base+4 : Channel 1 D/A Low Byte Data Format  
Bit 7  
D7  
Bit 6  
D6  
Bit 5  
D5  
Bit 4  
D4  
Bit 3  
D3  
Bit 2  
D2  
Bit 1  
D1  
Bit 0  
D0  
(WRITE) Base+5 :Channel 1 D/A High Byte Data Format  
Bit 7  
X
Bit 6  
X
Bit 5  
X
Bit 4  
X
Bit 3  
D11  
Bit 2  
D10  
Bit 1  
D9  
Bit 0  
D8  
(WRITE) Base+6 : Channel 2 D/A Low Byte Data Format  
Bit 7  
D7  
Bit 6  
D6  
Bit 5  
D5  
Bit 4  
D4  
Bit 3  
D3  
Bit 2  
D2  
Bit 1  
D1  
Bit 0  
D0  
(WRITE) Base+7 :Channel 2 D/A High Byte Data Format  
Bit 7  
X
Bit 6  
X
Bit 5  
X
Bit 4  
X
Bit 3  
D11  
Bit 2  
D10  
Bit 1  
D9  
Bit 0  
D8  
D/A 12 bit output data: D11..D0, D11=MSB, D0=LSB, X=don‘t care  
The D/A converter will convert the 12 bit digital data to an analog output. The lower 8 bits  
of D/A channel 1 are stored in the address BASE+4 and the high 4 bits are stored in the  
address BASE+5. The address BASE+6 and BASE+7 store the 12 bit data for D/A channel  
2. The D/A output latch registers are designed with a “double buffered” structure, so the  
analog output latch registers will not update until the high 4 bit digital data are written. If the  
user sends the high 4 bit data first, the D/A 12 bit output latch registers will update at once.  
So the lower 8 bits will be the previous data latched in the register. This action will cause  
an error on the D/A output voltage. The user must send the low 8 bits first and then  
send the high 4 bits to update the 12 bit D/A output latch register.  
NOTE : Send the low 8 bits first, then send the high 4 bits.  
OME-A-822PGL/PGH Hardware Manual ---- 18  
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2.4.4 D/I Input Buffer Register  
(READ) Base+6 : D/I Input Buffer Low Byte Data Format  
Bit 7  
D7  
Bit 6  
D6  
Bit 5  
D5  
Bit 4  
D4  
Bit 3  
D3  
Bit 2  
D2  
Bit 1  
D1  
Bit 0  
D0  
(READ) Base+7 : D/I Input Buffer High Byte Data Format  
Bit 7  
D15  
Bit 6  
D14  
Bit 5  
D13  
Bit 4  
D12  
Bit 3  
D11  
Bit 2  
D10  
Bit 1  
D9  
Bit 0  
D8  
D/I 16 bits input data : D15..D0, D15=MSB, D0=LSB  
The OME-A-822PGL/PGH provides 16 TTL compatible digital inputs. The low 8 bits are  
stored in the address BASE+6. The high 8 bits are stored in address BASE+7.  
2.4.5 Clear Interrupt Request  
(WRITE) Base+8 : Clear Interrupt Request Format  
Bit 7  
X
Bit 6  
X
Bit 5  
X
Bit 4  
X
Bit 3  
X
Bit 2  
X
Bit 1  
X
Bit 0  
X
X=don‘t care, XXXXXXXX=any 8 bits data is validate  
If the OME-A-822PGL/PGH is used in the interrupt transfer mode, an on-board hardware  
status bit will be set after each A/D conversion. This bit must be cleared by software before  
the next hardware interrupt. Writing any value to address BASE+8 will clear this hardware  
bit and the hardware will generate another interrupt when next A/D conversion is completed.  
OME-A-822PGL/PGH Hardware Manual ---- 19  
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2.4.6 A/D Gain Control Register  
(WRITE) Base+9 : A/D Gain Control Register Format  
Bit 7  
X
Bit 6  
X
Bit 5  
X
Bit 4  
X
Bit 3  
Bit 2  
Bit 1  
Bit 0  
GAIN3 GAIN2 GAIN1 GAIN0  
The only difference between the OME-A-822PGL and OME-A-822PGH is the GAIN  
control function. The OME-A-822PGL provides gains of 1/2/4/8 and the  
OME-A-822PGH provides gains of 1/10/100/1000. The gain control register control the  
gain of the A/D input signal. Bipolar/Unipolar will affect the gain factor.  
It is important to select the correct gain-control-code according to Bipolar/Unipolar input.  
NOTE : If the gain control code is changed, the hardware needs an extra delay for  
the gain settling time. The gain settling time is different for the different gain control codes.  
The software driver does not take care the gain settling time, so the user needs to add  
the delay . If the application program will run on different machines, the user needs to  
implement a machine independent timer. The software driver, A-822_delay(), is designed for  
this purpose. If this subroutine is used, then counter2 as described in sec 2.6 is reserved by  
the software driver to implement the machine independent timer.  
OME-A-822PGL GAIN CONTROL CODE TABLE  
BI/UNI Settling Time GAIN Input Range GAIN3 GAIN2 GAIN1 GAIN0  
BI  
23 us  
23 us  
25 us  
28 us  
23 us  
23 us  
25 us  
28 us  
23 us  
1
+/- 5V  
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
BI  
2
+/- 2.5V  
BI  
4
+/- 1.25V  
+/- 0.0625V  
0V to 10V  
0V to 5V  
0V to 2.5V  
BI  
8
UNI  
UNI  
UNI  
UNI  
BI  
1
2
4
8
0V to 1.25V 0  
+/- 10V  
0.5  
1
BI=Bipolar, UNI=Unipolar, X=don‘t care, N/A=not available  
OME-A-822PGL/PGH Hardware Manual ---- 20  
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OME-A-822PGH GAIN CONTROL CODE TABLE  
BI/UN Settling Time GAIN Input Range  
GAIN3 GAIN2 GAIN1 GAIN0  
BI  
23 us  
1
+/- 5V  
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
BI  
28 us  
10  
+/- 0.5V  
+/- 0.05V  
+/- 0.005V  
0 to 10V  
0 to 1V  
BI  
140 us  
1300 us  
23 us  
100  
1000  
1
BI  
UNI  
UNI  
UNI  
UNI  
BI  
28 us  
10  
140 us  
1300 us  
23 us  
100  
1000  
0.5  
5
0 to 0.1V  
0 to 0.01V  
+/- 10V  
BI  
28 us  
+/- 1V  
BI  
140 us  
1300 us  
50  
+/- 0.1V  
+/- 0.01V  
BI  
500  
BI=Bipolar, UNI=Unipolar, X=don‘t care, N/A=not available  
2.4.7 A/D Multiplex Control Register  
(WRITE) Base+A : A/D Multilexer Control Register Format  
Bit 7  
X
Bit 6  
X
Bit 5  
X
Bit 4  
X
Bit 3  
D3  
Bit 2  
D2  
Bit 1  
D1  
Bit 0  
D0  
A/D input channel selection data = 4 bits : D3..D0, D3=MSB, D0=LSB, X=don‘t care  
Single-ended mode : D3..D0  
Differential mode : D2..D0, D3=don’t care  
The OME-A-822PGL/PGH provides 16 single-ended or 8 differential analog input signals.  
In single-ended mode, D3..D0 selects the active channel. In differential mode, D2..D0 selects  
the active channel and (D3 has no affect).  
NOTE: The settling time of the multiplexer depends on the resistance.of the input  
sources.  
source resistance = about 0.1K ohm Æ settling time = about 3 us.  
source resistance = about 1K ohm  
Æ settling time = about 5 us.  
source resistance = about 10K ohm Æ settling time = about 10 us.  
source resistance = about 100K ohm Æ settling time = about 100 us.  
OME-A-822PGL/PGH Hardware Manual ---- 21  
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2.4.8 A/D Mode Control Register  
(WRITE) Base+B : A/D Mode Control Register Format  
Bit 7  
X
Bit 6  
X
Bit 5  
X
Bit 4  
X
Bit 3  
X
Bit 2  
D2  
Bit 1  
D1  
Bit 0  
D0  
X=don‘t care  
JP4 Select Internal Trigger  
Mode Select Trigger Type  
Transfer Type  
D2 D1 D0 Software Trig Pacer Trig  
Software Interrupt DMA  
0
0
0
1
0
0
1
1
0
1
0
0
X
X
X
X
X
Select  
X
X
Select  
X
X
X
Select  
Select  
X
Select  
X
X
Select  
Select  
X=disable  
JP4 Select External Trigger  
Mode Select Trigger Type  
Transfer Type  
Software Interrupt DMA  
D2 D1 D0 External Trigger  
0
0
0
1
0
0
1
1
0
1
0
0
X
X
X
X
X
X
X
X
Select  
Select  
X
X
Select  
X
Select  
Select  
The A/D conversion can be divided into 2 stages, trigger stage and transfer stage. The  
trigger stage will generate a trigger signal to the A/D converter and the transfer stage will  
transfer the result to the CPU.  
The trigger method may be internal trigger or external trigger. The internal trigger can  
be software trigger or pacer trigger. The software trigger is simple to use but does not  
control the sampling rate very precisely. In the software trigger mode, the program issues  
a software trigger command (sec 2.4.9) to initiate the A/D conversion. The program then  
must poll the A/D status bit until the ready bit is 0(sec 2.4.2).  
The pacer trigger can control the sample rate very precisely. In the pacer trigger  
mode, the pacer timer (sec 2.6) will generate periodic trigger signals to the A/D converter.  
The converted data can be transferred to the CPU by polling or interrupt or by DMA transfer.  
OME-A-822PGL/PGH Hardware Manual ---- 22  
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The software driver provides three data transfer methods, polling, interrupt and DMA.  
The polling subroutine, A-822_AD_PollingVar() or A-822_AD_PollingArray(), set the A/D  
mode control register to 0x01. This control word enables software trigger and polling  
transfer. The interrupt subroutine, A-822_AD_INT_START(…), sets the A/D mode control  
mode register to ox06. This control word enables pacer trigger and interrupt transfer. The  
DMA subroutine, A-822_AD_DMA_START(…), sets the A/D mode control register to  
0x02. This control word means pacer trigger and DMA transfer.  
Please refer to sec. 2.7 for detailed information.  
2.4.9 A/D Software Trigger Control Register  
(WRITE) Base+C : A/D Software Trigger Control Register  
Bit 7  
X
Bit 6  
X
Bit 5  
X
Bit 4  
X
Bit 3  
X
Bit 2  
X
Bit 1  
X
Bit 0  
X
X=don‘t care, XXXXXXXX=any 8 bits data is validate  
The A/D converter can be triggered by software trigger or pacer trigger. The details  
are given in sec. 2.4.8 and sec. 2.7. Writing any value to address BASE+C will generate a  
trigger pulse to the A/D converter and initiate an A/D conversion. The address BASE+5  
offers a ready bit to indicate an A/D conversion is completed.  
The software driver uses this control word to detect the OME-A-822PGL/PGH  
hardware board. The software initiates a software trigger and checks the ready bit . If the  
ready bit can not cleared to zero in a fixed time, the software driver will return a error  
message. If there is an I/O BASE address error, the ready bit will not be cleared to zero. The  
software driver, A-822_CheckAddress(), uses this method to detect the I/O BASE address  
setting  
OME-A-822PGL/PGH Hardware Manual ---- 23  
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2.4.10 D/O Output Latch Register  
(WRITE) Base+D : D/O Output Latch Low Byte Data Format  
Bit 7  
D7  
Bit 6  
D6  
Bit 5  
D5  
Bit 4  
D4  
Bit 3  
D3  
Bit 2  
D2  
Bit 1  
D1  
Bit 0  
D0  
(WRITE) Base+E : D/O Output Latch High Byte Data Format  
Bit 7  
D15  
Bit 6  
D14  
Bit 5  
D13  
Bit 4  
D12  
Bit 3  
D11  
Bit 2  
D10  
Bit 1  
D9  
Bit 0  
D8  
D/O 16 bits output data : D15..D0, D15=MSB, D0=LSB  
The OME-A-822PGL/PGH provides 16 TTL compatible digital outputs. The lower 8 bits are  
stored in address BASE+D. The high 8 bits are stored in address BASE+E  
OME-A-822PGL/PGH Hardware Manual ---- 24  
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2.5 Digital I/O  
The OME-A-822PGL/PGH provides 16 digital input channels and 16  
digital output channels. All levels are TTL compatible. The connection  
diagram and block diagram are given below:  
Output Latch Register  
Base+D  
D0..D7  
Latch  
CN2  
D0..D7  
TTL  
1..8  
DI  
DGND  
Reset  
Power on  
reset  
17..18  
DGND  
Reset  
9..16  
D8..D15  
Latch  
Base+E  
External  
Device  
Output Latch Register  
OME-A-822PGL/PGH  
OME-A-822PGL/PGH  
Input Buffer Register  
Read  
Base+6  
D0..D7  
CN1  
D0..D7  
TTL  
1..8  
DO  
17..18  
D8..D15  
Read  
DGND  
DGND  
Base+7  
9..16  
Input Buffer Register  
External  
Device  
OME-A-822PGL/PGH Hardware Manual ---- 25  
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2.6 8254 Timer/Counter  
The 8254 Programmable timer/counter has 4 registers from Base+0 through Base+3. For  
detailed programming information about the 8254 , please refer to Intel‘s “Microsystem  
Components Handbook”.The block diagram is shown below.  
VCC  
10K  
CN3.33  
CN3.37  
CN3.16  
Gate  
JP6  
2M  
Cin  
Cout  
Counter 0  
PACER CLK  
CN3.35  
Cin : clock input  
Counter 1  
VCC  
10K  
Cout : clock output  
INTCLK : internal clock  
CN3 : connector CN3  
Cin  
Cout  
Cout  
Gate  
Counter 2  
4M  
2M  
INTCLK  
Cin  
Gate  
CN3.34  
The counter0, counter1 and counter2 are all 16 bit counters. Counter 1 and counter 2 are  
cascaded as a 32 bit timer. This 32 bit timer is used as a pacer timer. The software driver,  
A-822_Delay(), uses counter 0 to implement a machine independent timer for settling  
time delay (sec. 2.4.6 and sec. 2.4.7). If A-822_Delay() is not used, counter0 can be used as  
a general purpose timer/counter.  
NOTE : When using A-822_Delay() to implement a machine  
independent timer, the JP6 jumper must be set to internal 2M  
clock.  
OME-A-822PGL/PGH Hardware Manual ---- 26  
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2.7 A/D Conversion  
This section explains how to perform A/D conversions. The A/D conversion  
can be triggered 3 ways, by software trigger, by pacer trigger or by  
external trigger to the A/D converter. At the end of A/D conversion, it is  
possible to transfer data by 3 ways, those are polling , interrupt and DMA.  
Before using the A/D conversion functions, the user should be aware of the  
following issues:  
z A/D data register BASE+4/BASE+5 stores the A/D conversion data (sec. 2.4.2)  
z A/D gain control register BASE+9 selects the gain (sec. 2.4.6)  
z A/D multiplexer control register BASE+A selects the analog input  
channel (sec. 2.4.7)  
z A/D mode control register BASE+B selects the trigger type and transfer  
type (sec. 2.4.8)  
z A/D software trigger control register is BASE+C (sec. 2.4.9)  
z JP3 selects single-ended or differential input (sec. 2.3.3)  
z JP4 selects internal/external trigger (sec. 2.3.4)  
z JP5 selects the IRQ level (sec. 2.3.5)  
z JP6 selects the internal/external clock for counter0 (sec. 2.3.6)  
z JP7 and JP8 selects the DMA channel (sec. 2.3.7)  
z There are 3 trigger types : software, pacer, external trigger (sec.  
2.4.8)  
z There are 3 transfer types : polling, interrupt, DMA (sec. 2.4.8)  
The block diagram is given below:  
CN3  
16/8 to 1  
Multi-  
Gain  
12 bits  
A/D  
control  
Buffer  
Memory  
CPU  
plexer  
Base+A  
Base+9  
Base+C  
Trigger  
Logic  
Transfer  
Logic  
JP3  
JP4 Base+B  
JP5  
JP7  
JP8  
OME-A-822PGL/PGH  
OME-A-822PGL/PGH Hardware Manual ---- 27  
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2.7.1 A/D conversion flow  
Before using the A/D converter, the user should configure the following hardware settings:  
1. select single-ended or differential input (JP3) (refer to Sec. 2.9 first)  
2. select internal trigger or external trigger (JP4)  
3. select IRQ level if needed (JP5)  
4. select DMA channel if needed (JP7,JP8)  
5. select internal clock or external clock for counter0 if needed (JP6)  
The user must decide which A/D conversion mode will be used. The software driver  
supports three different modes: polling, interrupt and DMA. The polling mode (sec. 2.4.9)  
is the simplest but most limited. The software driver should be used for interrupt or DMA  
mode.  
The analog input signals come from CN3. These signals may be single-ended or  
differential and must match the setting of JP3.  
The multiplexer can select 16 single-ended or 8 differential signals into the gain control  
module. The settling time of multiplexer depends on the source resistance. Because the  
software doesn’t account for the settling time, the user should provide sufficient delay  
when switching channels. (sec. 2.4.7)  
The gain control module also requires settling time if the gain control code is changed.  
Since the software doesn’t account for settling time, the user should provide sufficient  
delay if the gain control code is changed. (sec. 2.4.6)  
The software driver provides a machine independent timer, A-822_Delay(), for settling  
time delay. This subroutine assumes that the JP6 jumper is set to the internal 2M clock and  
uses counter0 to implement a machine independent timer. If A-822_Delay() is used,  
counter0 will be reserved and can not be used as a user programmable timer/counter.  
The A/D converter needs a trigger signal to start an A/D conversion cycle. The  
OME-A-822PGL/PGH supports three trigger modes, software, pacer and external trigger.  
The result of the A/D conversion can be transferred into the PC memory by three modes:  
polling, interrupt and DMA..  
OME-A-822PGL/PGH Hardware Manual ---- 28  
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2.7.2 A/D Conversion Trigger Modes  
OME-A-822PGL/PGH supports three trigger modes.  
1 : Software Trigger :  
Write any value to the A/D software trigger control register, BASE+A, to initiate an  
A/D conversion cycle. This mode is very simple but it is very difficult to achieve a  
precise sample rate.  
2 : Pacer Trigger Mode :  
The block diagram of the pacer timer is shown in section 2.6. The pacer timer can  
provide a very precise sample rate.  
3 : External Trigger Mode :  
When a rising edge of an external trigger signal is applied, an A/D conversion will be  
performed. The external trigger source comes from pin 17 of CN3.  
2.7.3 A/D Transfer Modes  
OME-A-822PGL/PGH supports three transfer modes.  
1 : polling transfer :  
This mode can be used with all trigger modes. More detailed information is given in  
section 2.4.8. The software scans the A/D high byte data register, BASE+5, until  
READY_BIT=0.The low byte data is available in BASE+4.  
2 : interrupt transfer :  
This mode can be used with the pacer trigger or external trigger. More detailed  
information is given in section 2.4.8.The user can set the IRQ level by adjusting jumper  
JP5. A hardware interrupt signal is sent to the PC when an A/D conversion is  
3 : cDoMmAplettreadn.sfer :  
This mode can be used with the pacer trigger or external trigger. More detailed  
information is given in section 2.4.8. The user can set the DMA channel by adjusting  
jumpers JP7 and JP8. Two hardware DMA requests signals are sent sequentially to the  
PC when an A/D conversion is completed. The single mode transfer of the 8237 is  
suggested.  
OME-A-822PGL/PGH Hardware Manual ---- 29  
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2.7.4 Using software trigger and polling transfer  
If the user needs to control the A/D converter without the A-822 software driver, software  
trigger and polling transfer is suggested. The program steps are listed below:  
1. send 0x01 to the A/D mode control register (software trigger + polling transfer)  
(refer to Sec. 2.4.8)  
2. send channel number to the multiplexer control register (refer to Sec. 2.4.7)  
3. send the gain control code value to the gain control register (refer to Sec 2.4.6)  
4. delay the settling time (refer to Sec. 2.4.6 and Sec. 2.4.7)  
5. send any value to the software trigger control register to generate a software trigger  
signal  
(refer to Sec. 2.4.9)  
6. scan the READY bit of the A/D high byte data until READY=0 (refer to Sec. 2.4.2)  
7. read the 12 bit A/D data (refer to Sec. 2.4.2)  
8. convert the 12 bit binary data to a floating point value  
OME-A-822PGL/PGH Hardware Manual ---- 30  
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2.8 D/A Conversion  
The OME-A-822PGL/PGH provides two 12 bit D/A converters. Before  
using the D/A converter function, you should address the following items:  
z D/A output register, BASE+4/BASE+5/BASE+6/BASE+7, (sec. 2.4.3)  
z JP1 jumper set to internal reference voltage -5V or -10V (sec. 2.3.1)  
z JP2 jumper set to internal or external reference voltage (sec. 2.3.2)  
z If JP2 is set to internal and JP1 is set to -5V, the D/A output range is 0 to 5V  
z If JP2 is set to internal and JP1 is set to -10V, the D/A output range is 0 to 10V  
z If JP2 is set to external, the external reference voltage can be AC/DC +/- 10V  
The block diagram is given below:  
CN3  
D/A channel 0  
V0+ V0-  
30  
Base+4/+5  
D0..D7  
Ref  
9,10,14,28,29  
31  
Analog  
Gnd  
-5/-10 V  
Internal  
JP1  
JP2  
Vref0+ Vref0-  
Reference  
Vref1+ Vref1-  
V1+ V1-  
Ref  
12  
32  
Base+6/+7  
D/A channel 1  
OME-A-822PGL/PGH  
NOTE : The D/A output latch registers use a “double buffer” structure. The user must  
send the low byte data first, then send the high byte data. If the user  
only sends the high byte, the low byte data will be the previous value.  
OME-A-822PGL/PGH Hardware Manual ---- 31  
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2.9 Analog Input Signal Connection  
The OME-A-822 can measure signals in the single-ended or differential mode. In the  
differential mode each channel has a unique signal HIGH and signal LOW connection. In the  
single-ended mode all channels have a unique signal HIGH connection but share a common  
LOW or ground connection. Differential connections are very useful for low level signals  
(millivolt), since they better reject electrical noise that can affect the quality of the  
measurement. A differential connection is also necessary when a common ground is  
unacceptable. The benefit of using a single-ended connection is that twice the number of  
channels is available. In general, a single-ended connection is often a good choice when  
working with higher level signals (5V or 10V for example), especially if the signal is coming  
from an isolated device such as a signal conditioner. Several different types of wiring  
diagrams are discussed below.  
Figure 1-A shows a differential connection to a grounded source. If the source is  
grounded, making a second connection to the card’s ground could cause a ground loop  
resulting in erroneous data. It is important to note that the maximum common mode  
voltage between the input source and AGND is 70Vp-p. If the card is connected to a  
source with a common mode voltage greater than 70Vp-p, the input multiplexer will be  
permanently damaged! When measuring common mode voltage, it is best to use an  
oscilloscope rather than a multi-meter.  
Figure 1-B shows a differential connection to a floating source. In such cases a  
connection should be made between the low channel input and analog ground.  
Figure 2 shows connection of multiple sources in single-ended mode. This connection  
assumes creating one common ground will not cause a problem. This is normally the case  
when connecting to devices that are isolated or floating.  
Figure 3 demonstrates how to connect bridge transducers. Bridge transducers include  
strain gauges, load cells and certain type of pressure transducers. The diagram assumes that  
there is a single external power supply providing power to the bridge. Each bridge is  
connected to a differential channel. No connection is made between channel low and  
analog ground. A connection should be made between analog ground and the negative of  
the power supply. An isolated power supply is strongly suggested.  
Figure 4 demonstrates how to connect a 4-20mA current loop. Since the card reads  
voltages, the current is converted to voltage by passing it through a shunt resistor. By Ohms  
law (V=IR), when using a 250resistor, 4 mA will be converted to 1V and 20mA to 5V.  
If the source is linear, the output voltage range will also be linear.  
OME-A-822PGL/PGH Hardware Manual ---- 32  
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Figure 1-A  
If the source is grounded, a second ground connection  
on the card could result in a ground loop.  
Figure 1-B  
OME-A-822PGL/PGH Hardware Manual ---- 33  
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Figure 2  
Figure 3  
OME-A-822PGL/PGH Hardware Manual ---- 34  
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Figure 4  
R is a shunt resistor. A 250shunt resistor converts 4-20mA to 1-5Vdc.  
Signal Shielding  
z The signal shielding is the same for the connections shown in Figure 1 to Figure 4  
z Use a single connection to frame ground (not A.GND or D.GND)  
OME-A-822PGL/PGH  
Vin  
A.GND  
D.GND  
Frame Ground  
OME-A-822PGL/PGH Hardware Manual ---- 35  
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2.10 Using OME-DB-8225 CJC Output  
The OME-DB-8225 daughter board contains built-in cold junction  
compensation (CJC) circuitry that provides a 10mV per Deg C output. With 0.0  
Volts @ -273 Deg C. The OME-A-822 should be protected from drafts and  
direct sunlight in order to accurately reflect room temperature.  
CJC Calibration:  
1. Connect the OME-A-822PGL/PGH to the OME-DB-8225 CN1  
2. Set the OME-A-822PGL/PGH to single-ended Mode  
3. Set the JP1 jumper to 1-2 and the JP2 jumper to 2-3 ( single-ended mode)  
4.Read the temperature from a digital thermometer placed near D1/D2(See the  
OME-DB-8225 Layout) .  
5.Read OME-A-822PGL/PGH analog input channel 0 (single-ended Channel 0)  
6.Adjust VR1 until a stable reading of 10mV per deg C is attained .  
For example, when the ambient temperature is 24 deg C. the reading value  
of CJC will be 2.97V  
(273 deg c +24 deg c ) X 10 mV/deg c = 2.97V  
You will need an A/D channel for the CJC calibration. AI0 is reserved for CJC  
calibration when used in single-ended mode and CH0-HI & CH0-LO is reserved for the  
differential mode. differential mode is recommended when working with thermocouples.  
OME-A-822PGL/PGH Hardware Manual ---- 36  
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3. Connector  
The OME-A-822PGL/PGH provides three connectors. Connector 1, CN1  
contains the 16 digital inputs. Connector 2, CN2, contains the 16 digital  
outputs. Connector 3, CN3, contains the analog inputs, analog outputs and  
timer/counter I/O.  
3.1 CN1/CN2/CN3 Pin Assignment  
CN1 : Digital Input Pin Assignment.  
Pin Number Description  
Pin Number Description  
1
Digital Input 0/TTL  
2
Digital Input 1/TTL  
3
Digital Input 2/TTL  
Digital Input 4/TTL  
Digital Input 6/TTL  
Digital Input 8/TTL  
Digital Input 10/TTL  
Digital Input 12/TTL  
Digital Input 14/TTL  
GND  
4
Digital Input 3/TTL  
Digital Input 5/TTL  
Digital Input 7/TTL  
Digital Input 9/TTL  
Digital Input 11/TTL  
Digital Input 13/TTL  
Digital Input 15/TTL  
GND  
5
6
7
8
9
10  
12  
14  
16  
18  
20  
11  
13  
15  
17  
19  
+5V Output  
+12V Output  
CN2 : Digital Output Pin Assignment.  
Pin Number Description  
Pin Number Description  
1
Digital Output 0/TTL  
Digital Output 2/TTL  
Digital Output 4/TTL  
Digital Output 6/TTL  
Digital Output 8/TTL  
Digital Output 10/TTL  
Digital Output 12/TTL  
Digital Output 14/TTL  
GND  
2
Digital Output 1/TTL  
3
4
Digital Output 3/TTL  
Digital Output 5/TTL  
Digital Output 7/TTL  
Digital Output 9/TTL  
Digital Output 11/TTL  
Digital Output 13TTL  
Digital Output 15/TTL  
GND  
5
6
7
8
9
10  
12  
14  
16  
18  
20  
11  
13  
15  
17  
19  
+5V Output  
+12 OutputV  
OME-A-822PGL/PGH Hardware Manual ---- 37  
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SINGLE-ENDED SIGNAL MODE  
CN3 : Analog input, Analog output and Timer/Counter Pin Assignment.  
Pin Number Description  
Pin Number Description  
1
Analog Input 0/+  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
Analog Input 8/+  
2
Analog Input 1/+  
Analog Input 2/+  
Analog Input 3/+  
Analog Input 4/+  
Analog Input 5/+  
Analog Input 6/+  
Analog Input 7/+  
Analog GND  
Analog Input 9/+  
Analog Input 10/+  
Analog Input 11/+  
Analog Input 12/+  
Analog Input 13/+  
Analog Input 14/+  
Analog Input 15/+  
Analog GND  
3
4
5
6
7
8
9
10  
11  
Analog GND  
Analog GND  
D/A internal -5V/-10V  
voltage reference  
D/A channel 1 external  
voltage reference input  
+12V Output  
D/A channel 0 analog  
voltage output  
12  
13  
14  
15  
31  
32  
33  
34  
D/A channel 0 external  
voltage reference input  
D/A channel 1 analog  
voltage output  
PCB analog GND  
PCB digital GND  
User timer/counter‘s  
GATE control input  
Timer/counter 1&2 GATE  
control input  
16  
17  
User timer/counter output 35  
Timer/counter 1 output  
Reserved  
External trigger source  
input/TTL  
36  
18  
19  
Reserved  
37  
User timer/counter external  
clock input (internal=2M)  
+5V Output  
XXXXXXX This pin not available  
OME-A-822PGL/PGH Hardware Manual ---- 38  
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DIFFERENTIAL SIGNALS  
CN3 : Analog input, Analog output and Timer/Counter Pin Assignment.  
Pin Number Description  
Pin Number Description  
1
Analog Input 0/+  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
Analog Input 0/-  
2
Analog Input 1/+  
Analog Input 2/+  
Analog Input 3/+  
Analog Input 4/+  
Analog Input 5/+  
Analog Input 6/+  
Analog Input 7/+  
Analog GND  
Analog Input 1/-  
Analog Input 2/-  
Analog Input 3/-  
Analog Input 4/-  
Analog Input 5/-  
Analog Input 6/-  
Analog Input 7/-  
Analog GND  
3
4
5
6
7
8
9
10  
11  
Analog GND  
Analog GND  
D/A internal -5V/-10V  
voltage reference output  
D/A channel 1 external  
voltage reference input  
+12V Output  
D/A channel 0 analog  
voltage output  
12  
13  
14  
15  
31  
32  
33  
34  
D/A channel 0 external  
voltage reference input  
D/A channel 1 analog  
voltage output  
Analog GND  
User timer/counter GATE  
control input  
Digital GND output  
Timer/counter 1&2 GATE  
control input  
16  
17  
User timer/counter output 35  
Timer/counter 1 output  
Reserved  
External trigger source  
input/TTL  
36  
18  
19  
Reserved  
37  
User timer/counter external  
clock input (internal=2M)  
+5V output  
XXXXXXX This pin not available  
OME-A-822PGL/PGH Hardware Manual ---- 39  
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3.2 Daughter Board  
The OME-A-822PGL/PGH can be connected with many different daughter boards. The  
daughter boards are described below:  
3.2.1 OME-DB-8225  
The OME-DB-8225 provides an on-board CJC(Cold Junction Compensation) circuit  
for thermocouple measurement and a terminal block for easy signal connection. The CJC  
is connected to A/D channel_0. The OME-A-822PGL/PGH can connect to an  
OME-DB-8225 through a 37-pin D-sub connector on CN3.  
3.2.2 OME-DB-37  
The OME-DB-37 is a general purpose 37-pin screw terminal board. It connects to a  
37-pin D-sub connector.  
3.2.3 OME-DB-16P  
The OME-DB-16P is  
a
16 channel isolated digital input board. The  
OME-A-822PGL/PGH provides 16 channels of non-isolated TTL-compatible digital inputs  
via the CN1 connector. If used with the OME-DB-16P, the OME-A-822PGL/PGH can  
provide 16 channels of isolated digital input. Isolation can protect the computer if abnormal  
or excessive input signals are received.  
3.2.4 OME-DB-16R  
The OME-DB-16R provides 16 SPDT relay outputs. The OME-A-822PGL/PGH  
provides 16 TTL-compatible digital outputs via CN2. If connecting to the OME-DB-16R,  
the OME-A-822PGL/PGH can provide 16 relay outputs to control external devices.  
OME-A-822PGL/PGH Hardware Manual ---- 40  
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4. Calibration  
The OME-A-822PGL/PGH is factory calibrated for optimum performance. Recalibration is  
suggested for high vibration environments. The following items are required for  
calibrating the OME-A-822PGL/PGH.  
z One 6 digit multimeter  
z One stable voltage source (4.9988V)  
z Diagnostic program : this program included with the  
OME-A822PGL/PGH.  
4.1 Description of Variable Resistors  
There are seven variable resistors(VRs) on the OME-A-822PGL/PGH used for calibration,  
they are described below.  
VR Num. Description  
VR1  
VR2  
VR3  
VR4  
VR5  
VR6  
VR7  
A/D offset adjustment  
A/D gain adjustment  
D/A channel 0 gain adjustment  
D/A channel 1 gain adjustment  
D/A reference voltage adjustment  
A/D unipolar offset adjustment  
A/D programmable amplifier offset adjustment  
OME-A-822PGL/PGH Hardware Manual ---- 41  
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4.2 D/A Calibration  
1. Run the A82XDIAG.EXE program  
2. Press the “Right Arrow Key” to select “CALIBRATION”.  
3. Press the “Down Arrow Key” to select “G. D/A REFERENCE”.  
4. Press the “Enter Key”  
5. Connect VREF, pin 11 of CN3, to a DVM (Digital Volt Meter)  
6. Adjust VR5 until the DVM=4.9988V  
7. Press the “ESC Key”  
8. Select and Execute “A. D/A REFERENCE 1” item  
9. Connect D/A channel 0, pin 30 of CN3, to the DVM  
10. Adjust VR3 until the DVM=4.9988V  
11. Press the “ESC Key”  
12. Select and Execute “B. D/A REFERENCE2” item  
13. Connect D/A channel 1, pin 32 of CN3, to the DVM  
14. Adjust VR4 until the DVM=4.9988V  
OME-A-822PGL/PGH Hardware Manual ---- 42  
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4.3 A/D Calibration  
1. Run the A82XDIAG.EXE  
2. Press “Right Arrow Key” to select “CALIBRATION”  
3. Press the “Down Arrow Key” to select “C. A/D REFERENCE” item.  
4. Press the “Enter Key”  
5. Input a stable 4.9988V to A/D channel 0, pin 1 of CN3  
6. Adjust VR2 until the A/D data shown on the screen is between 4094 to 4095  
7. Press the “ESC Key”  
8. Select and Execute the “D. A/D OFFSET” item  
9. Input a stable 0V to A/D channel 0, pin1 of CN3  
10. Adjust VR1 until the A/D data shown on the screen is between 2048 to 2049  
11. Press the “ESC Key”  
12. Repeat step_3 to step_11 until there is no need to adjust VR2,VR1  
13. Select and Execute “E. PGA OFFSET” item  
14. Input a stable 0V to A/D channel 0, pin 1 of CN3  
15. Adjust VR7 until the A/D data shown in screen between 2048 to 2049  
16. Press “ESC Key”  
17. Select and Execute “F. PGA REFERENCE” item  
18. Input a stable 0V to A/D channel 0 , pin1 of CN3  
19. Adjust VR6 until the A/D data shown on screen is between 0 and 1  
OME-A-822PGL/PGH Hardware Manual ---- 43  
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5. Diagnostic Utility  
5.1 Introduction  
The A82XDIAG.EXE diagnostic utility is a menu-driven program which allows  
complete testing of the OME-A-822PGL/PGH board. To run the diagnostic utility,  
change to the subdirectory used in the installation process (C:\OME-A-822 for example).  
Then type "A82XDIAG" <Enter> to start the application. These steps are shown  
below:  
C:\>CD A822<Enter>  
C:\A822>CD DIAG <Enter>  
C:\A822\DIAG>A82XDIAG <Enter>  
A
configuration file, named OME-A-82X.CFG is associated with the  
A82XDIAG.EXE program. The configu ration of the OME-A-822PGL/PGH board  
is stored in this file. The stored information includes the board's I/O base address, interrupt  
number and DMA channel. Changes are not automatically saved to the configuration file,  
the user must select the save function to save any changes. When the  
A82XDIAG.EXE utility starts, it will automatically check if the jumper setting of  
the I/O base address matches the value stored in the configuration file. If the addresses do  
not match, an error message will appear as shown below.  
OME-A-822PGL/PGH Hardware Manual ---- 44  
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Although you can continue by pressing any key, it is recommended that the jumper  
situation be corrected since many operations in the A82XDIA utility check the I/O  
base address and report an error if the configuration file and the actual jumper settings do  
not match.  
OME-A-822PGL/PGH Hardware Manual ---- 45  
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5.2 Running The Diagnostic Utility  
The initial screen of A82XDIAG is shown below. There are five  
main menus in the initial screen. They are Setup, Calibration, FunctionTest,  
sPecialTest and Help. Use the Left or Right key to select the main menu.  
Then use the Up or Down key to select the menu item. Alternately, the user  
can press the command key to highlight the menu item. A command key in a  
menu item is the character that is highlighted. To execute a function associated  
with a highlighted menu item, just press <Enter> and press <Esc> to abort the  
current function.  
OME-A-822PGL/PGH Hardware Manual ---- 46  
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5.2.1 Setup  
The Setup menu allows the user to setup the board configuration. There are six functions in  
this muen, Card type, Base Addresss, DMA no, IRQ no, Save option, eXit.  
Card type : <Up/Down> key to select A-822PGL/PGH, <Enter> key to select  
Base Address : <Up/Down> key to select base address, <Enter> key to select  
DMA no : <Up/Down> key to select DMA no, <Enter> key to select  
IRQ no : <Left/Right> key to select IRQ no, <Enter> key to select  
Save option : <Left/Right> key to select yes/no, <Enter> key to select  
eXit : <Left/Right> key to select yes/no, <Enter> key to select  
Base address selection screen.  
OME-A-822PGL/PGH Hardware Manual ---- 47  
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DMA no and IRQ no selection screen  
OME-A-822PGL/PGH Hardware Manual ---- 48  
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5.2.2 CALIBRATION  
The CALIBRATION menu contains ten submenu items: they are, D/A Reference voltage,  
D/A Channel 0 gain, D/A channel 1 gain, A/D Gain, A/D Offset, A/D Bipolar Offset, A/D  
Unipolar Offset. These items relate to the calibration of the OME-A-822PGL/PGH. The  
CALIBRATION main menu, is a graphic representation of the OME-A-822PGL/PGH board  
layout. In order to maintain the specified performance, it may be required to calibrate the  
board after working with it for an extended period of time. There are seven variable resistors  
(VRs) that need to be adjusted during the calibration process. When you highlight one of the  
first seven menu items, the associated VR will begin to blink and a message window will  
appear that will instruct you how to adjust the VR. The main menu screen is shown below.  
OME-A-822PGL/PGH Hardware Manual ---- 49  
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5.2.3 FUNCTION TEST  
The FUNCTION TEST main menu contains seven submenus: they are D/A TEST, Digital  
I/O, A/D MULTIPLEX, A/D use IRQ, A/D use DMA, A/D GAIN, Timer 0. The main menu  
is shown below.  
The “D/A TEST” menu, is shown below.  
OME-A-822PGL/PGH Hardware Manual ---- 50  
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<D/A TEST > Test Screen  
z Assume D/A output range 0 to 5V  
z Send D/A output to both channels simultaneously  
z Press <p> pause screen, press <p> again release screen  
z Press <Up> key to increase screen delay  
z Press <Down > key to decrease screen delay  
z Press <ESC> key to quit  
OME-A-822PGL/PGH Hardware Manual ---- 51  
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<Digital I/O> Test Screen  
z Connect CN1 to CN2  
z 16 bit up counter is sent to 16 channel DO  
z 16 channel DO is connected to 16 channel DI  
z 16 channel DI are readback and show on the screen  
z If DO equals DI then OK shown on screen  
z If DO does not equal DI then Error shown on screen  
z Press <p> pause screen, press <p> again release screen  
z Press <Up> key to increase the screen delay  
z Press <Down > key to decrease the screen delay  
z Press <ESC> key to quit  
OME-A-822PGL/PGH Hardware Manual ---- 52  
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<A/D Multiplexer> Test Screen  
z Assume 16 channel single-ended, bipolar, gain=1, analog input signals  
z Input range from -5V to +5V  
z Continue to scan 16 channels  
z Press <ESC> key to quit  
OME-A-822PGL/PGH Hardware Manual ---- 53  
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<A/D use IRQ> Test Screen  
z Assume single-ended, bipolar, gain=1  
z Use <PgUp> key to select the next channel  
z Use <PgDn> key to select the previous channel  
z Use <Up>/<Down> key to adjust C1  
z Use <Left>/<Right> key to adjust C2  
z The sample rate = The pacer timer rate = 2000/(C1*C2) K  
z Use <p> key to pause screen, use next <p> key to release screen  
z Use <ESC> to quit  
z The A/D mode control register=0x06 Æ select pacer trigger and use interrupt transfer  
z One cycle samples 1000 A/D data points  
z Minimum, maximum and average values are shown on the screen  
OME-A-822PGL/PGH Hardware Manual ---- 54  
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<A/D use DMA> Test Screen  
z Assume single-ended, bipolar, gain=1  
z Use <PgUp> key to select the next channel  
z Use <PgDn> key to select the previous channel  
z Use <Up>/<Down> key to adjust C1  
z Use <Left>/<Right> key to adjust C2  
z Sample rate = pacer timer rate = 2000/(C1*C2) K  
z Use <p> key to pause screen, use next <p> key to release screen  
z Use <ESC> to quit  
z A/D mode control register=0x02 Æ select pacer trigger and use DMA transfer  
z One cycle samples 1000 A/D data points  
z Minimum, Maximum and Average values are shown on the screen  
OME-A-822PGL/PGH Hardware Manual ---- 55  
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<DA GAIN> Test Screen  
z Assume single-ended, bipolar, gain=1, A/D channel 0 connected to D/A channel 0  
z Use <Up>/<Down> key to adjust gain control code  
z Use <Left>/<Right> key to adjust D/A output value  
z Use software trigger and polling transfer mode  
z Press <ESC> key to quit  
OME-A-822PGL/PGH Hardware Manual ---- 56  
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<Timer 0> Test Screen  
z Assume JP6 set to internal 2M clock  
z If the counter0 is functioning normally, the value will increment automatically.  
OME-A-822PGL/PGH Hardware Manual ---- 57  
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5.2.4 SPECIAL TEST  
The SPECIAL TEST menu contains four submenu items: they are D/A Volt Set, DIO Bit  
Pattern, IRQ Clock Test and DMA Clock Test. These functions are reserved for factory  
testing.  
OME-A-822PGL/PGH Hardware Manual ---- 58  
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5.2.5 Help  
The Help menu will display the software version as shown below.  
OME-A-822PGL/PGH Hardware Manual ---- 59  
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WARRANTY/DISCLAIMER  
OMEGA ENGINEERING, INC. warrants this unit to be free of defects in materials and workmanship for a  
period of 13 months from date of purchase. OMEGA’s WARRANTY adds an additional one (1) month  
grace period to the normal one (1) year product warranty to cover handling and shipping time. This  
ensures that OMEGA’s customers receive maximum coverage on each product.  
If the unit malfunctions, it must be returned to the factory for evaluation. OMEGA’s Customer Service  
Department will issue an Authorized Return (AR) number immediately upon phone or written request.  
Upon examination by OMEGA, if the unit is found to be defective, it will be repaired or replaced at no  
charge. OMEGA’s WARRANTY does not apply to defects resulting from any action of the purchaser,  
including but not limited to mishandling, improper interfacing, operation outside of design limits,  
improper repair, or unauthorized modification. This WARRANTY is VOID if the unit shows evidence of  
having been tampered with or shows evidence of having been damaged as a result of excessive corrosion;  
or current, heat, moisture or vibration; improper specification; misapplication; misuse or other operating  
conditions outside of OMEGA’s control. Components which wear are not warranted, including but not  
limited to contact points, fuses, and triacs.  
OMEGA is pleased to offer suggestions on the use of its various products. However,  
OMEGA neither assumes responsibility for any omissions or errors nor assumes liability for any  
damages that result from the use of its products in accordance with information provided by  
OMEGA, either verbal or written. OMEGA warrants only that the parts manufactured by it will be  
as specified and free of defects. OMEGA MAKES NO OTHER WARRANTIES OR  
REPRESENTATIONS OF ANY KIND WHATSOEVER, EXPRESS OR IMPLIED, EXCEPT THAT OF TITLE,  
AND ALL IMPLIED WARRANTIES INCLUDING ANY WARRANTY OF MERCHANTABILITY AND  
FITNESS FOR A PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. LIMITATION OF  
LIABILITY: The remedies of purchaser set forth herein are exclusive, and the total liability of  
OMEGA with respect to this order, whether based on contract, warranty, negligence,  
indemnification, strict liability or otherwise, shall not exceed the purchase price of the  
component upon which liability is based. In no event shall OMEGA be liable for  
consequential, incidental or special damages.  
CONDITIONS: Equipment sold by OMEGA is not intended to be used, nor shall it be used: (1) as a “Basic  
Component” under 10 CFR 21 (NRC), used in or with any nuclear installation or activity; or (2) in medical  
applications or used on humans. Should any Product(s) be used in or with any nuclear installation or  
activity, medical application, used on humans, or misused in any way, OMEGA assumes no responsibility  
as set forth in our basic WARRANTY/DISCLAIMER language, and, additionally, purchaser will indemnify  
OMEGA and hold OMEGA harmless from any liability or damage whatsoever arising out of the use of the  
Product(s) in such a manner.  
RETURN REQUESTS/INQUIRIES  
Direct all warranty and repair requests/inquiries to the OMEGA Customer Service Department. BEFORE  
RETURNING ANY PRODUCT(S) TO OMEGA, PURCHASER MUST OBTAIN AN AUTHORIZED RETURN  
(AR) NUMBER FROM OMEGAS CUSTOMER SERVICE DEPARTMENT (IN ORDER TO AVOID  
PROCESSING DELAYS). The assigned AR number should then be marked on the outside of the return  
package and on any correspondence.  
The purchaser is responsible for shipping charges, freight, insurance and proper packaging to prevent  
breakage in transit.  
FOR WARRANTY RETURNS, please have the  
following information available BEFORE  
contacting OMEGA:  
FOR NON-WARRANTY REPAIRS, consult OMEGA  
for current repair charges. Have the following  
information available BEFORE contacting OMEGA:  
1. Purchase Order number under which the product  
was PURCHASED,  
1. Purchase Order number to cover the COST  
of the repair,  
2. Model and serial number of the product under  
warranty, and  
3. Repair instructions and/or specific problems  
relative to the product.  
2. Model and serial number of the product, and  
3. Repair instructions and/or specific problems  
relative to the product.  
OMEGA’s policy is to make running changes, not model changes, whenever an improvement is possible. This affords  
our customers the latest in technology and engineering.  
OMEGA is a registered trademark of OMEGA ENGINEERING, INC.  
© Copyright 2002 OMEGA ENGINEERING, INC. All rights reserved. This document may not be copied, photocopied,  
reproduced, translated, or reduced to any electronic medium or machine-readable form, in whole or in part, without the  
prior written consent of OMEGA ENGINEERING, INC.  
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Where Do I Find Everything I Need for  
Process Measurement and Control?  
OMEGA…Of Course!  
TEMPERATURE  
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Wire: Thermocouple, RTD & Thermistor  
Calibrators & Ice Point References  
Recorders, Controllers & Process Monitors  
Infrared Pyrometers  
PRESSURE, STRAIN AND FORCE  
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Refractometers  
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pH, Conductivity & Dissolved Oxygen Instruments  
M4031/0104  
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