Super Multi DVD Drive
SERVICE MANUAL
MODEL: GSA-4165B/
GSA-4167B/
GSA-4168B
P/NO : 3828HS1047G
August 2005
Printed in Korea
MODEL : GSA-4165B/GSA-4167B/GSA-4168B
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INTRODUCTION
This service manual provides a variety of service
information.
It can write as much as 4.7Gbytes of digital data into
DVD-R/RW/RAM/+R/+RW disc, and can read as
much as 4.7Gbytes of digital data stored in a
DVD-ROM/R/RW/RAM/+R/+RW disc.
It can write as much as 8.5Gbytes of digital data into
DVD+R DL/DVD-R DL disc, and can read as much
as 8.5Gbytes of digital data stored in a DVD-ROM
DL/+R DL/-R DL disc.
It contains the mechanical structure of the Super
Multi DVD Drive and the electronic circuits in
schematic form. This Super Multi DVD Drive was
manufactured and assembled under our strict quality
control standards and meets or exceeds industry
specifications and standards.
This Super Multi DVD drive is an internal drive unit
designed for use with IBM PC, HP Vectra, or
compatible computer. It can write as much as 700
Mbytes of digital data into CD-R/RW disc, and can
read as much as 700 Mbytes of digital data stored in
a CD-ROM/R/RW disc.
This Super Multi DVD Drive can easily meet the
upcoming MPC level 3 specification, and its
Enhanced Intelligent Device Electronics (E-IDE) and
ATAPI interface allows Plug and play integration in
the majority of today’s PCs without the need of an
additional interface card.
1. Support feature and writable disc
*) Indicated write-in speed is a value at the time of the fastest operation.
G*A-4165B
GSA
x
48x write
32x write
16x write
GMA
x
48x write
32x write
16x write
GWA
x
48x write
32x write
16x write
GRA
x
GCA
x
48x write
32x write
16x write
GDA
x
read only
read only
16x write
Light Scribe
CD-R
CD-RW
48x write
32x write
read only
read only
read only
16x write
8x write
DVD-R
DVD-RW
DVD-R DL
DVD+R
DVD+RW
DVD+R DL
DVD-RAM
4x or 6x write 4x or 6x write 4x or 6x write
4x or 6x write 4x or 6x write
4x write
16x write
8x write
4x write
read only
read only
read only
5x write
4x write
16x write
8x write
4x write
read only
read only
read only
read only
4x write
read only
read only
read only
5x write
4x or 6x write
5x write
4x or 6x write
read only
4x or 6x write
read only
G*A-4167B
GWA
GSA
x
GMA
x
GRA
x
GCA
x
GDA
x
Light Scribe
CD-R
CD-RW
x
48x write
32x write
16x write
6x write
4x write
16x write
8x write
6x write
5x write
48x write
32x write
16x write
6x write
4x write
read only
read only
read only
5x write
48x write
32x write
16x write
6x write
4x write
16x write
8x write
6x write
read only
48x write
32x write
read only
read only
read only
16x write
8x write
6x write
read only
48x write
32x write
16x write
6x write
4x write
read only
read only
read only
read only
read only
read only
16x write
6x write
4x write
read only
read only
read only
5x write
DVD-R
DVD-RW
DVD-R DL
DVD+R
DVD+RW
DVD+R DL
DVD-RAM
G*A-4168B
GWA
GSA
O
GMA
O
GRA
O
GCA
O
GDA
O
Light Scribe
CD-R
CD-RW
O
48x write
32x write
16x write
6x write
4x write
16x write
8x write
6x write
5x write
48x write
32x write
16x write
6x write
4x write
read only
read only
read only
5x write
48x write
32x write
16x write
6x write
4x write
16x write
8x write
6x write
read only
48x write
32x write
read only
read only
read only
16x write
8x write
6x write
read only
48x write
32x write
16x write
6x write
4x write
read only
read only
read only
read only
read only
read only
16x write
6x write
4x write
read only
read only
read only
5x write
DVD-R
DVD-RW
DVD-R DL
DVD+R
DVD+RW
DVD+R DL
DVD-RAM
3
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FEATURES
1 General
1) Enhanced IDE (ATAPI) interface.
2) Internal Half-height Drive.
3) CD-R/RW, DVD-R/-R DL(Dual Layer)/-RW/RAM/+R/+R DL(Double Layer)/+RW read and write
compatible CD Family and DVD-ROM read compatible.
4) Buffer Under-run prevention function embedded.
5) 2MB buffer memory.
6) Power loading and power eject of a disc. Bare media loading.
7) MTBF : 100,000 POH
8) Vertical and Horizontal installable.
2. Supported disc formats
1) Reads data in each DVD-ROM, DVD-R(Ver. 2.0 for Authoring) and DVD-RAM(Ver.1.0)
2) Reads and writes in each DVD-R(Ver. 2.0 for General), DVD-R DL(Dual Layer), DVD-RW, DVD-
RAM(Ver.2.2), DVD+R, DVD+R DL(Double Layer) and DVD+RW
3) Reads data in each CD-ROM, CD-ROM XA, CD-I, Video CD, CD-Extra and CD-Text
4) Reads data in Photo CD (Single and Multi session)
5) Reads standard CD-DA
6) Support to read Super Audio CD(Compatible layer in Hybrid type)
7) Reads and writes CD-R discs conforming to “Orange Book Part 2”
8) Reads and writes CD-RW discs conforming to “Orange Book Part 3”
9) Reads DVD-RAM with CPRM and DVD-RW with CPRM
3. Supported write method
1) DVD-R:..................Disc at Once and Incremental Recording
2) DVD-R DL .............Disc at Once, incremental Recording and Layer jump recording
3) DVD-RW:...............Disc at Once, Incremental Recording and Restricted Overwrite
4) DVD-RAM:.............Random Write
5) DVD+R:.................Sequential Recording
6) DVD+R DL: ...........Sequential Recording
7) DVD+RW:..............Random Write
8) CD-R/RW: .............Disc at Once, Session at Once, Track at Once and Packet Write
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4. Performance
1) Average access time:
(1/3 stroke)
DVD-ROM 145 ms
CD-ROM 125 ms
2) Write speed:
DVD-R 2x, 4x CLV, 8x ZCLV, 16x PCAV
DVD-R DL 2x, 4x CLV
DVD-RW 1x, 2x, 4x, 6x CLV
DVD-RAM 2x, 3x ZCLV (Ver.2.2), 3x-5x PCAV(Ver.2.2)
DVD+R 2.4x, 4x CLV, 8x ZCLV, 12x, 16x PCAV
DVD+R DL 2.4x, 4x, 6x CLV
DVD+RW 2.4x, 4x CLV, 8x ZCLV
CD-R 4x, 8x, 16x CLV, 24x, 32x, 40x, 48x ZCLV
CD-RW 4x, 10x, 16x CLV, 24x, 32x ZCLV
(High Speed: 10x, Ultra Speed: 16x, 24x, 32x)
3) Read speed:
DVD-R/RW/ROM/ROM-Dual layer 10x / 8x / 16x / 12x max.
DVD-R DL 8x max.
DVD-RAM (Ver.1.0/2.2) 2x / 2x, 3x ZCLV, 3x-5x PCAV
DVD-Video(CSS Compliant Disc) 8x max. (Single/Dual layer)
DVD+R/+RW 10x / 8x max.
DVD+R DL 8x max.
CD-R/RW/ROM 48x/40x/48x max.
CD-DA (DAE) 40x max.
80mm CD 16x max.
4) Sustained Transfer rate:
5) Burst Transfer rate:
DVD-ROM 22.16 Mbytes/s (16x) max.
CD-ROM 7,200 kB/s (48x) max.
Ultra DMA Mode2
Multi word DMA Mode2, PIO Mode 4
6) Multimedia MPC-3 compliant
5. Audio
1) 16 bit digital data output through ATA interface
2) Software Volume Control
3) Equipped with audio line output for audio CD playback
*Definition
Transfer Rate: .........1x (DVD) = 1.385 Mbytes/s..........1x (CD) = 150 kB/s
Mbytes/s = 106 bytes/s, ................kB/s = 210 bytes/s
Capacity: .................MB = 220 bytes, .............................kB = 210 bytes
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SPECIFICATIONS
1. SYSTEM REQUIREMENTS
-CPU: IBM Compatible Pentium 4 2.4GHz (or faster)
(For High speed, 2.4GHz or faster recommended.)
-128MB Memory or greater
2. SUPPORTING OPERATING SYSTEM
* Operating System
* Recording tool
Windows Millennium Edition (Me)
Window 2000 Professional
(1) Nero(Ahead)
(2) In CD(Ahead)
Window XP Home Edition, Professional
(3) Power Producer Gold (Cyber Link)
2.1 Applicable disc formats
DVD ............................DVD-ROM:
4.7GB (Single Layer)
8.5GB (Dual Layer)
8.5GB
DVD-R DL:
DVD-R:
4.7GB (Ver.2.0 for Authoring : read only)
4.7GB (Ver.2.0 for General: read & write)
4.7GB (Ver.1.2)
DVD-RW:
DVD-RAM:
2.6GB/side (Ver.1.0)
1.46GB/side, 4.7GB/side (Ver.2.2)
4.7GB
DVD+R:
DVD+R DL:
DVD+RW:
8.5GB
4.7GB
CD...............................CD-ROM Mode-1 data disc
CD-ROM Mode-2 data disc
CD-ROM XA, CD-I, Photo-CD Multi-Session, Video CD
CD-Audio Disc
Mixed mode CD-ROM disc (data and audio)
CD-Extra
CD-Text
CD-R (Conforming to “Orange Book Part2”: read & write)
CD-RW (Conforming to “Orange Book Part3”: read & write)
2.2 Writing method
(1) DVD-R/RW...........................Disc at Once
Incremental Recording
Restricted Overwrite (DVD-RW only)
(2) DVD-R DL ............................Disc at Once
Incremental Recording
Layer jump Recording
(3) DVD-RAM/+RW ...................Random Write
(4) DVD+R.................................Sequential Recording
(5) DVD+R DL ...........................Sequential Recording
(6) CD-R/RW .............................Disc at Once (DAO)
Session at Once (SAO)
Track at Once (TAO)
Packet Write
2.3 Disc diameter..............................................120mm
80mm (Horizontal only)
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2.4 Data capacity
• User Data/Block DVD-ROM/R/RW/RAM/+R/+RW ......2,048 bytes/block
CD (Yellow Book) ..........................................2,048 bytes/block(Mode 1 & Mode 2 Form 1)
2,336 bytes/block (Mode 2)
2,328 bytes/block (Mode 2 Form 2)
2,352 bytes/block (CD-DA)
2.5 RPC (Regional Playback Control) Phase2, No Region
3. DRIVE PERFORMANCE
3.1 Host interface ..................................................................X3T13 ATA/ATAPI5/1321D
INF-8090i Rev.5.3
3.2 Read/Write & Rotational speed
<Write>
DVD-R...............................................................2x, 4x(CLV), 8x(ZCLV), 16x(PCAV)
DVD-R DL .........................................................2x, 4x(CLV)
DVD-RW............................................................1x, 2x, 4x, 6x(CLV)
DVD-RAM ...............................Ver. 2.2.............2x, 3x(ZCLV), 3x-5x(PCAV)
DVD+R..............................................................2.4x, 4x(CLV), 8x, 12x, 16x(PCAV)
DVD+R DL ........................................................2.4x, 4x, 6x(CLV)
DVD+RW...........................................................2.4x, 4x(CLV), 8x(ZCLV)
CD-R .................................................................4x, 8x, 16x(CLV), 24x, 32x, 40x, 48x(ZCLV)
CD-RW..............................................................4x, 10x,16x(CLV), 24x, 32x (ZCLV)
(High Speed: 10x, Ultra Speed: 16x, 24x, 32x)
<Read>
DVD-ROM...............................Single layer.......6.7x - 16x (CAV), Approx. 9,420 r/min
................................................Dual layer .........5.0x - 12x (CAV), Approx. 7,770 r/min
DVD-R DL...............................8.5GB ...............3.3x - 8x (CAV), Approx 5,180r/min
DVD-Video (CSS) .............................................3.3x - 8x (CAV), Approx. 5,180 r/min
DVD-R.....................................4.7GB ...............4.2x - 10x (CAV), Approx. 5,890 r/min
DVD-RW .................................4.7GB ...............3.3x - 8x (CAV), Approx. 4,720 r/min
DVD-RAM ...............................Ver. 1.0/ 2.2......2x/ 2x, 3x (ZCLV)* 3x-5x (PCAV)*
DVD+R....................................4.7GB ...............4.2x - 10x (CAV), Approx. 5,890 r/min
DVD+R DL ..............................8.5GB ...............3.3x - 8x (CAV), Approx. 5,180 r/min
DVD+RW ................................4.7GB ...............3.3x - 8x (CAV), Approx. 4,720 r/min
CD-R/ROM, CD-I / Video........(1.2m/s) ............20x - 48x (CAV), Approx. 9,540 r/min
CD-RW ...................................(1.2m/s) ...........16.7x - 40x (CAV), Approx. 8,100 r/min
CD-DA (DAE)..........................(1.2m/s) ...........16.7x - 40x (CAV), Approx. 8,100 r/min
CD-DA (Audio out)..................(1.2m/s) ...........4.0x - 10x (CAV), Approx. 2,030 r/min
* Rotational speed (CLV, ZCLV)
DVD-R/RW/ROM, +R/RW ...............................1x: Approx. 1,390(Inside) - 580 r/min(Outside)
DVD-RAM................................Ver. 1.0 ...........1x: Approx. 2,390(Inside) - 1,010 r/min(Outside)
Ver. 2.2 ...........2x: Approx. 3,250(Inside) - 1,380 r/min(Outside)
CD-R/RW/ROM ...............................................1x: Approx. 500(Inside) - 210 r/min(Outside)
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3.3 Data transfer rate
3.3.1 Sustained transfer rate
<Write> DVD-R.........................2.77, 5.54, 5.44-11.08 Mbytes/s..................................2x, 4xCLV, 8x ZCLV
9.14-22.16 Mbytes/s....................................................................16x PCAV
DVD-R DL ...................2.77, 5.54 Mbytes/s....................................................................2x, 4x CLV
DVD-RW
...............1.385, 2.77, 5.54, 8.31 Mbytes/s ...................................1x, 2x, 4x, 6x CLV
DVD-RAM (Ver.2.2): ...2.77, 4.15, 4.15-6.925 Mbytes/s (w/o Verify) .......2x, 3x ZCLV, 3-5x PCAV
DVD+R........................3.32, 5.54, 8.31-11.08 Mbytes/s..............................2.4x, 4x CLV, 8x ZCLV
8.31-16.62, 9.14-22.16 Mbytes/s ..............................12x ZCLV, 16x PCAV
DVD+R DL ..................3.32, 5.54, 8.31 Mbytes/s..................................................2.4x, 4x, 6x CLV
DVD+RW.....................3.32, 5.54, 8.31-11.08 Mbytes/s .............................2.4x, 4x CLV, 8x ZCAV
CD-R ...........................600, 1,200, 2,400, 2,400-3,600, 2,400-4,800, 2,400-6,000, 2,400-7,200 kB/s (Mode-1)
..........................................4x, 8x, 16x CLV 24x, 32x, 40x, 48x ZCLV
CD-RW........................600, 1500, 2,400, 2,400- 3,600, 2,400-4,800 kB/s (Mode-1)
..........................................4x, 10x, 16x CLV, 24x, 32x ZCLV
<Read> DVD-ROM...................Single layer ....9.28 - 22.16 Mbytes/s ...........................................16x max.
....................................Dual layer.......6.86 - 16.62 Mbytes/s ...........................................12x max.
DVD-R ................................................5.73 - 13.85 Mbytes/s ............................................10x max.
DVD-R DL...........................................4.58 - 11.08 Mbytes/s ..............................................8x max.
DVD-RW.............................................4.58 - 11.08 Mbytes/s .............................................8x max.
DVD-RAM ...................Ver. 1.0 ..........2.77 Mbytes/s.........................................................2x ZCLV
....................................Ver. 2.2 ..........2.77, 4.155,4.155-6.93 Mbytes/s ..2x, 3x ZCLV, 3-5x PCAV
DVD+R ...............................................5.73 - 13.85 Mbytes/s ............................................10x max.
DVD+R DL..........................................4.58 - 11.08 Mbytes/s ..............................................8x max.
DVD+RW............................................4.58 - 11.08 Mbytes/s .............................................8x max.
CD-R/ROM .........................................3,000 - 7,200 kB/s..................................................48x max.
CD-RW........................ ......................2,500 - 6,000 kB/s..................................................40x max.
CD-DA (DAE)......................................2,500 - 6,000 kB/s..................................................40x max.
3.3.2 Burst transfer rate
Ultra DMA Mode 2 ..............................33.3 Mbytes/s max.
Multiword DMA Mode 2 ......................16.6 Mbytes/s max.
PIO Mode 4 ........................................16.6 Mbytes/s max.
3.4 Access time (1/3 stroke)
DVD-ROM...........................................145 ms Typ.*(Note 1)
DVD-RAM (Ver.2.2)............................165 ms Typ.
CD-ROM.............................................125ms Typ. (Note 1)
Note :
1) Average random access time is the typcal value of more than 50 times including latency and error correction time.
Test Disc : DVD : ALMEDIO TDV-520 / TDR-820
CD : ALMEDIO TCDR-701 / HITACHI HCD-1
*) Typical value defines a measured value in normal temperature (20 deg.C.) and horizontal position.
3.5 Data error rate (Measured with 5 retries maximum)
DVD-R/RW/ROM/RAM ..................................<10-12
DVD+R/+RW..................................................<10-12
CD-R/RW/ROM..............................................<10-12 (Mode-1)
<10-9 (Mode-2)
Condition : It is assumed that the worst case raw error rate of the disc is 10-3
3.6 Data buffer capacity .......................................................2 Mbytes
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4. Quality and Reliability
4.1 MTBF..................................................100,000 Power On Hours(Consecutive/Cumulative POH)
Assumption : ..........................Used in a normall office environment at room temperature.
-POH per year.........................3,000
-ON/OFF cycles per year........600
-Operating duty cycle..............20% of power on time (Seek: 5% of operating time)
4.2 Tray cycle test...................................30,000 times
No degeneration in the mechanical part after test
4.3 Actuator mechanism........................1,000,000 full stroke seek
4.4 MTTR (Mean Time To Repair) ...........0.5 h
4.5 Component life .................................5 years or 2,000 h of Laser radiating time
Assumption : ..........................Used in a normall office environment.
5. POWER REQUIREMENTS
5.1 Source voltage
+
+
+5V
+12V
5% tolerance, less than 100 mVp-p Ripple voltage
10% tolerance, less than 100 mVp-p Ripple voltage
5.2 Current
Idle (Hold track state)..............+5V DC .................0.9A typ. .........< 1.0 A max.
+12V DC ...............0.5A typ...........< 1.0 A max.
Write (Active) ..........................+5V DC .................1.3A typ. .........< 1.5 A max.
+12V DC................0.9A typ. .........< 1.5 A max.
Read (Active)..........................+5V DC .................1.0A typ. .........< 1.5 A max.
+12V DC................0.9A typ. .........< 1.5 A max.
Seek (Acess) ..........................+5V DC .................1.0A typ. .........< 1.5 A max.
+12V DC ...............1.2A typ. .........< 2.0 A max.
5.3 Standby
Sleep mode (No disc) .............1.1 W typ.
1.3 W max.
6. AUDIO PERFORMANCE
Output Level (1kHz, 0dB)........................................................0.7 Vrms typical
Frequency Response ..............................................................+/-3dB (20 to 20,000Hz)
Signal to Noise Ratio...............................................................80 dB min. with IHF A and LPF 20 kHz
THD (1kHz, 0dB).....................................................................0.10% max. with LPF 20 kHz
Channel separation(10kHz).....................................................65 dB min.
Condition: ................................................................................Load inpedance : 10 kohms
7. Acoustic noise
Less than 50dB, A scale, at 0.5 m away from the drive
Note : 1. Disc : Less than imbalance 0.3 x 10-4 Nm
2. Installation : Horizontal
3. Ambient temperature : Normal temperature
4. Except loading, unloading and seek
8. Dimensions
External dimensions (W x H xD)
Front bezel (WxHxD)
146 x 41.3 x 165mm(without Bezel)
148 x 42 x 5 mm
9. Mass .................................................Approx. 0.77+/-0.03 kg
*
Which is not provided with Circuit Diagram of this model. Please Contact the friendly staff of LG
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LOCATION OF CUSTOMER CONTROLS
Front Panel
Emergency Eject Hole
Disc Tray
Stop/Eject Button
Drive Activity Indicators
1. Disc tray
3. Emergency Eject Hole
This is the tray for the disc. Place the disc on the
ejected disc tray, then lightly push the tray (or
push the eject button) and the CD will be loaded.
Insert a paper clip here to eject the Disc tray
manually or when there is no power.
4. Drive activity indicator
Two colored LED is used to indicate the operation
of the Drive.
NOTE: Don’t pull out or push in the disc tray
forcibly. This might cause damage to the loading
section of the drive.
2. Stop/Eject button
This button is pressed to open the CD tray.
This button works only when power is supplied to
the drive.
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Rear Panel
IDE Interface Connector
Analog Audio Output Connector
Jumper Connector
Power Connector
Digital Audio Output
Connector
NOTE: The actual drive may be different from this design.
1. Power Connector
3. Jumper Connector
Connects to the power supply (5-and 12-V DC) of
the host computer.
This jumper determines whether the drive is
configured as a master or slave. Changing the
master-slave configuration takes effect after
power-on reset.
NOTE : Be careful to connect with the proper
polarity. Connecting the wrong way may damage
the system (and is not guaranteed). Usually this
connector can only be attached one-way.
4. Analog Audio Output Connector
Provides output to a sound card (analog signal).
Generally you need this to play a regular audio
CD.
2. IDE Interface Connector
Connect to the IDE (Integrated Device
Electronics) Interface using a 40-pin flat IDE
cable.
5. Digital Audio Output Connector
This connector is not supported.
NOTE : Do not connect or disconnect the cable
when the power is on, as this could cause a short
circuit and damage the system. Always turn the
power OFF when connecting or disconnecting the
cable.
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DISASSEMBLY
1-3. Cabinet and Main Circuit Board
A. Remove the Cabinet in the direction of arrow (4).
(See Fig. 1-3)
1. CABINET and CIRCUIT BOARD
DISASSEMBLY
1-1. Bottom Chassis
A. Release 4 screws (A) and remove the Bottom Chassis
in the direction of arrow (1). (See Fig.1-1)
B. When the CD tray has been opened completely, lift
2 points (a) and remove the CD tray while drawing
out simultaneously.
C. Remove the Soldering of the LD- and LD+ (b) for
the Loading Motor, and then remove the Main
Circuit Board.
D. At this time, be careful not to damage the 4
connectors of the Main Circuit Board.
Cabinet
(1)
(4)
(a)
(A)
Bottom Chassis
(5)
(A)
(A)
(A)
Fig. 1-1
Main
Circuit Board
1-2. Front Bezel Assy
(b)
A. Insert and press a rod in the Emergency Eject
Hole and then the CD Tray will open in the direction
of arrow (2).
Fig. 1-3
B. Remove the Tray Door in the direction of arrow
(3) by pushing the stoppers forward.
C. Release 3 stoppers and remove the Front Bezel Assy.
2. MECHANISM ASSY DISASSEMBLY
2-1. Pick-up Unit
A. Release screws (B).
B. Separate the Pick-up Unit in the direction of arrow (6).
Tray Door
(B)
(B)
(3)
Stoppers
Pick-up Unit
(6)
CD Tray
(2)
Front Bezel Assy
Mechanism Assy
Emergency Eject Hole
Fig. 2-1
Fig. 1-2
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2-2. Pick-up
A. Release 1 screw (C) and remove the Pick-up.
Pick-up Unit
(C)
Pick-up
Fig. 2-2
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004
035
005
012
5
4
3
2
1
008
EXPLODED VIEW
006
009
015
010
011
PBM00 (MAIN C.B.A)
PBF00 (FRONT C.B.A)
016
A03
A01
013
453
034
031
033
001
027
026
024
007
025
445
430
020
A02
452
028
028
430
020
481
482
003
030
021
002
482
032
482
452
050
453
014
482
452
036
021
(LightScribe only)
A
B
C
D
E
F
G
H
14
15
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GLOSSARY
ATIP
Absolute Time in Pre-groove. With an additional modulation of the “Wobble”, the “Groove” contains a time
code information.
Wobble
The pre-groove in the Disc is not a perfect spiral but is wobbled.
With : – A typical amplitude of 30 nm
– A spatial peried of 54~64 µm
CW
Continuous Wave. The laser light output is at a constant level.
DOW
Direct Over-Write. The action in which new information is recored over previously recorded information in
CD-RW disc.
Overwrite
The action in which new information is recorded over previously recorded information.
(Pre-)Groove The guidance track in which clocking and time code information is stored by means of an FM
modulated wobble.
Land
Land is characterized in the following way:
When radial signals are concerned,land is defined as the area between the grooves.
When HF signal are concerned,land is defined as the area between the marks(pits) in tangential
direction.
Hybrid Disc A Multisession disc of which the first Session is mastered. On a hybrid disc, recorded and
mastered information may co-exist.
Mastered
Information,stored as pits on the disc during the manufacturing process of the disc.
Information (when making the master)
OPC
Optimum Power Control. Procedure is determined optimum recording power according to CD-
R/RW Media in recording start step.
ROPC
Running OPC. The purpose is to continuously adjust the writing power to the optimum power
that is required.
When the optimum power may change because of changed conditions of disc and change in
operating temperature.
Jitter
The 16 value of the time variation between leading and trailing edges of a specific (I3 … I11) pit
or land as measured by Time Interval Analysis.
Deviation
TOC
The difference between a fixed value of Pit length and Land length.
Table Of Contents : in the Lead-in Area the subcode Q-channel contains information about the
Tracks on the disc.
Packet
Writing
A method of writing data on a CD in small increments.
Two kinds of packets can be written : Fixed-length and Variable-length.
Write
Strategy
The shape of the HF write signal used to modulate the power of the laser.
The Write Strategy must be used for recordings necessary for disc measurements.
Information Wobble, ATIP, Disc Identification, Write Power, Speed Range OPC Parameters, etc are
Area recorded in the Information area of CD-RW Disc
Finalization The action in which (partially) unrecorded or logically erased tracks are finished and the Lead-in
and/or Lead-out areas are recorded or overwritten with the appropriate TOC subcode.
Logical Erase A method to remove information from a disc area by overwriting it with an EFM signal containing
mode 0 subcode
A logically erased area is equivalent to an unrecorded
Physical Erase The action in which previously recorded information is erased by overwriting with a CW laser
output.
After a Physical Erase action, the erased area on the CD-RW disc is in the unrecorded state
again.
Session
An area on the disc consisting of a Lead-in area, a Program area, a lead-out area.
Multi session A session that contains or can contain more than one session composed Lead-in and Lead-out
19
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The differences of CD-R/CD-RW discs and General CD-ROM
1. Recording Layer
Recordable CD has a wobbled pre-groove on the surface of disc for laser beam to follow track.
Track pitch(p)
a=30nm
CD-ROM (READ-ONLY DISC)
A
Iw
O
Radial Direction
a
Radial Error Signal
0.4~0.5 um
Groove
a
Land
CD-R and CD-RW Disc
Average center
(Pit)Groove
Land
Actual center
The Groove wobble
2. Disc Specification
ITEM
Standard
Record
CD-ROM
Yellow Book
Not available
> 0.6
CD-R
CD-RW
Orange Book II
Write once
> 0.6
Orange Book III
Re-Writeable
Tracking Signal I11/Itop
(HF Modulation)
0.55 > M11> 0.70
Read Laser Power(mW)
Jitter
< 0.5 mW
< 35 nsec
70 %
< 0.7 mW
< 35 nsec
65 %
< 1.0 mW
< 35 nsec
15 % ~ 25 %
6-45 mW
Reflectivity (Rtop)
Remark) Write Laser Power(mW)
14-65 mW
20
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3. Disc Materials
1) CD-ROM disc
• It is composed of Silver _ colored aluminum plate and Reflective layer.
• Groove (Pit) of aluminum plate make a track.
• Laser wavelength : 780 nm, Laser Power (Read): 0.5mW
• Signal is detected by the
difference of reflective beam
intensity between “pit” and
“Land” on the disc.
Label Printing
Protective Layer
Reflective Layer
Substrate
(Polycarbonate)
Pit
Laser Beam
2) CD-R disc
• It is so-called WORM (Write Once Read Many) CD.
• It is composed of polycarbonate layer, Organic dye layer, Reflective layer, and Protective
layer.Gold/Silver Reflective layer is used to enhance the reflectivity
• According to the kinds of Organic dye layer, it is divided by Green CD, Gold CD, Blue CD.
• Laser Wavelength : 780 nm, Laser Power (read) : 0.7 mW
• Recording Power : 8x(14~20mW), 16x(25~35mW)
• When some part of dye layer is exposed to laser heat, it’s color changs black.Therefore, writing and
reading is enabled by the difference of reflectivity between changed part and unchanged part.
• Polycarbonate layer has Pre_Groove which make a Track.
Pigment
Phtalocyanine
Cyanine
Reflective Layer
Gold/Silver
Color
Yellow/White
Gold/Silver
Dark Green/Bright Green
Dark Blue
Azo
Gold/Silver
Label Printing
Protective Layer
Reflective Layer
Organic Dye Layer
Substrate
(Polycarbonate)
Groove
Laser Beam
21
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3) CD-RW Disc
Label Printing
Protective Layer
Dielectric Layer(TL)
Recording Layer
Dielectric Layer(UL)
Substrate
(Polycarbonate)
Groove
Laser Beam
• It is composed of polycarbonate layer, alloy(silver, arsenic) layer, aluminum reflectivity layer, protective layer.
• An crystalized alloy layer is transformed into noncrystalized by the laser heat. Therefore, writing and reading
is enabled by the difference of reflectivity.
• It is possible to overwrite about 1000 times.
• Laser Wavelength : 780 nm, Laser Power (Read) : 1.0mW
• Recording Power : Erase (4~18mW), Write (6~45mW)
• When disc rewriting, new data is overwritten previously recorded data.
• Polycarbonate layer has a Pre-Groove which make a track.
4. Reading process of Optical Disc
Lens
H
D
θ
Beam
Spot
Numerical aperture: NA=nsinθ,
Focusing
Lens
n: Refractive index
Focus depth : H = λ/NA
laser spot diameter : D = λ/NA2
Laser Spot
at Constant
Read Intensity
Previously Recorded Marks
Groove
Land
Mirror
Reflected
Light
Signal
I
I
I
I
0
11
G
L
I
Laser Spot
Position
(Time)
I
top
3
22
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5. Writing Process of CD-R Disc
Incident
(Write)
Laser
Power
(Read)
(Read)
Laser Spot
Position
(Time)
a b c d e f
g
a
b
c
Laser
Spot
Below "ORP"– Mark Too Short
Reflected
Light
At Optimum Record Power ("ORP")
Signal
Above "ORP" – Mark Too Long
d
e
f
Recorded
Mark
g
Time
Reflected
Light
Signal
Laser Spot
Position
(Time)
a b c d e f
g
6. Writing process of CD-RW Disc
Write Power
Amorphous
Crystal phase
Melting/
quenching
Erase Power
Read Power
Heating/
gradual cooling
Erased state
Recorded state
(higher reflectivity)
(lower reflectivity)
Groove
Crystal
Amorphous
23
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7. Organization of the PCA, PMA and Lead-in Area
1) Layout of CD-ROM disc
Disc Center
Diameter 120 mm
Diameter 46 mm
Diameter 15 mm
Center hole Clamping and Label Area
Information Area
Read Only Disc
Lead-in Area
Program Area
Lead-out Area
2) Layout of CD-R/RW disc
Disc Center
Diameter 120 mm
Diameter 45 mm
Diameter 15 mm
Center hole
Information Area
Clamping and Label Area
Unrecorded Disc
Program Area
Lead-out Area
PCA PMA Lead-in Area
Test Area : for performing OPC procedures.
Count Area : to find the usable area immediately in T.A
Tsl : start time of the Lead-in Area, as encoded in ATIP
PMA : Program Memory Area
Test Area
Count Area
in
Tsl-00:35:65 Tsl-00:15:05
out
Tsl
Tsl-00:13:25
99:59:74
00:00:00
24
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8. Function of PCA and PMA area
1) PCA (Power Calibration Area)
• PCA area is used to determine the correct Laser Power for a disc.
– Method 1 : PCA area is divided by a track.
– Method 2 : The previous Calibration value is referred.
– Method 3 : ROPC is used to determine Laser Power value automatically in data writing.
• CD-R Disc can write maximum 99 Tracks but CD-RW Disc can write unlimited tracks because it has a rewritable
function.
2) PMA (Program Memory Area)
• It has a track information (track No, track Start/End time) of every track before writing completed.
– PMA area has the last written point and the next writable point of a disc.
– In case of CD to CD copy, some writer may not write PMA area.
* When Disc is Finalized,
PMA information is transferred to the Lead_In area so that general Driver can read it.
* Because PCA and PMA area exist before Lead-In area, General CD Player or CD-ROM Drive can’t read
these areas.
9. OPC and ROPC
1) OPC (Optimum Power Control)
• This is the first step of writing process, because CD writer has its own laser power value and media have different
writing characteristics,
– This is determined by the Writing characteristic, speed, temperature, and humidity.
– Laser wavelength is determined by the environmental temperature (775~795nm) and Optical Laser Power is
determined by the test and retry.
• Asymmetry and optimum writing Power
– EFM signal Asymmetry is determined by the writing power.
Therefore, Optical Power which has the same value to the preset power value can be estimated by measuring
HF signal Asymmetry on the PCA area.
• Measurement of Asymmetry
* Parameter setting (Beta) : Using AC coupled HF signal before equalization
Beta = (A1+A2)/(A1-A2)
A1
0
A2
P >> Po
P = Po
P << Po
Time
Time
Time
25
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2) ROPC (Running Optimum Power Control)
• Variable primary factor of Optimum Power
– Change of Power sensitivity on the Disc. (limited to 0.05 *Po)
– Wavelength shift of the laser diode due to the operating temperature change.
– Change of the Spot aberration due to the Disc skew,
Substrate thickness, Defocus.
Incident recording pulse
– Change of Disc or Optics conditions due to the long term OPC
==> It is necessary to adjust continuously to obtain the Optimum Power.
Sampled timing B
• Principle of Running OPC
– To meet the factors mentioned above,
a horizontal _ direction movement of a curve is uesd.
– Beta = f(B-level) = constant on the Recorded Disc
– Procedure of ROPC
a. Reference B-level is determined during OPC Procedure.
b. During Recording, B-level value is controlled to have a close
Reference B-level value.
Reflected recording pulse
c. Normalization of B-level is used to eliminate the effect of reflectivity fluctuation.
==> The reflected B-level value is normalized by the disc reflectivity itself.
Sample Disc Reflectivity
(Read power)
11T
Sampled at timing B
normalized to recording power
Level B with Pwo
Sample B-level (Write Power)
Pwo decided by OPC
Recording Power
10. Writing Process of DISC
Program Area
CD-R/RW Media
Write Strategy
Determination
PMA Area
PCA Test Area
Lead-In Area
PCA Count Area
Lead-out Area
* Recording Capacity of CD-R/RW (74Minute Recording media)
• (2048 Byte/Sector) X (75 Sector/Second) X (60 Second/Minute) X 74 Minute
= 681,984,000 Bytes = 682 Mbytes
• But the actual recording capacity is about 650 Mbytes. (according to the ISO 9660 standard, approximately
30 Mbytes are used to make directory structure and volume names.)
26
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The differences of DVD-R/RW, DVD+R/RW discs and DVD-ROM
1. Recording Layer
DVD-ROM (Read Only Disc)
0.4um
DVD-R/RW Disc
LPP
(Land Pre-Pit)
DVD+R/RW Disc
27
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2. Disc Specification
DVD-ROM
Single-Layer Dual-Layer
DVD-R
DVD-RW
DVD+R
DVD+RW
Media Type
User data capacity
Wavelength
Read Only
4.7GB
650nm
45~85%
0.74
Read Only
8.54GB
650nm
18~30nm
0.74
Dye
4.7GB
650nm
45~85%
0.74
Phase change
4.7GB
Dye
4.7GB
650nm
45~85%
0.74
Phase change
4.7GB
650nm
18~30%
0.74
650nm
18~30nm
0.74
Reflectivity
Track pitch
0.4
0.44
0.4
0.4
0.4
0.4
Minimum pit length
Modulation
>0.6
>0.6
>0.6
>0.6
>0.6
>0.6
26.16MHz
-
26.16MHz
-
26.16MHz
140KHz
26.16MHz
140KHz
26.16MHz
817.4KHz
26.16MHz
817.4KHz
Channel bit-rate
Wobble Frequency
Addressing
26.16MHz
26.16MHz
Wobble & LPP Wobble & LPP Wobble(ADIP) Wobble(ADIP)
+
+
0.7
0.1
0.7
0.1
Read Power (mW)
Write Power (mW)
JItter
-
-
<8%
<8%
<8%
<8%
<9%
<9%
3. Disc Materials
1) DVD-ROM
<Single Layer >
Label
Polycarbonate
Bondinglayer
Reflectivelayer
Polycarbonate
<Dual Layer >
Label
Polycarbonate
Reflectivelayer
Bondinglayer
Semi-reflective
Polycarbonate
28
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2) Recording format using organic dye material (DVD-R/DVD+R)
* The format that records data through the creation of recorded marks by changing the organic dye material
with a laser beam.
> Disc structure
DVD-R
DVD+R
Adhesive layer
Protective layer
Adhesive layer
Protective layer
Reflective layer
Recording layer(dye)
Reflective layer
Recording layer(dye)
Disc substrate
Disc substrate
> Disc structure
[Recording]
Recording is done by changing the organic dye layer and the substrate with a laser when a strong is
applied to a disc, the temperature of the ortanic dye material goes up, the dye is decomposed and the
substrate changes at the same time. At this time, a durable bit is created as is the case with a CD-ROM.
[Playback]
Signals are read with the differences of the reflection of a laser from pits.
Adhesive layer
Protective layer
Reflective layer
Dye layer
Substrate
Laser beam
29
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3) Recording format using phase-change recording material (DVD-RW/DVD+RW)
* Data is recorded by changing the recording layer from the amorphous status to the crystalline status, and
played back by reading the difference of the reflection coefficient.
[ Amorphous : Non-crystalline ]
> Disc structure
DVD-RW
DVD+RW
Adhesive layer
Protective layer
Adhesive layer
Protective layer
Reflective layer
Dielectric layer
Reflective layer
Dielectric layer
Recording layer
(Phase change material)
Recording layer
(Phase change material)
Dielectric layer
Dielectric layer
Disc substrate
Disc substrate
> Recording principles
[Recording]
When a high-power laser is applied to the recording material, it melts and then becomes amorphous with
a low reflection coefficient when it quickly cools off. When a mid-power laser is applied to heat gradually
the recording material and then gradually cools it off, it becomes crystal with a high reflection coefficient.
[Playback]
A low-power laser is used for playback. The amount of reflected light depends on the status (amorphous
or crystalline) of the recording material. This is detected by an optical sensor.
Substrate
Laser beam
Amorphous status
Crystalline status
Recording data
(Melting/Quick cooling)
Erasing data
(Heating/Gradual cooling)
Data erased state
Recorded state
(High reflection coefficient)
(Low reflection coefficient)
30
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4. Writing Pulse Wave Form of DVD+R
For different speed ranges, different write strategies can be used. This document specifies 2 options:
- a pulsed write strategy, where each single mark is created by a number of subsequent separated short
pulses.
- a blocked write strategy, where each single mark is created by one continuous pulse.
1) 1st Method : Using Pulsed Write Strategy
* 3T :
T = 3
NRZI
Channel bits
2Tw
Ttop
dTtop
Pp
Pb
dTle
N = 3 : only the top pulse(Ttop ),
first pulse lead-time dTtop , dTle
* > 4T :
T > 4
NRZI
2Tw
Tw
Channel bits
Ttop
Tmp
Tmp
Tlp
dTtop
dTle
Pp
Pb
N > 4 : the top pulse (Ttop ), multi-pulse (Tmp ) and last pulse (Tlp ),
first pulse lead-time dTtop, dTle
Pp : Actual write power
Pb : Bias Power
31
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2) 2st Method : Using Blocked Write Strategy
NRZI
Channel bits
Tw
2Tw
dT
Tlp
top
Tmp
T
top
dPp
1.25Tw
Pc
dT
le
Pp
Pb
Pb
0mW
dT
top,3
dP
p3
1.25Tw
Pc
3T mark
Pb
Ttop,3
dT
le
dT
top,4
dP
p4
1.25Tw
4T mark
5T mark
Etc.
Ttop,4
Tlp
1.25Tw
Ttop,4
Tmp Tlp
1.25T
w
Ttop,4
Tlp
Tmp
Tmp
N = 3 : T (cm = 3) can be optimized individually.
top
>
>
N
4 : T (cm 4) + (N-3) x T + T , T = T
mp
lp
top
w
w
P shall be < 0.1mW
c
Pp : Actual write power
Pb : Bias Power
dPp : Additional power ( Only be applied for the 3T and 4T marks)
Pc : Cooling power (Especially at higher recording speeds, optimum cooling down of the
needed.)
recording layer after writing a mark may be
32
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5. Writing Pulse Wave Form of DVD+RW
NRZI
Channel bits
Tw
2Tw
Ttop
Tmp
Tmp
Tmp
dTera
dTtop
Pp
Pe
Pb
0mW
Pp : Actual write power
Pe : Erase Power
Power
Pb : Bias
33
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6. Organization of the Inner Drive Area, Outer Drive Area, Lead-in Zone and
Lead-out Zone
1) Layout of DVD-ROM disc
Disc Center
Diameter 120 mm
Diameter 44 mm
Diameter 33 mm
Diameter 22 mm
Diameter 16 mm
Diameter 15 mm
Clamping
Zone
Center
hole
3rd transtion
area
Information Zone
1st transition area
Rim area
2nd transition area
Read Only Disc
Data Zone
Lead-in Zone
Lead-out Zone
2) Layout of DVD+R disc
Disc Center
Diameter 120 mm
Diameter 44 mm
Diameter 33 mm
Diameter 22 mm
Diameter 16 mm
Diameter 15 mm
Clamping
Zone
Center
hole
3rd transtion
area
Information Zone
1st transition area
Rim area
2nd transition area
Unrecorded Disc
Data Zone
Outer Drive
Area
Lead-in
Zone
Lead -out
Zone
Inner Drive
Area
Inner Disc
Test Zone
Inner Disc
Count Zone
Outer Disc
Test Zone
Outer Disc
Count Zone
in
OUT
PSN: 23080H 27080H 27480H 28480H 2A480H 30000H 260540H 261940H 262940H
267940H
263940H
> Inner Disc Test Zone : for performing OPC procedures.
> Inner Disc Count Zone : for counting the number of OPC algorithm performed in IDT Zone.
> Outer Disc Test Zone : for performing OPC procedures.
> Outer Disc Count Zone : for counting the mumger of OPC algorithm performed in IDT Zone.
34
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3) Layout of DVD+RW disc
Disc Center
Diameter 120 mm
Diameter 44 mm
Diameter 33 mm
Diameter 22 mm
Diameter 16 mm
Diameter 15 mm
Clamping
Zone
Center
hole
3rd transtion
area
Information Zone
1st transition area
Rim area
2nd transition area
Unrecorded Disc
Data Zone
Lead -out Zone
Lead-in Zone
Inner Disc Inner Disc
Test Zone Count Zone
Outer Disc
Test Zone
Outer Disc
Count Zone
in
OUT
PSN: 2A480H
2A7C80H
2DC80H
30000H
260540H
262940H
266140H
265940H
> Inner Disc Test Zone : for performing OPC procedures.
> Inner Disc Count Zone : for counting the number of OPC algorithm performed in IDT Zone.
> Outer Disc Test Zone : for performing OPC procedures.
> Outer Disc Count Zone : for counting the number of OPC algorithm performed in IDT Zone.
35
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LightScribe Media
1. LightScribe Media
DiscOD
Label Zone
Control Feature Zone
Clamping/Logo Zone
Center Hole
Screen Printed Imaging Layer
Clear Protective Coating
Reflective/Thermal Layer
Dye Data Layer
Polycarbonate
Substrate
36
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2. Hardware Block Diagram of LightScribe Label Printing
37
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3. MD Assy For LightScribe
Optical Encoder Unit
38
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4. Optical Encoder Assy
Codewheel
Direction of
radial play
Encoder PCB
Optical Encoder IC
PIN 6
VCC
PIN 5
CH A
PIN 4
GND
PIN 6
VCC
PIN 1
CH B
PIN 2
GND
PIN 5
CH A
PIN 4
GND
PIN 3
VLED
PIN 1
CH B
PIN 2
GND
PIN 3
VLED
Schematic of Enc PCB
V
LED
R
CODEWHEEL
OR
GND
CODESTRIP
GND
Vcc
V
CC
FFC
3PIN
CH A
CH B
SIGNAL
PROCESSING
CIRCUITRY
OFG
CH B
39
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DVD & CD DATA PROCESSING
1. Data Processing Flow
40
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2. Copy Protection and Regional Code Management Block
Block Diagram
Change the "KEY"
HOST DVD
R8J32007
PLAYER
(EMPEG2 B/D)
Scrambled MPEG Data
KEY Management Control
Brief Process
1. Regional Code for DVD Disc
– DVD-ROM drive transfers the regional code of the control data to host by the command of host, the DVD
player of host reads the regional code, and plays title in the case of allowed regional code only.
2. Management of DVD Disc for the scrambled of data
(1) DVD-ROM and DVD player of host generate the “KEY 1” respectively, transfer to opposite part, the
“KEY 2” is received, recognizes the data transfer or not with this value, and generates the bus key
encoded the data.
(2) Encoded “Disc Key” and “Title Key” host is transfer with the bus Key.
(3) DVD player of host reads the key value, and uses the value to restore the scrambled data.
* Refer to the next page for the details.
41
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3. About Prevention the DVD-ROM from to be copy
A data is able to encode and record in the disc, if a copyright holder wants to prevent the disc from copying.
In case of a disc enhanced movie of 3 titles......
DISC KEY (2048 Bytes) is used to encode the whole contents in the disc and TITLE
KEY (5 Bytes) is used to encode the title respectively.
So, the data is encoded and stored in a disc through the unknown algorithms
with a disc key and title key. (At this time, the disc key and title key are stored
in a disc.)
…As above, the disc is able to copy when the disc key and title key are
opened.
Then, ROM-DRIVE encodes the disc key and title key and transfers to MPEG-
2 board.
If you want to play the disc prevented from the copy......
First of all, ROM-DRIVE and MPEG-2 board identify with each other through the procedure as described
below.
AGID
HOST
ROM-DRIVE
Challenge key
MPEG-2
BOARD
encoded disc key, title key
1. Drive and host gives and takes the ID of 2bit. This ID is AGID (Authentication Grant ID).
The various decoder boards are attached to the host, in these, AGID sets the MPEG-2 board and drive.
2. After the AGID is set, MPEG-2 board generates the challenge key (10 Byte) and transfers to drive. The
board and drive generate key 1 (5Byte) with the challenge key respectively. (Of course, the Algorithm
generating the key 1 is not known.)
3. Compare with the generated key 1, if it corresponds each other, the first step of authentication is
completed. This is a course to identify the MPEG-2 board with a drive.
4. The second step of authentication is a course to identify a drive with the MPEG-2 board.
The dirve generates a challenge key and transfers it to the MPEG-2 board. The dirve and MPEG-2 board
generate the key 2 (5Byte) with the challenge key, compare with each other, and if it corresponds and the
secondary step of authentication is completed.
5. As above, the identification is completed.
6. The dirve and MPEG-2 board generate the Bus key with the key 1 and key 2 and own it.
7. Dirve encodes the disc key and title key with this Bus key and transfers to the MPEG-2 board.
8. The MPEG-2 board reads the encoded disc key and title key with the Bus key only.
9. MPEG-2 board lets data read from the drive to decode with the read disc key and title key and makes into
the video signal by decoding.
42
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4. About the DVD-ROM Regional Code
Regional code
5
1
GRL
RUS
FIN
CAN
FST
LTU
2
BIR
POI
UKR
MNG
U.S.A
TKM
TUR
CHN
KOR
TWN
JPN
BMG
1
JRN
AFG
PAK
6
MIX
FGY
2
1
PRI. VIR
BHS
HKG
MAC
MMR
CUB
MNP
PHL
MDI
GUM
3
PLW
PNG
1
5
AUS
ZAF
ISO
SWZ
NZL
2
4
4
DISC
ROM - DRIVE
MPEG-2 BOARD
VGA CARD
MONITOR
Transfer to
MPEG-2 board
reading the
Receiving
data from the
MPEG-2
board and
output
through the
monitor
If the board is setting to the regional
code 1 for the U.S.A. ...
Check the received regional code to
number 1, all or not, transfer the
data to VGA card in accordance with
only a case among the three case.
The disc has
the regional
code of 8 bit.
regional code.
Example)
The disc
manufactured
in the U.S.A,
has the
number one.
43
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INTERNAL STRUCTURE OF THE PICK-UP
1. Block Diagram of the PICK-UP(HOP-7632TS)
Tilt-
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
Tilt+
IC2(FM)
TR-
TR+
CD-VR
R14
AF-
5
6
4
3
2
1
AF+
Rd
GND(FM)
FM
7
8
C12
DVD-VR
VREF
SEL
C13
VCC(FM)
ENA
R2
C3
IAPC
SLG
VSA5
VSL25
CLK
R1
R4
IC2(LDD)
9
16 15 14 13 12 11 10
VSO
CLKB
GND(LDD)
NRZB
NRZ
FB2
DVD-LD
17
18
19
20
21
22
23
24
25
VSA
C2
8
7
6
5
4
OUT2
OUT2
VSO
VSL
CLK
C1
FB1
CLKB
R7
R8
GND(LDD)
MONITOR
RWB
GND
GND
VSO
GND
OUT1
OUT1
VSO
NRZB 3
SDIO
SCLK
BUSY
NRZ
2
CD-LD
RWB
1
26 27 28 29 30 31 32
SEN
18
17
16
15
14
13
12
11
10
VSO
C5
C6
FB3
Vcc(FM)
C9
C10
GND(OEIC,TEMP)
Rth
RF-
RF+
E2+F2
C
IC3(OEIC)
EF4
7
6
5
4
3
2
1
GND
VD
8
F4
F3
F1
F2
EF1
VA
9
C14
A
VCC
10
11
12
13
14
C15
D
A
E1+F1
9
8
7
6
5
4
3
2
1
VS
VB
E4+F4
C
B
VEF2
VREP
VRFN
VC2
VEF3
SW
D
B
E4
E3
E1
E2
E3+F3
GAINSW
Vc(OEIC)
Vcc(OEIC)
GND(OEIC,TEMP)
Behind View
DVD-LD : 1st Vendor : Rd = 82k
DVD-LD : 2nd Vendor : Rd = 5.6k
44
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2. Pick up Pin Assignment
No.
Signal Name
I/O
Signal Description
1
GND(OEIC,TEMP)
Vcc(OEIC)
Vc(OEIC)
GAINSW
E3+F3
B
Ground for OEIC
2
I
I
Power supply for OEIC
3
Reference voltage input for OEIC
OEIC output gain control (High:Low gain, Middle:Middle gain, Low:High gain)
Single OEIC output EF3
4
I
5
O
O
O
O
O
O
O
O
O
O
O
O
I
6
Single OEIC output B
7
D
Single OEIC output D
8
E4+F4
E1+F1
A
Single OEIC output EF4
9
Single OEIC output EF1
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
Single OEIC output A
C
Single OEIC output C
E2+F2
RF+
Single OEIC output EF2
Single OEIC RF positive differential output
Single OEIC RF negative differential output
Ground for OEIC and TEMP
RF-
GND(OEIC.TEMP)
TEMP
VSO
Output voltage for controlling temperature
Supply voltage for the output drivers only
Serial control enable (H=enable, L=disable)
Goes high when serial transfer to timing menory is active
Serial control clock
SEN
I
BUSY
SCLK
O
I
SDIO
I/O
I
Serial data for parameters and control ; in/out
Write enable for NRZ laser data (L=write, H=read)
Monitor output
RWB
MONITOR
GND(LDD)
NRZ
O
Ground connection for LD Driver-IC
NRZ laser data (H=mark, L=space) (LVDS+)
NRZ laser data (H=mark, L=space) (LVDS-)
Ground connection for LD Driver-IC
CLOCK for NRZ code input (LVDS-)
CLOCK for NRZ code input(LVDS+)
Supply voltage for 2.5V logic
I
I
NRZB
GND(LDD)
CLKB
I
I
I
I
I
I
I
I
I
CLK
VSL25
VSA5
Supply voltage for PLL only
SLG
Land/groove input serects the power register set (H=land, L=groove)
A low inpedance current input ; 100xIAPC frow to the output
Fast chip enable input
IAPC
ENA
VCC(FM)
SEL
Power supply for FM
Low: selects
High: selects
DVDFMOUT
CDFMOUT
37
38
39
40
41
42
43
44
45
VREF
FM
I
APC amplifier reference voltage input
APC amplifier output
O
GND(FM)
AF+
Ground connection for FM
I
I
I
I
I
I
Focusing Actuator drive signal+
Focusing Actuator drive signal-
Tracking Actuator drive signal+
Tracking Actuator drive signal-
Tilting Actuator drive signal+
Tilting Actuator drive signal-
AF-
TR+
TR-
Tilt+
Tilt-
45
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3. Signal detection of the P/U
Infrared Iaser
Focusing
Pick-Up module
Tracking
Photo Diode
1) Focus Error Signal ==> (A+C)-(B+D)
This signal is generated in RF IC (IC101 : R2S35002) and controls the pick-up’s up and down to focus on
Disc.
2) Tracking Error Signal (DPP Method) ==> {(A+D)-(B+C)}- k x {(EF1+EF4)-(EF2+EF3)}
This signal is generated in RF IC (IC101 : R2S35002) and controls the pick-up’s left and right shift to find
to track on Disc.
3) RF Signal ==> (A+B+C+D)
This signal is converted to DATA signal in DSP IC (IC301 : R8J32007).
Track Center
Tp/2
Sub1
F,E
D,C
A,B
Main
Sub2
H,G
Tp
k[(F+H) - (E+G)]
Offset
TE
(A+D) - (B+C)
(A+D) - (B+C) - k[(F+H) - (E+G)]
46
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DESCRIPTION OF CIRCUIT
1. ALPC (Automatic Laser Power Control) Circuit
1-1. Block Diagram
47
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1-2. ALPC (Automatic Laser Power Control) Circuit
ALPC function DVD/CD anlaog front-end IC(IC101 R2S35002) is for constant power control purpose. Based on the
accurate power sensor(FMON) in P/U, ALPC feedback loop maintains constant power level against laser diode’s
temperature variation.
The ALPC loop amplifies(10x) the FMON signal to enhance the accuracy of read power level control. Swithching of
amplification is made by combination of a logical WGATE signal and a logical RWAPC signal.
There are two set of APCDAC, which are used at different term to monitor different power level. Generally, the one is used
at reading and the other one is used at writing. The logical WGATE signal which is switched between reading and writing
changes the two APCDAC.
The ALPC loop supplies same currency (IAPC) to Laser Diode Driver(LDD) during reading and writing.
There is another ALPC which controls Full-Scale-DAC (FsDAC). FsDAC determines scale of WDAC of Laser Diode Driver.
MPU monitors write-power level of FMON signal and changes FsDAC directly to maintain constant write-power level. There
are two write power signal. The one is based on S/H signal and the other one is based on B/H(Bottom-Hold) signal. The
write power levels are monitored as digital levlels which are converted by built-in Anlog-Digital Converter in DSP. The MPU
monitors each write power level and calculates proper setting of FsDAC, and changes value through serial interface
between LDD and DSP.
48
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2. Focus Circuit
2-1. Block Diagram
A+B+C+D
HAVC
LS
to
PE
3
2
LPF
G
G
A,B,C,D
0.8V
IC101
R2S35002
HAVC
LS
to
A,B,C,D
LPF
FE
(EF1~EF4)
FE
R102
V14
(A+C)-(B+D)
Disc
Motor unit
Optical
Pick-up
(A+C)-(B+D)+K[(EF1+EF3)-(EF2+EF4)]
C405
HOP-7632TS
R103
C406
FOD
FE
Focusing
Compensator
GND
PE
180
DAC
169
170
ADC
IC301
R8J32007
FACT+
FACT-
GND
R329
C335
FOIN
FACT+
FACT-
34
35
FOD
40
REF
IC601
42
1.65V
R2S30202FP
EN1
EN2
20
21
CTL1
CTL2
2-2. Focus Servo
The aim of Focus Servo is to maintain the distance between object lens of P/U and disc surface, so that the
detected RF signal(A, B, C, D, EF1, EF2, EF3, EF4) can be maximized.
Focus Error Signal(FE) generates from focus error detection block in RF IC(R2S35002) using Conventional
Astigmatism Detection method, Differential Astigmatism Detection method.
Focus Gain and path can be changed at the RF IC(R2S35002) according to the disc, and the resulting output
FE(R2S35002 2pin) is input to DSP IC(R2S35002 169pin).
The Focus Search operation is using FE, PE Signal, therefore check FE, PE signals when Focusing is failed.
The role of DSP IC(R8J32007) is Focus Digital Controller. The operation path is as follows;
FE Signal is input to DSP IC(R8J32007 169pin), and after A/D Conversion, Digital Equalizer Block and D/A
Conversion in R8J32006FP, the output signal FOD(R8J32007 180pin) is input to Drive IC(R2S30202FP 40pin).
The drive output signal FACT+/FACT- generated according FOIN(R2S30202FP 40pin), and drives focus
actuator in the P/U unit.
49
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3. Tracking & Sled Circuit
3-1-1. Block Diagram (Tracking Following)
IC101
MPPO
R2S35002
(A+D)-(B+C)
HAVC
LS
to
L
P
F
L
P
F
SPPO
A,B,C,D
TE
1
G
(EF1~EF4)
TE
V14
R101
Disc
Motor unit
Optical
Pick-up
(A+D)-(B+C)-K[(EF1+EF4)-(EF2+EF3)]
HOP-7632TS
C101
TRD
GND
Tracking
Compensator
DAC
DAC
181
ADC
173
TE
SL2
SL1
TACT- TACT+
183
182
Sled
Compensator
IC301
R8J32007
A+
A-
B+
B-
SLED MOTOR
Unit
(CN601)
R330
TOIN
TACT+
TACT-
36
39
TRD
IC601
R2S30202FP
C336
1.65V
R372
37
EN1
EN2
SL2N
SL1N
SL2P
1.65V
20
CTL1
CTL2
A-
B-
A+
8
21
2
10
R331
R332
SL1IN
SL2IN
SL2
6
9
C337
R373
SL1P
3
SL1
B+
C338
R374
42
REF
1.65V
C604
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3-1-2. Block Diagram (Seek)
IC101
MPPO
R2S35002
(A+D)-(B+C)
SPPO
HAVC
LS
to
L
P
F
L
P
F
-
(EF1~EF4)
A,B,C,D
1
G
TE1
+
V14
[(EF1+EF4)-(EF2+EF3)]
A+B+C+D
Disc
Motor unit
Optical
Pick-up
HOP-7632TS
VREF1
L
P
F
+
-
VREF1
TACT+
TACT-
HAVC
LS
to
L
P
F
G
MIRR
DET
38
MIRR
A+
A-
V14
B+
B-
SUMF 79
EQ
AGC
TOP
HOLD
BOTTOM
HOLD
80
81
RFIP
RFIN
SLED MOTOR
Unit
63
62
MIRRTOPH
C128
MIRRBOTH
C127
GND
TE
GND
GND
C101
173
IC301
R8J32007
R101
TE1
Track Counter
and Timer
IP2MIRR
MIRR
149
TRD
Short
Seek
Algorithm
D
A
C
Tracking
Compensator
181
M
U
X
A
D
C
SL2
SL1
Loog
Seek
Algorithm
D
A
C
183
182
Sled
Compensator
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3-2-1. Tracking Servo
The aim of tracking servo is to make laser beam trace the data track on disc.
Tracking Error(TE) Signal is generated from tracking error detected block in R2S35002 using DPP(Differential
Push-Pull) Method and DPD (Differential Phase Detection) Method.
DPP Method uses not only main beam(A, B, C, D) but also side beam(EF1~EF4) for correcting DC offset
generated in Push-Pull Method.
The remaining procedure of TE signal processing in R8J32007 is similar to Focus Servo.
The role of DSP IC(R8J32007) is Tracking Digital Controller.
TE Signal is input to DSP IC(R8J32007 173pin), and after A/D Conversion, Digital Equalizer Block and D/A
Conversion in R8J32007, the output signal TRD(R8J32007 181pin) is input to Drive IC(39pin).
The drive output signal TACT+/TACT- generated according TOIN(R2S30202FP 39pin), and drives tracking
actuator in the P/U unit.
3-2-2. Sled Servo
The working distance of tracking actuator is too short to cover whole disc radius.
Sled Servo make P/U move by little and little so that the laser beam keep tracing the data track on disc
continuously when tracking actuator reaches the working limit.
TE Signal is input to DSP IC(R8J32007 173pin), and after A/D Conversion, Digital Tracking Equalizer Block,
Digital Sled Compensator Block and D/A Conversion in R8J32007, the output signal SL1, SL2(R8J32007 182,
183pin) is input to Drive IC (R2S30202FP SL1:3 pin, SL2:2pin) after Low-Pass filtering.
52
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4. Spindle Circuit
4-1-1. Block Diagram(FGCAV Servo)
Optical
Pick-up
HOP-7632TS
Disc
Motor unit
X301
33.8688MHz
XCO
XCI
VCK4M
IC301
R8J32007
106
107
Control Clock
Generator
SFG
R361
SPD
211
R349
SPD
P
W
M
M
U
X
CAV FD
213
+
CAV PD
VCK4M
R375
Motor Kick
REG
3.3V
C349
1.65V
SPIN
SPD
1
12
U
IC601
DAVC
13
14
42
V
1.65
R2S30202FP
W
CTL1
20
CTL1
CTL2
CTL2 21
19
SFG
FG
4-1-2. FG CAV Servo
1) CD 48x CAV : CD-ROM, CD-R
2) CD 40x CAV : CD-RW
3) DVD 8x CAV : DVD+RW
4) DVD 10x CAV : DVD+R
5) DVD 12x CAV : DVD-ROM DL
6) DVD 16x CAV : DVD-ROM
7) DVD 16x PCAV : DVD+R
When drive read PRESS CD, Closed Session CD-R/RW, the spindle motor is controlled using FG CAV Spindle
Servo. FG signal(R2S30202FP 19pin) input to SFG in DSP IC(R8J32007 213pin).
The spindle controller in DSP IC uses SFG as spindle rotation frequency feedback, therefore the FG CAV
Spindle Servo doesn't work well if FG generation is abnormal.
The spindle controller PWM output signal SPD(R8J32007 211pin) input to SPIN in Drive IC(R2S30202FP 1pin)
after Low-Pass Filtering.
The PWM output signal U, V, W signal(R2S30202FP 12, 13, 14pin) drives Spindle Motor without using a
sensor, and FG pulse output is generated as 18 pulses/rotation.
53
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4-2-1. Block Diagram (Wobble CLV Servo)
C116
C117
C118
WAG1
WAG2
WAG3
18 19
20
SA
87
ADO
SB
HPF
HPF
AGC1
AGC2
S
/
H
-
88
89
90
92
HPF
SC
+
SD
MA
Disc
BCO
Motor uni
t
Optical
Pick-up
C171
C172
MB
BPF
HPF
HPF
AGC3
HOP-7632TS
93
MC
MD
WOBSIG
94
95
+
-
C173
C174
37
VREF
GND
WBLSH
IC101
R2S35002
31
WBLSH
IC301
1.65V
R8J32007
154
R375
SPD
SPD
P
W
M
M
U
X
SP
PH
211
R349
C349
Motor Kick
REG
1.65V
4-2-2. Wobble CLV Servo
CD-R : 4x, 8x, 16x, 24x, 32x, 40x, 48x
/CD-RW : 4x, 10x, 16x, 24x, 32x
/DVD-R : 2x, 4x, 8x, 16x(PCAV)
/DVD-R DL : 2x, 4x
/DVD-RW : 1x, 2x, 4x, 6x
/DVD+R : 2.4x, 4x, 8x, 12x, 16x(PCAV)
/DVD+R DL : 2.4x, 4x, 6x
/DVD-RAM : 2x, 3x, 3-5x(PCAV)
/DVD+RW : 2.4x, 4x, 8x
When drive write DVD-RAM/R/RW/+R/+RW/CD-R/CD-RW, the spindle motor is controlled using Wobble CLV
Spindle Servo.
The WOBSIG signal(R2S35002 37pin) input to DSP IC(R8J32007 154pin). The DSP Controller in R8J32007
uses WOBSIG as linear velocity feed back, therefore the Wobble CLV Spindle Servo doesn’t work well when
WOBSIG signal is abnormal.
The spindle controller PWM output signal SPD (R8J32007 211pin) input to SPIN in Drive IC(R2S30202FP 1pin)
after Low-Pass Filtering.
The PWM output signal U,V, W signal(R2S30202FP 12, 13, 14pin) drives Spindle Motor without using a sensor.
54
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MAJOR IC INTERNAL BLOCK DIAGRAM AND PIN DESCRIPTION
IC101 (R2S35002) : RF AMP Analog Signal Processor
Pin Assignment
75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
76
77
78
79
80
81
82
AGFU
AGFR
MCLK
50
49
48
PORT07
PORT06
PORT05
(5V)VCC1
47
46
45
44
43
SUMF/SUMF2
PORT04
PORT03
PORT02
PORT01
PORT00
RFIP
RFIN
SRVREF
FVREFO
IREFT
83
84
42
41
VREF1
HAVC
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
GND4
R2S35002
(TOP VIEW)
DFT
40
39
IP1/LPPOUT
SA
38
37
36
IP2/MIRR
SB
SC
WOBSIG
SD
BLANK
(3.3V)VDD2
LO_ZB/SPDSH
35
34
MA
IDGATE
MB
MC
RFHLD/TISH1
WGATE
33
32
31
MD
WBLSH
GND2
30
29
MPDSH/SPDSH
WFPDSH
AIN1
AIN2
28
27
26
RFPDSH
AIN3
SPBLVL/TISH2
LNDTRK
SIGM
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Block Diagram
*3300p
3300p 0.1u
Lo-Z function by IDGATE.
12k
(*2)
VREF1
4700p
.
0.47u
fast mode
. 3.3us
*3300P/0.068u
Lo-Z function by IDGATE.
D
D
D
mclk
to MIRR.DEFECT
0.068u
RFIP
RFIN
EQOP
EQON
SUBP.N
RF
EQ
RF SLIM/SUB
(RGA)
RF
AGC
HP2
HP3
EQ-
AUTO
SUMF2
to WRF
0.068u
EQOS
M
U
X
IP1/LPPOUT
IP2/MIRR
ATEST
LPPMON/EQOS/RRF/WRF
D
D
M
U
X
mclk
ID
DET
BHC
15,000p
VREF1
MIRR
M
U
X
SUBO/LPPMON
SUBI/LPPSIG
LPP
SUBW
mclk
2200p
MA
WOBFCF
2
F0-CNT
Wobble
0.47u
VREF1
MB
MC
MD
Pick
I/F
WOB
S/H
AWOBSIG
WOBSIG
to A/D
0.1u
AGC1
AGC2
D
SUB
BPF
AGC3
BPO
COMP
*HPF fc=1kHz
WAG3
WAG1
WAG2
4
S/H
S/H
main
SA
SB
SC
SD
0.1U
0.12U
0.12U
LNDTRK
TE
4
D
BALANCE
TE
FE
sub
to LPF,A/D
DPD
to LE
MPP SPP
FE
PE
BALANCE
toLPF,A/D
toLPF,A/D
HAVC
pick-up I/F
reference level
PE
MPP
SPP
SHPE
RRF
HFSUM HFPE
WBLSH
FE
D
D
MPDSH/
SPDSH
MUX
LE
MCLK
BLANK
LO_ZB/SPDSH
pin
toLPF,A/D
SUMF2
M
U
X
WRF
WRF
mclk
D/A
SRVREF
IREFT
RECD
power 3.3V
20k(*1)
SAV
RECD
VHALH(=VDD/2)
VREF1(=2.1V)
FVREFO(=2.5V)
D
VREF
MIRRTOPH
MIRRBOTH
0.033u
VREF1
MIRRHPF
VFREFO
EQOP/N
IP2/MIRR pin
MIRR
DEFECT
0.033u
0.068u
0.1u
TOPH
BOTH
DFT
MRSTB
SDEN
MIRR
D
D
D
D
0.033u
Programm
able I/O
port
Power
Cont.
Serial
Cont.
Reg.
SCLK
D
D
SDATA
RFHLD/TISH1 pin
SPBLVL/TISH2
12
PORT00~07.10~13
WGATE
TIE
D
D
SPBLVL
LO_ZB/SPDSH
WGATE
D
D
R-OPC
OPC
PHBETA/TCE
BHBETA/TIE
BCENT
APC
RFPDSH
BPO
toLPF,A/D
toLPF,A/D
GCAOUT
PWWMON
BHOUT
FVREF
FMD
toLPF,A/D
RFHLD/TISH1 pin
3
each blocks
AIN1~3
SIGM
SIGM
toLPF,A/D
D
...Combined pin
...digital pin
(*1), (*2)...1% Resistor
In the case of
analog APC
D
D/A
...digital/analog pin
power 5V
power 3.3V(VDD)
56
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• Pin Functions
pin Name
pin No. Type
max. voltage
Function
TE
1
2
3
4
5
6
Analog-Output
Tracking error output terminal
FE
Analog-Output
Analog-Output
Analog-Output
Analog-Output
Analog-Output
Focus error output terimnal
PE
PE output terminal
LE
Lens error output terminal
BCENT
PHBETA/TCE
OPC center signal output terminal
OPC top hold level signal and APC write sampleing
signal output terminal/tilt servo detecting output terminal
OPC bottom hold level signal and R-OPC sampleing
signal output terminal/tilt servo detecting output terminal
Power supply connected terminal(5V)
Reference voltage for APC input terminal
APC monitor diode input terminal
BHBETA/TIE
7
Analog-Output
VCC2
8
Power
FVREF
FMD
9
Analog-Input
Analog-Input
Power
VDD
VDD
10
11
12
13
VDD3
Power supply connected terminal(3.3V)
Terminal to control laser drivers for APC read system
Terminal to connect laser driver control filters for APC
read
LDOUT
VRDC3N
Analog-Output
External-components required
External-components required
External-components required
External-components required
VRDC2N/PWRMON
VRDCN
14
15
16
Terminal to connect laser driver control filters for APC
read/ SH monitor output terminal
Terminal to connect laser driver control filters for APC
read
VRDC
Terminal to connect laser driver control filters for APC
read
GND3
17
18
19
20
21
Ground
Ground connected terminal
WAG1
WAG2
WAG3
WOBFCF
External-capacitor required
External-capacitor required
External-capacitor required
External-capacitor required
Terminal to connect WOBBLE AGC detector capacitor
WOB-BPF f0 auto-adjustment external capacitor
connected terminal
VDD5
22
23
24
25
26
27
Power
Power supply connected terminal(3.3V)
Renesas analog test signal output terminal
Analog-level WOBBLE signal output terminal
Ground connected terminal
ATEST
Analog-Output
Analog-Output
Ground
AWOBSIG
GND5
LNDTRK
SPBLVL/TISH2
Digital-Inputpull-up
Digital-Inputpull-up
VDD
VDD
Balans adjustment mode selection
R-OPC WRF signal sampling pulse input terminal
/Tilt servo detecting sampling pulse input terminal
APC read system sampling pulse input terminal
APC write system sampling pulse input terminal
Pickup input sampling pulse input terminal
WOBBLE sampling pulse input terminal
Read/write control input terminal
RFPDSH
28
29
30
31
32
33
Digital-Input
Digital-Input
Digital-Input
Digital-Input
Digital-Input
Digital-Input
putpull-up
putpull-up
putpull-up
putpull-up
putpull-up
putpull-up
VDD
VDD
VDD
VDD
VDD
VDD
WFPDSH
MPDSH/SPDSH
WBLSH
WGATE
RFHLD/TISH1
RF hold control signal input terminal /Tilt servo detecting
sampling pulse input terminal
IDGATE
34
35
Digital-Input
Digital-Input
putpull-up
putpull-up
VDD
VDD
ID select pulse input terminal
LO_ZB/SPDSH
Low-z (reversal) pulse input terminal
/Pickup input sampling pulse input terminal
57
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pin Name
pin No. Type
max. voltage
Function
BLANK
36
Digital-Output
Record/non-record detecting/BD detecting output
terminal
WOBSIG
IP2/MIRR
IP1/LPPOUT
DFT
37
38
39
40
41
42
43
44
45
46
47
48
49
50
Digital-Output
Digital-Output
Digital-Output
Digital-Output
Ground
WOBBLE signal output terminal
ID detection/Mirror detection output terminal
ID detection/LPP detection output terminal
Defect detection output terminal
Ground connected terminal (Digital)
I/O Port
GND4
PORT00
PORT01
PORT02
PORT03
PORT04
PORT05
PORT06
PORT07
MCLK
Digital-Input/Output
VDD
default input mode
No pull-up
Digital/Analog-Input
No pull-up
VDD
VDD
Main clock input terminal
Equalizer fc auto-adjustment control clock input terminal.
LPP output pulse width control clock input terminal.
WOB-BPF f0 auto-tracking clock input terminal.
I/O Port
PORT10
PORT11
PORT12
PORT13
SCLK
51
52
53
54
55
56
57
58
59
60
Digital-Input/Output
default input mode
No pull-up
Digital-Input
pull-up
VDD
VDD
VDD
VDD
Serial I/F clock input terminal
SDATA
SDEN
Digital-Input/Output pull-up
Serial I/F data input/output terminal
Serial I/F enable input terminal
Digital-Input
Digital-Input
Power
pull-up
pull-up
MRSTB
VDD4
Master reset (reversal) input terminal
Power supply connected terminal(3.3V)(digital)
External capacitor for LPP bottom hold terminal
BHC
External-capacitor required
External-capacitor required
External-capacitor required
External-capacitor required
MIRRHPF
61
62
63
Terminal to connect Mirror envelope detector HPF
capacitor
MIRRBOTH
MIRRTOPH
Terminal to connect Mirror envelope detector bottom
hold capacitor
Terminal to connect Mirror envelope detector top hold
capacitor
BOTH
64
65
66
67
68
69
70
External-capacitor required
External-capacitor required
Ground
Terminal to connect envelope bottom hold capacitor
Terminal to connect envelope top hold capacitor
Ground connected terminal
TOPH
GND1
EQOP
Differential-Output
RF equalizer differential output terminal
EQON
VDD1
Power
Power supply connected terminal(3.3V)
ID detecting HPF input terminal/LPP detecting HPF input
terminal
SUBI/LPPSIG
Analog-Input
VDD
58
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pin Name
pin No. Type
max. voltage
Function
SUBO/LPPMON
71
72
73
Analog-Output
ID detecting HPF output terminal/LPP detecting HPF
output terminal
EQFCF
IREFE
External-capacitor required
External-resistor required
External-capacitor required
Terminal to connect RF-equalizer fc auto-adjustment
external capacitor
Terminal to connect RF-equalizer fc setting external
resistor
AGHPF2
AGHPF1
AGFU
74
75
76
77
78
79
Terminal to connect AGC high pass filter capacitor
External-capacitor required
External-capacitor required
Power
AGC filter connecting terminal
AGFR
VCC1
Power supply connected terminal(5V)
VDD SUM RF input/SUM differential amp. DC filter
connected terminal
SUMF/SUMF2
Analog-Input/ /External-capacitor required
RFIP
80
81
82
83
84
Differential-Input
VDD RF differential input terminal
RFIN
SRVREF
FVREFO
IREFT
Analog-Input
VDD DSP supply voltage (3.3V) input terminal
2.5V reference bias voltage output terminal
Terminal to connect reference current setting external
resistor
Analog-Output
External-resistor required
VREF1
HAVC
SA
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
Analog-Output
Analog-Input
Analog-Input
Analog-Input
Analog-Input
Analog-Input
Power
2.1V reference bias voltage output terminal
VCC Pickup reference voltage input terminal
VCC Sub beam 4D input terminal
SB
SC
SD
VDD2
MA
Power supply connected terminal(3.3V)
VCC Main beam 4D input terminal
Analog-Input
Analog-Input
Analog-Input
Analog-Input
Ground
MB
MC
MD
GND2
AIN1
AIN2
AIN3
SIGM
Ground connected terminal
VDD Analog input terminal
Analog-Input
Analog-Input
Analog-Input
Analog-Output
Analog signal monitoring output terminal
59
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IC301 (R8J32007FPV) : Encoder, Decoder & DSP Singal Processor
1.1 Pin Layout
VSSR
VCCR
CPU14
CPU13
CPU12
VSSIO
VCCIO
VCCRQ
CPU11
CPU10
VSSRQ
CPU9
CPU8
CPRDB
UCS0B
A1
CPU0
CPU1
CPU2
CPU3
CPU4
VSSRQ
CPU5
CPU6
CPU7
VCCRQ
VSS
VDD
A16
A15
VSSIO
VCCIO
A14
A13
A12
A11
A10
A9
A20
CPWRB
VDD
VSS
A19
A18
1
2
3
4
5
6
7
8
9
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
W2LPF0
W2LPF1
W2LPF2
VDDAA
VSSAA
DEFECT
BLANK
LN DTRK
WOBSIG
LOWZB
ID GATE
RFHLD
IP1LP PIN
IP2M IRR
VCCIO
VSSIO
VDD
VSS
VSSA
NRZI
NRZIB
DCLKB
DCLK
VCCA
WRGATEB
SRFH
SRFL
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
R8J32007
Top View
WRSTOP
WRGATE2
VCCIO
VSSIO
VSS
VDD
WBLSH
MPDSH
WFPDSH
RFPDSH
TCSHSPBLV
LDB USY
WDEN
RFDEN
SDATA
SCLK
FEMCK
TRST
TDO
TDI
TCK
A8
A7
A6
A5
A4
A3
VSSIO
VCCIO
VCCR
VSSR
TMS
TEST3
TEST2
TEST1
TEST0
DOUT
60
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1.2 Block Diagram
LOUT
ROUT
DOUT
CAV
AUDIO
AUDIO
DREQ
Data
PLL
VINP
VINN
ADC
DACKB
DASPB
CS3FXB
CS1FXB
PDIAGB
DA2
DVD
Descramble
CD-ROM
Decoder
REXT
PTEST [2:0]
PRML
DA1
DA0
ATAPI
DVD
Scramble
W1LPF[2:0]
WPLL
CD-DSP
Jitter
IOCS16B
HINTRQ
IORDY
ZIORB
ZIOWB
HRSTB
DATA [15:0]
W2LPF[2:0]
Counter
LPP
Detector
Wobble
WOBSIG
Generator
DVD
PI-ECU
ZCS
ADIPVR1
ADIPVRT
ADIPINP
ADIP
Detector
RD[15:0]
ADC
RA[12.10:0]
RAMCL
DWE
DRAS
DCAS
SDRAM
16Mbit
DVD
PO-ECU
IP1LPPIN
IP2MIRR
DRAM
Interface
Demodulate
Modulator
LOWZB
IDGATE
RFHLD
DQMU
DQML
DCKE
NRZI,NRZIB
DCLK,DCLKB
WGATEB
WRGATE2
SRFH
LVDS
XCI
Clock
Generator
XCO
FEMCK
SRFL
WRSTOP
CD
MRSTB
Test
Control
CD-ROM
Encoder
TESTB[1:2]
TEST[3:0]
WBLSH
MPDSH
WFPDSH
RFPDSH
TCSHSPBLV
Sample
Hold
SCLK
DRAM
SDATA
RFDEN
WDEN
LDBUSY
Serial I/F
TLD
LDD
LED
SPD
LNDTRK
CPWRB
CPRDB
A[20:0]
SFG
EFG
UCS0B
GPIO05(UCS1B)
CPRDB
CPWRB
A[20:1]
DERECT
ATZC
BLANK
FE
PE
SIGM
MCIF
CPU[15:0]
Cmp
ADC
UCS2B
UCS3B
GPIO04(A[0])
[15:0]
CPU
Servo
MSEQ
GPIO06(CSEL)
WAI T
ADGATEB
INT0B
INT1B
INT2B
FOK
GPIO07(HEATRUN)
TE
H8S
CPU
ICUIN6(EJECTSW)
ICUIN7(ACTFLG)
ICUIN8(LOADIN)
LPSA
ADC
INT3B
SSEQ
FOD
DAVC
TRD
TRST(NMI)
DAC
DAC
TCK(SCK)
TDI(SCI)
TDO(SCO)
TMS
BCA
Auth
TVDP
TVDN
TCPH
TIBH
BCENT
FAD0(VRDC2N)
GAD1
ADC
61
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1.3 Pin Table
Pin no
1
Pin Name
Pin no
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
Pin Name
A2
Pin no
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
Pin Name
DOUT
Pin no
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
Pin Name
W1LPF2
W1LPF1
W1LPF0
VCCA
VSSA
VSSA
FE
VSSR
VCCR
CPU14
CPU13
CPU12
VSSIO
VCCIO
VCCRQ
CPU11
CPU10
VSSRQ
CPU9
CPU8
CPRDB
USC0B
A1
CPU0
CPU1
CPU2
CPU3
CPU4
VSSRQ
CPU5
CPU6
CPU7
VCCRQ
VSS
VDD
A16
A15
VSSIO
VCCIO
A14
A13
A12
A11
A10
A9
A20
CPWRB
VDD
VSS
A19
A18
2
3
4
5
6
7
8
9
GPIO05
VSSIO
VCCIO
HRSTB
DATA7
DATA8
DATA6
DATA9
DATA5
DATA10
DATA4
DATA11
DATA3
DATA12
DATA2
DATA13
VDD
TEST0
TEST1
TEST2
TEST3
TMS
TCK
TDI
TDO
TRST
PE
SIGM
ATZC
TE
LPSA
TCPH
TIBH
BCENT
GAD0
GAD1
FOD
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
FEMCK
SCLK
SDATA
RFDEN
WDEN
LDBUSY
TCSHSPBLV
RFPDSH
WFPDSH
MPDSH
WBLSH
VDD
VSS
TRD
VSSIO
VCCIO
DATA1
DATA14
DATA0
DATA15
DREQ
ZIOWB
ZIORB
IORDY
DACKB
HINTRQ
IOCS16B
VSSIO
VCCIO
DA1
PDIAGB
DA0
DA2
CS1FXB
CS3FXB
DASPB
CPIO07
CPIO06
ROUT
TVDP
TVDN
DAVC
VCCA
VCCA
VSSA
VINN
VSS
VSSIO
VCCIO
WRGATE2
WRSTOP
SRFL
SRFH
WRGATEB
VCCA
DCLK
DCLKB
NRZIB
NRZI
VSSA
VDDAA
VINP
VSSA
PTEST1
VDDAA
REXT
VSSA
PTEST2
VDDAA
PTEST3
VCC
VCCIO
VSSIO
MRSTB
TESTB2
TESTB1
ICUIN7
ICUIN6
ICUIN8
GPIO04
LED
87
88
89
90
91
92
93
94
95
96
97
98
VSS
VDD
VSSIO
VCCIO
IP2MIRR
IP1LPPIN
RFHLD
IDGATE
LOWZB
WOBSIG
LNDTRK
BLANK
DEFECT
VSSAA
VDDAA
W2LPF2
W2LPF1
W2LPF0
A8
A7
A6
A5
A4
A3
VSSIO
VCCIO
VCCR
VSSR
99
VCCA
LOUT
ADIPVR1
ADIPVRT
ADIPINP
VSSA
VSSA
XCO
XCI
VCCA
100
101
102
103
104
105
106
107
108
LDD
SPD
TLD
SFG
EFG
A17
CPU15
62
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1.4 Pin Functions
It corresponds to the following signs as a pin I/O specification.
AI :
Analog Input
IOU : Standard Input/Output with Pull Up
5I : 5V Tolerant Input
AO : Analog Output
AIO : Analog Input/Output
5O : 5V Tolerant Output
5TO : 5V Tolerant Three State Output
5IO : 5V Tolerant Input/Output
PW : Power Supply Pin
I :
Standard Input
IU :
O :
Standard Input with Pull Up
Standard Output
TO : Standard Three State Output
IO : Standard Input/Output
GND : Earth Pin
Data PLL/PRML Pin List
Pin Name Pin No. I/O
destination
Function
VINP
VINN
190
188
AI
AFE
RF signal normal phase input pin
RF signal counter phase input pin
REXT
194
AO External Resistance Resistor connect pin for reference current generation
PTEST1
PTEST2
PTEST3
192
196
198
AO External Resistance PRML/Data PLL moniter D/A output pin
PRML/Data PLL moniter D/A output pin
Data PLL VCO control voltage monitor pin
Wpll Pin List
Pin Name Pin No. I/O
destination
Function
W1LPF0
W1LPF1
W1LPF2
165
164
163
AO External Components Write PLL1 filter connect pin (0)
Write PLL1 filter connect pin (1)
Write PLL1 filter connect pin (2)
W2LPF0
W2LPF1
W2LPF2
162
161
160
AO External Components Write PLL2 filter connect pin (0)
Write PLL2 filter connect pin (1)
Write PLL2 filter connect pin (2)
63
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Servo Pin List
Pin Name
BLANK
Pin No. I/O destination Function
156
I
AFE
Blank signal input
(also connected to the H8S interrupt port INT5)
DEFECT
SFG
157
213
I
AFE
Defect (scratch detect) signal
IU
DRVR
Spindle FG pulse
(also input to the H8S interrupt port INT4)
EFG
214
I
PU
Spindle FG pulse for Light Scribe
(also input to the H8S interrupt port INT4)
Tilt drive signal (PWM output)
TLD
SPD
212
211
210
209
172
169
170
171
173
174
175
176
177
179
178
180
181
TO
TO
TO
TO
AI
DRVR
DRVR
DRVR
PU
Spindle drive signal (PWM output)
LDD
Loading drive signal (PWM output)
LPS_LED control signal (PWM output)
Tracking Zero Cross input signal
LED
ATZC
FE
AFE
AFE
AFE
AFE
AFE
AFE
AFE
AFE
AFE
AI
Focus error: sampled at 352.8 kHz
Laser power error: sampled at 352.8 kHz
Signal monitor: sampled at 88.2/176.4 kHz
Tracking error: sampled at 352.8 kHz
Lens positioning/lens error: sampled at 88.2 kHz
Tracking center/BETA top hold: sampled at 44.1/176.4 kHz
Tilt error/BETA bottom hold: sampled at 44.1/176.4 kHz
BETA center: sampled at 176.4 kHz
General AD input: sampled at 88.2 kHz
General AD input: sampled at 176.4 kHz
Focus control signal
PE
AI
SIGM
TE
AI
AI
LPSA
TCPH
TIBH
AI
AI
AI
BCENT
GAD1
GAD0(VRDC2N)
FOD
AI
AI
AI
AO
AO
AO
DRVR
DRVR
DRVR
TRD
Tracking control signal
TVDP
TVDN
182
183
Sled drive signal (normal phase)
Sled drive signal (counter phase)
DAVC
184
AO
DRVR
Servo system Vcc/2 voltage output pin
64
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ATAPI Interface Pin List
Pin Name
Pin No.
I/O destination Function
HRSTB
DA2
59
92
89
91
5I
5I
ATAPI
ATAPI
ATAPI-IF control signal (host reset signal)
ATAPI-IF register address signal
DA1
DA0
DATA[15:0]
79,77,71,
69,67,65,
63,61,60,
62,64,66,
68,70,76,
78
5IO
ATAPI
ATAPI- IF data bus
DREQ
ZIOWB
ZIORB
80
81
82
83
84
85
86
90
5TO
5I
ATAPI
ATAPI
ATAPI
ATAPI
ATAPI
ATAPI
ATAPI
ATAPI
ATAPI
ATAPI-IF DMA request signal
ATAPI-IF write strobe pulse
5I
ATAPI-IF read strobe pulse
IORDY
5TO
5I
ATAPI-IF control signal (drive Ready)
ATAPI-IF DMA acknowledge
ATAPI-IF drive interrupt signal
ATAPI-IF control signal (16-bit transfer)
ATAPI-IF control signal
DACKB
HINTRQ
IOCS16B
PDIAGB
5TO
5TO
5IO
5I
CS1FXB
CS3FXB
93
94
ATAPI-IF register chip select signal
DASPB
95
5IO
ATAPI
ATAPI-IF control signal
65
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Encoder Interface Pin List
Pin Name Pin No. I/O
destination
AFE
Function
IP1LPPIN
IP2MIRR
150
149
I
I
PID area identification signal/LPP input signal
PID area identification signal/MIRR signal
AFE
WOBSIG
LOWZB
154
153
I
AFE
AFE
Wobble signal input
O
Input impedance switch control signal/SPDSH; running
OPC sampling pulse (Pit top)
IDGATE
RFHLD
152
151
O
O
AFE
AFE
ID/data switch signal
VFO3 holding signal and track center signal sample &
hold signal
WRGATE2
WBLSH
134
129
128
127
O
O
O
O
AFE
AFE
AFE
AFE
Write gate signal output
Wobble signal sampling pulse
Main beam sampling pulse
MPDSH
WFPDSH
Laser control sampling pulse
(Front monitor write/erase block)
RFPDSH
126
O
O
AFE
AFE
Laser control sampling pulse
(Front monitor read block)
TCSHSPBLV 125
VFO1 track center signal sample & hold pulse;
/SPBLVL running OPC sampling pulse (Pit end)
WRGATEB
SRFH
138
137
O
O
PU
PU
Write gate signal
I- V amplifier gain switch (HI side)
/I- V amplifier gain switch (for binary)
SRFL
WRSTOP
LNDTRK
NRZI
136
135
155
143
142
140
141
101
102
103
I- V amplifier gain switch (Low side)
Write stop gate signal
I
PU
AFE/PU
PU
O
Land/groove switch
AO
NRZI output after modulation (normal phase)
NRZI output after modulation (counter phase)
NRZI sync clock (counter phase)
NRZI sync clock (normal phase)
NRZIB
DCLK
AO
PU
DCLKB
ADIPVR1
ADIPVRT
ADIPINP
AO External Cpmponents AD related pin for ADIP detection
AO External Cpmponents AD related pin for ADIP detection
AI
AFE
ADIP detect input pin
Serial Communication Interface Pin List
Pin Name Pin No. I/O
destination
LDD
Function
LDBUSY
WDEN
RFDEN
SDATA
SCLK
124
123
122
121
120
IO
O
LDD serial IF busy also functions as the CPU general port 1-0
LDD microcomputer I/F (transfer enable signal)
LDD
O
AFE
AFE microcomputer I/F (transfer enablesignal)
IO
O
AFE/LDD
AFE/LDD
AFE/LDD microcomputer I/F (transfer data signal 3Vsystem)
AFE/LDD microcomputer I/F (transfer clock signal)
66
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Audio Interface Pin List
Pin Name Pin No. I/O
destination
ATAPI
Function
DOUT
ROUT
LOUT
109
98
IO
Digital output pin,also functions as the CPU general port 1-2
Audio Lch & Rch output
AO
ATAPI
100
Clock Generator Pin List
Pin Name Pin No. I/O
destination
AFE
Function
FEMCK
XCO
119
106
107
O
O
I
Front End LSI clock
X’tal
Crystal oscillation 33.8688MHz
Crystal oscillation 33.8688MHz
XCI
X’tal
H8S Micro-Processor Pin List
CPU
Pin Name
Pin No. I/O destination Function
ICUIN7(ACTFLG)
205
206
207
IU
I
DRVR
CPU interrupt port INT7: Pick up protect flag
ICUIN6(EJECTSW)
ICUIN8(LOADIN)
Eject Switch CPU interrupt port INT6: EJECTSW interrupt request
IO Load Switch CPU general port1-1 also connected to the CPU interrupt
port INT8: Loader in sensor
GPIO07(HEATRUN)
GPIO06(CSEL)
GPIO04(A0)
96
97
5IO
5IO
IO
ATAPI
ATAPI
SRAM
SRAM
CPU general port 0-7 :Off heat run test input
CPU general port 0-6 ATAPI CSEL
208
56
CPU general port 0-4, also functions as H8S / A0
CPU general port 0-5, also functions as H8S / CS1
GPIO05(UCS1B)
IO
Flash/SRAM Pin List
Pin Name
Pin No.
I/O
destination Function
Flash H8S / CS0
UCS0B
15
40
14
O
O
O
O
CPWRB
CPRDB
A[20:1]
Flash / SRAM H8S / WRB
Flash / SRAM H8S / RDB
Flash / SRAM H8S / A[20:1]
39,43,44,
215,29,30,
33,34,35,
36,37,38,
45,46,47,
48,49,50,
55,16
CPU[15:1]
216,3,4,
5,9,10,
IO
Flash / SRAM H8S / D[15:0]
CPU[0] can also function as the CPU general port 0-4
(multiplexed).
12,13,25,
24,23,21,
20,19,18
17
67
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LSI/TEST Control Pin List
Pin Name
Pin No.
I/O
destination Function
RESET IC Master reset input
Test select
MRSTB
202
I
TESTB2
TESTB1
203
204
I
TMS
TCK
114
115
IU
E10emulator Test data switch for E10emulator
IOU E10emulator Test clock for E10 emulator
It can function as a SCI serial clock output port when E10
emulator is not used (multiplexed).
TDI
TDO
TRST
116
117
118
IU
O
E10emulator Test data input for E10 emulator
It can function as a SCI serial data input port when E10
emulator is not used (multiplexed).
E10emulator Test data output for E10 emulator
It can function as a SCI serial data output port when E10
emulator is not used (multiplexed).
I
E10emulator Test reset for E10 emulator
/Non-mask CPU interrupt port(falling edge sense)
TEST0
TEST1
TEST2
TEST3
110
111
112
113
IO
User test/CPU general port2
Test monitor can be set as the following table by a register
T*SEL[3:0]
TEST0
TEST1
TEST2
TEST3
0
1
2
3
4
Servo monitor 0
WPLL monitor 0
Audio 0
Servo monitor 1
WPLL monitor 1
Audio 1
Servo monitor 2
WPLL monitor 2
Audio 2
Servo monitor 3
WPLL monitor 3
Audio 3
DVD modulation 0
DVD modulation 1
DVD modulation 2
DVD modulation 0
DVD-R/CD-R
monitor 0
DVD-R/CD-R
monitor1
DVD-R/CD-R
monitor 2
DVD-R/CD-R
monitor 3
5
6
DVD+RW monitor 0
PI/C1
DVD+RW monitor1
PI/C1
DVD+RW monitor 2
PI/C1
DVD+RW monitor 3
PI/C1
7
PO/C2
PO/C2
PO/C2
PO/C2
8
DEMO 0
DEMO 1
DEMO 2
DEMO 3
9
-
-
-
-
10
11
12
13
14
15
16
CLVCK
CLVCK
CLVCK
CLVCK
BLEND
BLEND
BLEND
BLEND
PRML monitor 0
Data PLL monitor 0
RAMCON monitor 0
MIF monitor 0
WOBREF monitor 0
PRML monitor 1
Data PLL monitor 1
RAMCON monitor 1
MIF monitor 1
WOBREF monitor 1
PRML monitor 2
Data PLL monitor 2
RAMCOM monitor 2
MIF monitor 2
WOBREF monitor 2
PRML monitor 3
Data PLL monitor 3
RAMCON monitor 3
MIF monitor 3
WOBREF monitor 3
T*SEL can be set for each of pins TEST3, TEST2, TEST1, and TEST0, respectively.
68
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Power Supply/GND Pin List
Pin Name
Pin No.
I/O
Function
VDD
28,41,72,
PW
DSP core power supply (1.5V)
130,146
2,53
VCCR
VCCRQ
VDDAA
PW
PW
PW
SDRAM power supply (3.3V)
8,26
SDRAM I/O power supply (3.3V)
159
1.5V system analog power supply (1.5V) WPLL1,2
1.5V system analog power supply (1.5V) PRML A/D Data PLL
Analog power supply (3.3V):AUDIO / ADIP
Analog power supply (3.3V):PLL multiplication
Analog power supply (3.3V):LVDS
189,193,197
99
VCCA
108
139
166
Analog power supply (3.3V):WPLL1,2
185
Analog power supply (3.3V):Servo A/D D/A
Analog power supply (3.3V):PRML A/D Data PLL
Digital power supply (3.3V):PRML A/D Data PLL
DSP I/O power supply (3.3V)
186
VCC
199
PW
PW
VCCIO
7,32,52,
58,75,88,
133,148,200
27,42,73,
131,145
1,54
VSS
GND
DSP core GND
VSSR
VSSRQ
VSSA
GND
GND
GND
SDRAM GND
11,22
SDRAM I/O GND
104
Analog GND:AUDIO / ADIP
Analog GND:PLL multiplication
Analog GND:LVDS
105
144
167
Analog GND:WPLL1,2
168
Analog GND:Servo A/D D/A
Analog GND:PRML A/D Data PLL
1.5V system analog GND:WPLL1,2
DSP I/O GND
187,191,195
158
VSSAA
VSSIO
GND
GND
6,31,51,
57,74,87,
132,147,201
Connected SDRAM I/O GND through 6,31pin
69
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IC601 (R2S30202FP) : SPINDLE MOTOR AND 6CH ACTUATOR DRIVER
Pin Layout
R2S3
0202FP
Package outline : 42 PIN POWER SSOP (42P9R-K)
Pin Function
No Pin name Function
No Pin name Function
1
2
3
4
5
6
7
8
9
10
11
12
13
14
SPIN
SL1IN
SL2IN
SPLIM
VM2
SL2+
GND
SL2-
SL1+
SL1-
GND
U
Spindle control voltage input
Slide control voltage input1
Slide control voltage input2
Input terminal for spindle current limit
Motor Power Supply 2(for Slide)
Slide non-inverted output2
GND
Slide inverted output2
Slide non-inverted output1
Slide inverted outptut1
GND
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
REF
LOIN
FOIN
TOIN
TLIN
TL-
TL+
FO-
FO+
GND
Reference voltage input
Loading control input
Focus control voltage input
Tracking control voltage input
Tilt control voltage input
Tilt inverted output
Tilt non-inverted output
Focus inverted output
Focus non-inverted output
GND
5VCC 5V Power Supply (for FS,TS,TL)
TO+
TO-
Motor drive output U
Motor drive output V
Motor drive output W
Tracking non-inverted output
Tracking inverted output
GND
Loading inverted outptut
Loading non-inverted output
V
W
GND
LO-
LO+
VM3
15 ACTFLG Pickup protect flag output
16 COMMON Motor common
17
18
19
20
21
TEST
SLLIM
FG
EN1
EN2
Test terminal (*1)
Power Supply3(for Loading)
(
Input terminal for slide current limit
Frequency generator output
Input terminal for enable 1
Input terminal for enable 2
25 ACTRST Pickup protect Reset *2)
24
23 SPGS Input terminal for gain select SPM
22 VM1 Motor Power Supply 1(for Spindle)
STTH Reference voltage for spindle start up
*1) Please connect 17terninal (TEST) to GND or open, for TEST.
*2) Please connect 25terminal(ACTRST) to 5VCC, When the Pick-up protection circuit is not used.
70
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Block Diagram
G N D
m h 1 . 5 o
n o R U P T T O U
-
L O
+
L O
V M 3
P
D S
P
D S
o t e c t u k p c i P P r
G
A C T F L
P
D S
-
T L
T S R T A C
S L L I M
+
T L
T L I N
1 . 5 o h m
n o R U P T T O U
P
D S
m h
1 . 8 o
S L 1 -
n o R U P T T O U
T R
+
-
S L 1 +
1 . 5 o h m
n o R U P T T O U
e
e s n s
T R +
G N D
e r n t C u r
t e r o n v V e r c V /
2 E S L I D
M
S T
P
D S
P
D S
S L 1 I N
T R I N
5 V C C
G N D
S 2 -
+
-
S 2 +
m h
1 . 8 o
-
F O
n o R U P T T O U
e
e s n s
e r n t C u r
t e r o n v V e r c V /
1 E S L I D
P
D S
F O +
F O I N
1 . 5 o h m
n o R U P T T O U
S 2 I N
V M 2
P
D S
P
P
D S
D S
t e r o n v V e r c V /
S P
F
R
M
I N S P
M I L S P
P
D S
L
C T
e
e s n s
e r n t C u r
F G
W
V
U
1 o h m
n o R U P T T O U
R E T C T E D E
E K M C F A B
N
M M C O O
71
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Input/Output circuit diagram
SPIN, SL1IN, SL2IN
LOIN
FOIN, TOIN,TLIN
TEST
REF
EN1, EN2
5VCC
5VCC
5VCC
5VCC
100
100
100
100
17k
35k
SPGS
ACTFLG,FG
5VCC
ACTRST
5VCC
COMMON
VM1
(Temperature monitor)
5VCC
10k
5VCC
5VCC
100
100
COMMON
100
25k
VM1, U, V, W
VM2, SL1+, SL1-, SL2+, SL2-
VM2
VM1
U
V
W
SL1+
SL1-
SL2+
SL2-
5VCC, FO+, FO-, TO+, TO-, TL+, TL-
5VCC
VM3, LO+, LO-
VM3
LO+
LO-
FO+
FO-
TO+
TO-
TL+
TL-
72
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TROUBLESHOOTING GUIDE
(01) Laser Power Adjust (using RD Power/WR Power/Erase Power)
MPU & DSP
IC301
Pickup
Setting
FFC
FFC
Pin#175
Front
Monitor
LD
Driver
#12
AFE
IC101
#6 #10
IC102
pin#98
(02) High Frequency/NRZI skew Adjust
Pickup
FFC
17,18,20,21
LD
Driver
MPU & DSP
IC301
FFC
(03) Data Slice/Equalizer Boost/Raw Slice/ Equalizer Frequency Adjust
Pin#79
MPU & DSP
IC301
Pin#110
Pin#203
AFE
IC101
C137
Pin#21
(04) Circuit Offset Adjust
Setting
Pin#
87-90
Pickup
FFC
FE:R102,C405
#2
AFE
MPU & DSP
IC301
IC101
TE:R101,C101
PE:R103,C406
#1
#3
DVD-Dual Disc
(05) Focus Amp. Adjust for DVD-Dual
Setting
Pin#
87-90
Pickup
AFE
IC101
FFC
FE:R102,C405
#2
MPU & DSP
IC301
Focus:#34-35
Slider FPC
Slider, #6,8-10
R329,C335
#40
Driver
IC601
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(06) Focus Amp. and Total Amp. Adjust
All Disc
Setting
Pin#
87-90
Pickup
AFE
IC101
FE:R102,C405
FFC
#2
MPU & DSP
IC301
PE:R103,C406
R329,
#3
Focus:#34-35
Driver
IC601
C335
#40
(07) Tracking Amp. Adjust
All Disc
Setting
Pin#
87-90
Pickup
AFE
IC101
FFC
TE:R101,C101
#1
MPU & DSP
IC301
Tracking
#30-31
R330
C336
Driver
IC601
#39
Slider FPC
Slider:#6,8-10
All Disc
(08) Servo Loop Gain Adjust
Setting
Pin#
87-90
AFE
IC101
#2
FE:R102,C405
TE:R101,C101
FFC
Pickup
MPU & DSP
IC301
Focus:#34-35
#1
Tracking:#30-31
R329,C335 #40
Driver
IC601
Slider FPC
Slider:#6,8-10
R330,C336
#39
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(09) Unwritten Slice Level Adjust for DVD-RAM
DVD-RAM Disc
Pin#
80-81
Setting
AFE
IC101
Pickup
MPU & DSP
IC301
FFC
SIGM:R148, C151
#100
#171
Slider FPC
Slider:#6, 8-10
Driver
IC601
(10) Focus Offset Adjust for DVD-ROM, CD-R/RW
DVD-ROM Disc
Pin#
87-90,80-81
AFE
Setting
IC101
MPU & DSP
IC301
Pickup
FFC
FE:R102,C405
#2
Slider FPC
Slider:#6, 8-10
Driver
IC601
(11) Focus Offset Adjust for DVD-RAM (PID Amp)
DVD-RAM Disc
Pin#
87-90,80-81
AFE
Setting
IC101
MPU & DSP
IC301
Pickup
FFC
SIGM:R148,C151
#100
Slider FPC
Slider:#6, 8-10
Driver
IC601
(12) Focus Offset Adjust for DVD-RAM (Data Error pulse)
DVD-RAM Disc
Pin#
87-90,80-81
Setting
AFE
IC101
MPU & DSP
IC301
Pickup
FFC
C341,343
#67,68
Slider FPC
Slider:#6, 8-10
Driver
IC601
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(13) Tilt Adjust for DVD-RAM
DVD-RAM Disc
Pin#
87-90,80-81
Setting
Pickup
AFE
IC101
TCE:R106, C106
MPU & DSP
IC301
FFC
#6
#7
TIE:R107,C107
Slider FPC
Slider:#6, 8-10
Driver
IC601
(14) Tilt Adjust for DVD-R/RW, DVD+R/RW, CD-R/RW
DVD-R/RW Disc
Pin#
87-90, 80-81
Setting
AFE
IC101
TE:R101, C101
FFC
MPU & DSP
IC301
#1
Pickup
TILT: #36-37
#181
Tracking: #30-31
Slider FPC
Driver
IC601
TRD:R330,C336
#39
Slider:#6,8-10
(15) Focus Deviation Adjust
Pin#
87-90,80-81
DVD-R/RW Disc
Setting
Pickup
AFE
IC101
FE:R102, C405
FFC
MPU & DSP
IC301
#2
FE:#34-35
FE
Driver
IC601
R329, C335 #40
(16) Focus Offset Adjust for DVD-R/RW, DVD+R/RW, CD-R/RW
DVD-R/RW Disc
Setting
Pin#
87-90,80-81
AFE
IC101
MPU & DSP
IC301
TE:R101, C101
FFC
Pickup
#1
#181
TRD:
Tracking:#30-31
Driver
IC601
R330, C336
#39
Slider FPC
Slider:#6, 8-10
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(17) Lens Sensitivity Adjust
Pickup
MPU & DSP
(Temp.Information)
putemp
#178
FFC
IC301
(18) Spindle Offset Adjust
Pin#
12-14
#211
#1
Spindle
Driver
IC601
MPU & DSP
IC301
FFC
SPD:R349, C349
#19
#213
FG
(19) ADIP BPF/Read Timing Adjust for DVD+R/RW
DVD+R Disc
Setting
Pin#
87-90,80-81
AFE
IC101
Pickup
MPU & DSP
IC301
FFC
WobSIG
#154
#37
Slider FPC
Slider:#6, 8-10
Driver
IC601
(20) Focus Offset Adjust for DVD-R/RW, DVD+R/RW(DID)
DVD-R/RW Disc
Setting
AFE
Pin#
87-90,80-81
IC101
MPU & DSP
IC301
C341, 343
Pickup
FFC
#67,68
#39
Slider FPC
Slider:#6,8-10
Driver
IC601
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(21) RTZ TimeOut Fail
AFE
IC101
Slider/
Spindle
Slider FPC
Slider:#6,8-10
Driver
IC601
#43
Spindle FFC
(22) Focus Servo/Tracking Servo Fail
All Disc
Pin#
87-90
Setting
AFE
IC101
FE:R102,C405
FFC
Pickup
#2
MPU & DSP
IC301
TE:R101,C101
#1
Focus:#34-35
Tracking:#30-31
PE:R103,C406
R329,C335
#3
#40
FOD
Slider FPC
Slider:#6,8-10
Driver
IC601
R330, C336
TRD
#39
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Detail Error Code & Fail Analysis
1. Laser Power Initial Adjust
No. Error Code
Contents of fail
Fail Analysis
Block Diagram
No.01
SSB Byte8,9
1
28xx
(Exchange
LP Adjust NG.
1) Check Pickup FFC Connection.
2) Check solder of IC101circumference.
(pin#6, 10, 12, L150, L151)
low/high byte)
3) Check solder of IC102.
4) Exchange Pickup(LDD, Front Monitor).
5) Exchange IC101(AFE).
Byte8: xxh
Byte9: 28h
6) Exchange IC301(MPU & DSP).
2
3
4
48xx
High Frequency Adjust NG.
NRZi Skew Adjust NG.
Data Slice Adjust NG.
1) Check Pickup FFC Connection.
2) Exchange Pickup (LDD part).
3) Exchange IC301(DSP).
No.02
No.02
No.03
5Exx
1) Check Pickup FFC Connection
2) Exchange Pickup (LDD part).
3) Exchange IC301(MPU & DSP).
4C0x to 4C4x
1) Check solder of IC101circumference.
(pin# 79, L150, L151)
2) Exchange IC101(AFE).
3) Exchange IC301(MPU & DSP).
5
6
7
4C5x to 4C7x
EQ Boost Adjust NG.
1) Check solder of IC101circumference.
(pin# 79, L150, L151)
2) Exchange IC101(AFE).
3) Exchange IC301(MPU & DSP).
4C80
RAW Slice Level Adjust NG.
1) Check solder of IC101circumference.
(pin# 79, L150, L151)
2) Exchange IC101(AFE).
3) Exchange IC301(MPU & DSP).
4CAx
EQ Auto Frequency Adjust NG. 1) Check solder of IC101circumference.
(pin# 79, L150, L151)
2) Exchange IC101(AFE).
3) Exchange IC301(MPU & DSP).
79
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2. Adjusting Error during Disc Load Sequence (Lead in Error)
No. Error Code
SSB Byte21,22
Contents of fail
Fail Analysis
Block Diagram
No.04
1
2
3
42xx
Circuit Offset Adjust NG.
1) Check Pickup FFC Connection.
2) Check solder of IC101circumference .
(pin#,1,2,3 pin#87-90,
FE_Servo: R102, C405
TE_Servo: R101, C101
PE_Servo: R103, C406)
3) Exchange IC101(AFE).
4) Exchange Pickup.
5) Exchange IC301(MPU & DSP).
452x
Focus Amp Adjust NG.
(DVD-DL Only)
1) Check DVD-Dual Disc.
No.05
2) Check Pickup FCC Connection.
3) Check solder of IC101circumference.
(pin#1,2,3 pin#87-90,
FE_Servo: R102, C405)
4) Check Slider FPC Connection.
5) Exchange IC101(AFE).
6) Exchange IC601(Driver).
7) Exchange IC301(MPU & DSP).
450x
451x
454x
Focus Amp Adjust NG.
Total Amp Adjust NG.
1) Check Pickup FFC Connection.
2) Check solder of IC101circumference.
(pin#1,2,3 pin#87-90,
No.06
FE_Servo: R102, C405
PE_Servo: R103, C406)
3) Exchange Pickup.
4) Exchange IC101(AFE).
5) Exchange IC301(MPU & DSP).
4
5
458x
47xx
Tracking Amp Adjust NG.
1) Check Pickup FFC Connection.
2) Exchange Pickup.
3) Check solder of IC101circumference.
(pin#1,2,3 pin#87-90,
TE_Servo: R101, C101)
4) Exchange IC101(AFE).
No.07
No.08
5) Exchange IC301(MPU & DSP).
Servo Loop Gain Adjust NG.
47XA: Disc Unmatch(Exchange Disc).
1) Check Pickup FFC Connection.
2) Exchange Pickup (Signal Noisy).
3) Check solder of IC101circumference.
(pin#1,2,3 pin#87-90,
FE_Servo: R102, C405
TE_Servo: R101, C101)
4) Exchange IC101(AFE).
5) Exchange IC301(MPU & DSP).
6
49xx
Unwritten Slice Level Adjust NG. 4906: RAM Disc NG (Exchange Disc).
N0.09
(RAM Only)
1) Check solder of IC101circumference.
(pin#1,2,3 pin#87-90)
2) Exchange IC101(AFE).
3) Exchange IC301(MPU & DSP).
80
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No. Error Code
SSB Byte21,22
Contents of fail
Fail Analysis
Block Diagram
No.10
7
8
9
4Axx
Focus Offset Adjust NG.
(DVD-ROM,CD-R/RW)
4A08: Disc Unmatch(Exchange Disc).
1) Check Pickup FFC Connection.
2) Exchange Pickup.
3) Exchange IC301(MPU & DSP).
4A5x
4A6x
Focus Offset Adjust NG.
(RAM Only for PID)
1) RAM Disc NG (Exchange RAM Disc)
2) Exchange Pickup
3) Exchange IC101(AFE)
No.11
4) Exchange IC301(MPU & DSP)
4A8x
Focus Offset Adjust NG.
(RAM Only for Data)
4A88: RAM Disc NG (Exchange RAM Disc). No.12
1) Exchange Pickup.
2) Exchange IC101(AFE).
3) Exchange IC301(MPU & DSP)
10 4B0x
Tilt Adjust NG(RAM Only).
1) Check Pickup FFC Connection.
2) Exchange Pickup.
No.13
3) Check solder of IC101circumference.
(pin#6,7 R106, C106, R107, C107)
4) Exchange IC101(AFE).
5) Exchange IC301(MPU & DSP).
11 4B8x
Tilt Adjust NG(DVD-/+ R/RW).
1) Check Pickup FFC Connection.
2) Exchange Pickup.
No.14
3) Check solder of IC601 circumference.
4) Exchange IC601.
5) Check solder of IC301 circumference.
6) Exchange IC301
7) Exchange Slider Motor.
12 4CCx
13 4Dxx
Data Slice Adjust NG.
(RAM Only)
1) Exchange Pickup.
2) Exchange IC101(AFE).
3) Exchange IC301(MPU & DSP).
No.12
No.15
Focus Deviation Adjust NG.
1) Check Pickup FFC Connection.
2) Exchange Pickup.
3) Check solder of IC301circumference.
4) Exchange IC301(MPU & DSP).
14 182x
01xx
Home Position Adjust NG.
(DVD-SL Only)
1) Check FFC Connection.
2) Check Slider FPC Connection.
3) Exchange Slider Motor.
4) Check solder of IC101circumference.
5) Exchange IC101(AFE).
No.21
No.16
15 52xx
Focus Offset Adjust NG.
(DVD-R/RW, +R/RW)
1) Check Pickup FFC Connection.
2) Exchange Pickup.
3) Check solder of IC101circumference.
(pin#1,2,3 pin#87-90,
TE_Servo: R101, C101)
4) Exchange IC101(AFE).
81
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No. Error Code
SSB Byte21,22
Contents of fail
Fail Analysis
Block Diagram
No.07
16 54xx
DPP Amp Adjust NG.
(CD Disc Only)
1) Check Pickup FFC Connection.
2) Exchange Pickup.
3) Check solder of IC101circumference.
(pin#1,2,3 pin#87-90,
TE_Servo: R101, C101)
4) Exchange IC101(AFE).
5) Exchange IC301(MPU & DSP).
17 55xx
Lens Shift/ Tilt Adjust NG.
(CD Disc Only)
1) Check Pickup FFC Connection.
2) Exchange Pickup.
3) Check solder of IC601 circumference.
4) Exchange IC601.
5) Check solder of IC301 circumference.
6) Exchange IC301
7) Excahange Slider Motor
No.14
No.06
No.13
18 56xx
Focus Level Adjust NG.
1) Check Pickup FFC Connection.
2) Exchange Pickup.
3) Check solder of IC101circumference.
(pin#1,2,3 pin#87-90,
PE_Servo: R103, C406)
4) Exchange IC101(AFE).
5) Exchange IC301(MPU & DSP).
19 57xx
HFPE Amp/Gain Adjust NG.
1) Check Pickup FFC Connection.
2) Exchange Pickup.
3) Check solder of IC101circumference.
(pin#6,7 R106, C106, R107, C107)
4) Exchange IC101(AFE).
5) Exchange IC301(MPU & DSP).
20 58xx
21 59xx
Lens Sensitivity Adjust NG.
Spindle Offset Adjust NG.
1) Check Pickup FFC Connection.
2) Exchange Pickup.
3) Check solder of IC301circumference.
4) Exchange IC301(MPU & DSP).
No.17
No.18
1) Check Spindle FFC Connection.
2) Check solder of IC601circumference.
(pin#12-14)
3) Exchange IC601(Driver).
4) Exchange Spindle Motor.
5) Check solder of IC301circumference.
6) Exchange IC301(MPU & DSP).
82
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No. Error Code
SSB Byte21,22
Contents of fail
Fail Analysis
Block Diagram
22 5Axx
ADIP read timing Adjust NG.
5A01: Check DVD+R Disc (Exchange Disc) . No.19
1) Check Pickup FFC Connection.
2) Exchange Pickup.
3) Exchange IC101(AFE).
4) Exchange IC301(MPU & DSP).
5) Exchange IC601(Driver)
23 5Cxx
Signal Amp Error.
1) Check Pickup FFC Connection.
2) Exchange Pickup.
No.06
3) Check solder of IC101circumference.
(pin#1,2,3 pin#87-90,
PE_Servo: R103, C406)
4) Exchange IC101(AFE).
5) Exchange IC301(MPU & DSP).
24 5Dxx
Focus Offset Adjust NG.
(DVD-R/RW,+R/RW in Data)
1) Check Pickup FFC Connection.
2) Exchange Pickup.
No.20
3) Check solder of IC101circumference.
4) Exchange IC101.
5) Check solder of IC701circumference.
6) Exchange IC301(MPU & DSP).
7) Exchange Slider Motor.
83
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3. Loading Sequence Error (Lead in Error)
No. Error Code
SSB Byte21,22
Contents of fail
Fail Analysis
Block Diagram
No.21
1
2503,2504
RTZ Timeout(Sled Timeout).
1) Check Slider FPC Connection.
2) Check solder of IC601 circumference .
(pin#2-3, 6, 8-10)
3) Exchange IC601.
4) Exchange Slider Motor.
2
2020,2021
2101,2102
2000~2010
Focus Fail.
1) Check Pickup FFC Connection.
2) Exchange Pickup.
3) Check solder of IC601circumference.
4) Exchange IC601(Driver)
5) Check solder of IC101circumference.
(pin#1,2,3pin#87-90,
No.22
No.22
No.18
FE_Servo: R102, C405)
6) Exchange IC101(AFE).
3
Tracking Fail.
1) Check Pickup FFC Connection.
2) Exchange Pickup.
3) Check solder of IC601circumference.
4) Exchange IC601(Driver).
5) Check solder of IC101circumference.
(pin#1,2,3 pin#87-90,
TE_Servo: R101, C101).
6) Exchange IC101(AFE).
4
Spindle Fail.
1) Check Spindle FFC Connection.
2) Check solder of IC601circumference.
(pin#12-14)
3) Exchange IC601(Driver).
4) Exchange Spindle Motor.
5) Check solder of IC301circumference.
6) Exchange IC301(MPU & DSP).
84
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* Ver1.0 It created based on the PLT circuit diagram.
JR6 Power Supply System Diagram
L601
Poly SW
12V
DRV IC601 R2S30202FP
VM1 #22 Motor power supply 1(Spindle)
VM2 #05 Motor power supply 2(Slide)
SW701
12V
miniSMDC150F/24
S705 OPEN
S704 OPEN
(Raychem)
Vso
CN101 P/U (LDD) Vso5V #29
L151
IC101 AFE(R2S35002)
VCC1 #08 Power (5.0V)
VCC2 #78 Power (5.0V)
5VR
IC102 LM258-D VCC #08
(ON SEMIconductor) OP-amp
CN101 P/U
OEIC(Vcc) #44 & FM(Vcc) #11
Poly SW
SW702
5V in
miniSMDC150F/24
(Raychem)
CN101 P/U Vsa5(Vcc) #15
S713 OPEN
S714 OPEN
Tr
Q631
Light Scribe Encoder Module Vcc 5V
5V
UMC5N
UMC5N
Audio Output
Q901 Tr(UMC5N)/Q902 Tr(UMG4N)
5VP
Tr
Q651
Front PWB Led Control Vcc 5V
IC601 DRV 5VCC(#32)/VM3(#26)
CN101 P/U LDD Vsl2.8(Vcc) #16
L602
Torex Regurator
IC703 XCM403AA03SR
Vin=5.00
V0=2.80
V
V
S708 OPEN
S709 OPEN
IC703
2.8V
REG
2.5(2.8)
3.3A
IC101 AFE (R2S35002)
VDD1 #69 Power
VDD2 #91 Power
VDD3 #11 Power
VDD4 #59 Power
VDD5 #22 Power
SRVREF #82 Power
L150
IC703
3.3V
REG
Pc=
W
Vin=5.00
V0=3.30
V
V
IC301 DSP (R8J32007)
VCCA #186 3.3V
3.3A
VCCA #166 3.3V
S715 OPEN
L710
R354
0
3.3A-2
3.3D
IC301 DSP (R8J32007)
Audio VCCA #99 3.3V
IC302 Flash Memory Fujitsu/Mcronics
IC301 DSP (R8J32007)
#58 VCCIO [DSP I/O]
#75 VCCIO [DSP I/O]
#88 VCCIO [DSP I/O]
#108 VCCA [Analog]
#133 VCCIO [DSP I/O]
#139 VCCA [Analog]
#148 VCCIO [DSP I/O]
#185 VCCA [Analog]
#200 VCCIO [DSP I/O]
#53 VCCR [SDRAM]
#52 VCCIO [DSP I/O]
#32 VCCIO [DSP I/O]
#26 VCCRQ [SDRAM I/O]
#08 VCCRQ [SDRAM I/O]
#07 VCCIO [DSP I/O]
#02 VCCR [SDRAM]
IC301 DSP (R8J32007)
#028 VCC Core Power]
#041 VDD [Core Power]
#072 VDD [Core Power]
#130 VDD [Core Power]
#146 VDD [Core Power]
L305
IC301 DSP (R8J32007)
#189 VDDAA [Analog Power]
#193 VDDAA [Analog Power]
#197 VDDAA [Analog Power]
L301
L304
Torex Regurator
IC701 XCM403AA02SR
Vin=2.80
V0=1.50
V
V
S706 OPEN
S707 OPEN
IC301 DSP (R8J32007)
#159 VDDAA [Analog Power]
1.5D
1.5A
IC701
1.5V
REG
IC701
2.8V
REG
Pc=
Vin=5.00
V0=2.80
W
V
V
85
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PCB Poor Analysis - Check list
No
1
Circuit/IC
Signal
Signal/Level
12V
mesurement-point (IC-pin or Device)
Power supply
Line-12V
Line-5V
CN801-41
2
5V
CN801-44
3
(IC701)
reg-1.5V
reg-2.8V
reg-3.3V
VDD : 3.3V
CS
1.5V
IC701-2
4
2.8V
IC703-5
5
(IC703)
Flash-ROM
(IC302)
3.3V
IC703-2
6
3.3V
37
7
Active-Low
read-CK
1.5V
26
8
XRD
28
9
DSP
VDD : 1.5V
VCC(D) : 3.3V
41, 28, 72, 130, 146, 159, 189, 193, 197
10
(IC301)
3.3V
7, 32, 52, 58, 75, 88, 133, 148, 200, 199, 2, 53, 185,
139, 108, 8, 26
11
12
13
14
15
16
VCC(A) : 3.3V
Clock-34MHz
MRSTB
3.3V
186, 166, 99
33.8688MHz
(3.3V)High
5.0V
106, 107
202
AFE
VCC : 5.0V
VDD : 3.3V
VCC : 5.0V
8, 78
(IC101)
OP-amp
(IC102)
7ch-DRV
(IC601)
3.3V
22, 11, 91, 59, 69, 82
8
5.0V
17
18
19
20
21
22
23
24
25
26
27
5VCC : 5V
5V
32
26
5, 22
42
11
44
43
9
VM3 : 5V
5V
VM1, 2 : 12V
REF : 1.65V
VCC(FM) : 5.0V
12V
1.65V
5.0V
Pick-up
VCC(OEIC) : 5.0V 5.0V
VC(OEIC) : 2.1V
VREF : 2.5V
VSL25 : 2.8V
VSA5 : 5.0V
VSO : 5.0V
2.1V
2.5V
2.8V
5.0V
5.0V
16
15
29
* When there are twe or more power supply pins of LSI, it checks by one ramdom pin first.
87
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HW Self- Diagnostic function
1. Self-Diagnostic Function by LED Blink.
• Basic operation: At JR6, MPU is included in DSP, MPU accesses each peripheral (inside, exterior) device,
and discover a defect by the ability of a read/write of data to be performed correctly. Since MPU operates by
the program with a built-in Flash-ROM, when abnormalities are in MPU, Flash-ROM, and these Data-Bus &
control signals, this self-diagnostic function cannot be used. In such a case, the case where LED does not
light up at all at the time of a power supply injection is almost the case.
• MPU: In DSP Flash-ROM (16Mb) is connected to the exterior Bus of MPU. Even if the MPU-Bus terminal of
Flash-ROM short-circuits, it becomes impossible for MPU to read the right program data from Flash-ROM,
and stops for this reason, turning on LED at all. On the other hand, the own poor device of DSP, and the
open state of IC-pin, when a defect does not influencing Bas of MPU, it can detect correctly and becomes
blink of LED according to those defects.
• DSP: DSP has ATAPI-IF, LDD-serial-IF, AFE-serial-IF, and an AFE control signal as Digital-IF. As Analog-
IF, it has the slice circuit of RF signal from AFE, PLL, the objects ADC and DAC for SERVO, and ADC for
ADIP detection. Among these, own poor Digital of DSP, and AFE-serial-IF can detect by this self-diagnostic
function.
• AFE: Poor detection of AFE is restricted to detection of a limitation-item. Since the greater part of the
function is analog signal processing, AFE serves as a register in AFE, and a check, which accepts it, serial
IF in the logical digital examination from MPU. In addition, serial-IF for AFE control is performed via DSP.
This is writing in the Write command and setting data, and is automatically transmitted to the predetermined
register of DSP. Conversely, when it leads the register information on AFE, the read command can be
written in the predetermined register of DSP, and the value of an AFE register can be read by reading the
read register of DSP after that. Therefore, serial [between the poor register of AFE, and AFE and DSP],
when there is LED blink with poor AFE — the defect of IF or the defect of the register for AFE of DSP is
considered.
• Refer to the contrast table of the number of times of blink of LED, and a poor part.
• The self-diagnostic function by this LED blink is carried out in the state of a set without a PCB independent
or loading Disc.
88
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2. LED does not blink at all at the time of a power supply injection. Eject-SW does not react.
(1) Is it normal to the exterior Bus (Data-Bus, Address-Bus, control signal system) of MPU?
Viewing — check: -- a short circuit, opening, etc.
• The device connected to the exterior Bus of MPU in DSP, and its signal list
Peripheral device
[Bus/Signal]
Address
Data
Flash -ROM
(IC302)
A1~A20
D0~D15
CS0B
CS*
WCK
WR
RCK
RD
=> It repairs, when abnormalities are discovered.
(2) Does the power supply circuit operate normally?
External input 12V, external input 5V, regulator 3.3V, regulator 2.8V, and regulator 1.5V
=>When the abnormalities are discovered, an external power supply, a power supply cable, and Regulator
IC are exchanged.
=> Since a problem is in a load side when not improving, even if it exchanges the above, and attached sheet
JR6 power-supply system figure is made reference, and poor portions, such as a short circuit of a power
supply part, are found out and fixed.
(3) Is the clock of MPU in DSP oscillated correctly?
Checked the ceramic oscillation element’s X301 both-ends and DSP(106)(107) 33.87MHz oscillating.
=> When 3.3V power supply is correctly supplied to DSP and the clock is not oscillating correctly, it is the
defect of MPU, or an oscillation element defect, and part exchange is performed in order of DSP and
X301.
(4) The defect of Flash-ROM
Although the clock of DSP is oscillating correctly and the power supply circuit is also outputting normal
voltage, when LED does not blink at all at the time of a power supply injection and Eject-SW does not react,
either, poor Flash-ROM is the most doubtful.
=> Flash-ROM (IC302) are exchanged.
Note: Before Flash-ROM exchange, the CS signals of the external device of MPU in DSP connection, an
Address signal, and a Data signal are observed on a waveform level, and since the but most amount of work
and the special knowledge which can raise the discovery accuracy of a poor part are necessities,
recommendation is impossible.
(5) Even if it performs the above-mentioned repair, when not improving, the disconnection and the short circuit
which cannot be discovered, can be considered in viewing of PCB. Moreover, partial breakage (although a
clock is oscillated, somewhere in insides do not operate.) of DSP can be considered.
=> When not improving above, the possibility that a PCB pattern is faulty is high, and judges repair to be
difficult.
89
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3. Motor, Abnormalities in Actuator System
The drive circuit of a motor & actuator consists of the three ICs IC601(R2S30202FP). The work of each IC is
as follows.
(1) IC601(R2S30202FP) : 7ch driver
Spindle motor driver: 180° audio drive Type, an analog input, a PWM drive, a Vm=12V.
Stepping motor driver X2: analog input, a PWM drive (differential), a Vm=12V
Loading motor driver: Input/Output PWM drive, Vm=5V.
Focus actuator driver: analog input / output (differential), a Vm=5V
Tracking actuator driver: analog input / output (differential), Vm=5V
Tilt actuator driver : analog input/output (differential), Vm=5V.
A motor & actuator and its correspondence pin
Signal/CH
Input
SPDL-MT
(1)SPIN
STEP-MT
Load-MT
(41)LOIN
Focus-ACT
(40)FOIN
Track-ACT
(39)TOIN
Tilt-ACT
(38)TLIN
(2)SL1IN
(3)SL2IN
Reference
Output
(42)REF 1.65V
(12)U
(13)V
(14)W
(6)SL2+
(8)SL2-
(9)SL1+
(10)SL1-
(27)LO+
(28)LO-
(34)FO+
(35)FO-
(31)TO+
(30)TO-
(36)TL+
(37)TL-
A control mode setup by the control terminal
EN1(20)
Low
EN2(21)
Low
SPDL
off
SLED
off
Load
Focus/Track/Tilt
off
on
off
off
off
off
on
on
Low
High
off
on
High
Low
on
on
High
High
on
on
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BLOCK DIAGRAM
Flash-ROM
(2MByte)
MBM29LV160BE
or Equivalent
(FUJITSU)
OPU:HOP-7632TS
(HITACHI ME)
Disc
Loading
motor
Interface
connector
Analog Front End
R2S35002
DVD/CD DSP
(DVD/CD/Servo/ATAPI)
R8J32007FP
Analog
audio
PU
Disc
100pin-TQTF
(RENESAS)
Slide
motor
motor
256pin LQFP
(RENESAS)
Unit
mechanism
DVD-codec
CD-codec
Host IDE
LPP/ADIP decorder
Servo DSP
7ch-Driver
R2S30202FP
SPDL/SLED/Fo/Tr/Ti/LD
ATAPI-IF
Microprocessor
(RENESAS)
Tray Detect
SW
Device
configuration
jumper
Eject
SW
MASTER
SLAVE
Limit
SW
CSEL
LED
3.3V/2.8V Reg.IC
XCM403AA03SR
(TOREX)
3.3V
2.8V
12V
GND
5V
RST
1.5V
2.8V/1.5V Reg.IC
XCM403AA02SR
(TOREX)
RST
91
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