Intel Computer Hardware Intel NetStructure MPCHC5525 System Master Processor Board IPMI Reference Driver User Manual

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Intel NetStructure™  
MPCHC5525 System Master  
Processor Board IPMI Reference  
Driver  
User’s Manual  
May 2004  
Order Number: 301561-001  
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Contents  
Contents  
4
Supported IPMI Commands  
and BMC/PM Addresses23  
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Contents  
Figures  
Tables  
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Contents  
Revision History  
Date  
Revision  
001  
Description  
Initial Release of this manual.  
May 2004  
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Contents  
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Using This Guide  
Using This Guide  
1
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The Intel NetStructure™ MPCHC5525 System Master Processor Board IPMI Reference Driver  
User’s Guide is intended for users qualified in electronics or electrical engineering. Users should  
have a working understanding of PCI, CompactPCI*, telecommunications, and the IPMI  
Specification V1.0 Rev. 1.1.  
1.1  
Terms and Definitions  
Table 1.  
Terms and Definitions  
Abbreviation  
BIB  
Description  
Board Information Block  
BMC  
CMD  
CPU  
CRC  
ECC  
FRU  
GPIO  
I2C  
Base Board Management Controller  
Command Code  
Central Processing Unit  
Cyclic Redundancy Code  
Error Correction Code  
Field Replaceable Unit  
General Purpose I/O  
Intelligent I/O Controller  
IBMU  
ICMB  
IPMB  
IPMI  
IRQ  
Intelligent Board Management Unit  
Intelligent Chassis Management Bus  
Intelligent Peripheral Management Bus  
Intelligent Platform Management Interface  
Interrupt Request  
KCS  
LSB  
Keyboard Controller Style  
Least Significant Byte  
MSB  
NetFn  
NMI  
Most Significant Byte  
Network Function Code  
Nonmaskable Interrupt  
OEM  
PMC  
POST  
PSU  
RAM  
RTB  
Original Equipment Manufacturer  
Peripheral Management Controller  
Power-on Self Test  
Power Supply Unit  
Random Access Memory  
Rear Transition Board  
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Using This Guide  
Table 1.  
Terms and Definitions  
Abbreviation  
SDR  
Description  
Sensor Data Record  
SEL  
SMI  
System Event Log  
System Management Interface  
1.2  
Other Sources of Information  
Table 2.  
Reference Documents  
Document  
Can be found at  
Intel® NetStructure™ MPCBL5525 System Master  
Processor Board Technical Product Specification  
Intel order number 301070  
Intelligent Platform Management Interface Specification  
v. 1.0 Rev. 1.1  
developer.intel.com  
Platform Management FRU Information Storage  
Definition v1.0 Rev. 1.1  
Intelligent Chassis Management Bus Bridge Specification  
v1.0 Rev. 1.2  
PICMG 2.9 R1.0 System Management Specification  
Force Computers* PENT/CPCI-735/736 Family  
Reference Guide  
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IBMU Functionality  
IBMU Functionality  
2
2.1  
Introduction  
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The Intelligent Board Management Unit (IBMU) equips the Intel NetStructure™ MPCBL5525  
board with Intelligent Platform Management Interface (IPMI) functionality as designed by Force  
Computers*. IPMI is used for platform management.  
IPMI is completely independent of the software running on the CPU board; it remains operative  
even if the board software has crashed or the board is not powered. Due to this fact, IPMI is used to  
log system status information.  
IPMI functionality on the IBMU is based on the Intelligent Platform Management Standards V1.0  
Rev. 1.1. In addition, the following optional features applying to the IPMI standard are offered:  
Buses that allow internal and external communication  
Optional IPMI commands  
BMC standby mode  
The features of the IBMU allow platform management with devices with and without IPMI  
controllers (nonintelligent devices). Both are handled differently in many aspects as explained in  
the next sections.  
2.1.1  
2.1.2  
Purpose of IPMI  
The purpose of IPMI is to gather information and control devices (e.g., fans). The types of  
information that can be gathered are:  
Inventory – Board type, manufacturer, serial number, board revision etc.  
Sensor – Temperature, fan speeds, power supply unit (PSU) voltages.  
The system management software can use the gathered information to monitor system events and  
trigger actions, i.e. perform so called platform management.  
Who Gathers the Information?  
In a system there are, for example, several CPU boards and fans. Each of them has inventory data  
and sensors and can provide this inventory data and sensor data. To make communication within  
your system easier, your system management software communicates with the CPU boards and  
fans via one single IPMI controller on a CPU board. This IPMI controller will be the Base Board  
Management Controller (BMC) and the other IPMI controllers on CPU boards or fans will be  
Peripheral Management Controllers (PMs).  
The BMC has a central function in gathering inventory and sensor-specific data, whereas the PMs  
only provide data. That is why only one BMC is allowed within one system chassis.  
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IBMU Functionality  
2.1.3  
Where Is IPMI-Relevant Information Stored?  
The following table shows which information is stored in which repository of a BMC/PM.  
Table 3.  
Data in Repositories  
Information  
Repository  
Available in  
Field Replaceable  
Unit (FRU)  
Inventory information on board or device: Manufacturer ID, product ID etc.  
PM and BMC  
Messages concerning events, such as abnormal voltages, out-of-range  
temperatures etc.  
System Event Log  
(SEL)  
BMC  
Sensor data records (SDRs) of all sensors on a board. SDRs contain, for  
example, threshold values, conversion factors, and information on  
whether events are generated.  
Local SDR  
PM and BMC  
SDRs of all sensors available in the entire system. At first, the SDR  
repository of the BMC is empty, and the SDRs of all PMs must be copied SDR  
into the BMC’s SDR repository (will be explained later).  
BMC  
The IBMU provides approximately 100 Kbytes of flash memory for each repository.  
The following figure shows the repositories available in IPMI controllers operated as BMC or PM  
after the SDRs of the PMs were copied into the BMC’s SDR repository. Nonintelligent devices  
provide none of the repositories.  
Figure 1.  
Repositories of BMC and PMs  
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2.1.4  
Basic Communication Principles  
The system management software communicates with the devices via the BMC. It can  
communicate with:  
Boards/devices with IPMI controller  
Boards/devices without IPMI controller (nonintelligent devices)  
On-board sensors  
The following sections describe the basic communication procedure between the system  
management software and the boards/devices given in the list above.  
2.1.4.1  
2.1.4.2  
Boards/Devices with IPMI Controller  
As seen in Figure 1, the BMC contains SDRs of all sensors in the system. If the temperature  
threshold value is exceeded on a board set as PM, the PM sends an event message to the BMC. The  
system management software can then trigger actions, for example, to increase the fan speed.  
Nonintelligent Devices  
For nonintelligent devices, there are no SDRs in the SDR repository of the BMC. Since  
nonintelligent devices have no IPMI controller, they do not send event messages. For this reason,  
the system management software must regularly request sensor data (e.g., temperature) and check  
whether the value has exceeded the normal range.  
2.1.4.3  
On-Board Temperature Sensor  
The on-board temperature sensor is connected to the IPMI controller; therefore, there is also an  
SDR for this sensor in the BMC’s SDR repository. If, for example, the temperature threshold value  
is exceeded, the IPMI controller sends an event message to the BMC. The system management  
software can then trigger actions, for example, to increase the fan speed.  
2.1.5  
Requirements  
2.1.5.1  
Boards/Devices with IPMI Controller and On-Board Sensors  
For communication between system management software and IPMI controller devices or on-  
board sensors, the following components are necessary:  
SDRs – For each sensor attached to an IPMI controller an SDR must be available  
IPMI driver for operating system  
Middleware  
System management software  
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IBMU Functionality  
Figure 2.  
Required Parts for Communication with IPMI Devices and On-Board Sensors  
2.1.5.2  
Nonintelligent Devices  
For the communication between the system management software and nonintelligent devices the  
following components are necessary:  
IPMI driver for operating system  
Middleware  
System management software  
Figure 3.  
Required Parts for Communication with Nonintelligent Devices  
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IBMU Functionality  
2.1.6  
Available Drivers  
IPMI drivers for the following operating systems are available:  
VxWorks*  
Windows 2000/NT*  
Solaris*  
MontaVista Linux*  
These drivers include an application programming interface (API) to use IPMI commands. Please  
see Appendix A for an API to use IPMI commands. Additional information regarding  
implementing this software is available by contacting Force Computers  
2.2  
How Does Communication Work?  
Communication in this case means sending IPMI commands and receiving a response. All standard  
IPMI commands are described in the IPMI Specification.  
System management software can communicate with:  
Devices with IPMI controller  
Nonintelligent devices  
On-board sensors  
Communication is realized via buses and/or interfaces.  
Figure 4.  
Buses/Interfaces Provided by the IBMU  
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IBMU Functionality  
Whereas the Keyboard Controller Style (KCS0) interface and the Intelligent Peripheral  
Management Buses (IPMB) allow communication between components within one chassis, the  
KCS0 interface and ICMB connect the devices of one chassis with another chassis. The IPMB and  
ICMB buses are IBMU powered and will be available even if the CPU board is not powered.  
Note: On some boards the sensors on the sensor bus are not powered by the IBMU. This means that if the  
power supply is interrupted, the sensor status at the time of power supply interruption is logged but  
the current sensor value cannot be read. The current sensor value can be read as soon as the board  
power is up again. For information on which sensor on the sensor bus is not powered by the IBMU,  
refer to the CPU board’s TPS.  
The following sections describe which device is connected to which bus and give simple examples  
for communication within a chassis and between two chassis.  
2.2.1  
Communication Within a Chassis  
Communication within a chassis is possible via IPMB and the sensor bus which are both I²C-based  
buses. Force Computers IBMU offers an IPMB0 and IPMB1 bus. The purpose of each bus is as  
follows:  
IPMB0 – Allows communication between BMC and IPMI controllers (PMs) on CPU boards.  
IPMB1 – Allows communication between:  
— BMC and IPMI controller of PMs like PSUs, fan trays, etc.  
— BMC and devices in the system that are not equipped with an IPMI controller  
Sensor bus – A private bus that allows communication between the BMC and on-board  
temperature sensor  
Figure 5.  
Communication within a Chassis  
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The devices are connected to the IPMB1 via the Intel NetStructure™ MPRTM4848 Rear  
Transition Board for the respective CPU board. The IPMB1 signals are routed from the IPMI  
controller on the CPU board to the RTB via the backplane and are then available at an IPMB1  
connector of the RTB. This IPMB1 connector is located on-board the RTBs.  
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IBMU Functionality  
Note: After installing or removing a board under hot-swap conditions, it is possible that nonintelligent  
devices will block the IPMB bus. Therefore:  
If the device is powered by its own power supply, turn off the device, then turn it on again.  
If the device is powered by the system’s power supply, turn off the whole system, then turn on.  
2.2.1.1  
Devices with IPMI Controller  
The following describes an easy event handling example for a fan module with IPMI controller.  
The IPMI controller on the CPU board is the BMC and the one on the fan module the PM.  
1. PM sends an event message to the BMC via IPMB1 saying that the fan temperature has  
exceeded the threshold value defined in the SDR.  
2. The BMC stores the message in the SEL repository and in an event message buffer.  
3. The system management software regularly checks the SEL whether an event message was  
sent with the IPMI command “Read SEL Entry”.  
4. When the system management software gets the event message it triggers an action according  
to the defined error handling procedure, i.e. increase fan speed via the BMC and fan register.  
Figure 6.  
Example for PM with IPMI Controller  
System  
Management  
PM  
BMC  
Buffer  
SEL  
Software  
1
4
2
3
IPMI  
Controller  
of Fan  
Event Message  
Buffer  
SDR  
4
IPMB1 Interface  
To make this possible the SDR of each sensor connected to an IPMI controller has to be written  
into the SDR repository of the BMC on the CPU board.  
2.2.1.2  
Nonintelligent Devices  
Suppose another fan module does not have an IPMI controller. In this case, it cannot send event  
messages to the IPMI controller on the CPU board. Therefore, the system management software  
has to read the temperature of the fan module regularly using the IPMI command “Master Write-  
2
Read I C” and control it accordingly.  
2
1. The system management software sends the IPMI command “Master Write-Read I C” to the  
BMC via IPMB1.  
2. The BMC reads the temperature from the sensor on the fan.  
3. The BMC forwards the temperature value to the system management software.  
4. If the temperature is too high, the system management software can change the fan speed via  
2
the IPMI command “Master Write-Read I C” and the fan speed register.  
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Figure 7.  
Example for Nonintelligent Devices  
2.2.1.3  
On-Board Temperature Sensor  
To read out the actual temperature value from the on-board sensor, the procedure is as follows:  
1. The system management software sends the IPMI command “Get Sensor Reading” to the  
BMC, the BMC reads the value from the on-board sensor and sends it to the system  
management software.  
2. The system management software compares the read value with a threshold value.  
3. If the temperature is too high, the system management software can, for example, initiate a  
switch board or an alarm module to switch off the board by deactivating the BD_SEL# signal.  
Figure 8.  
Example: On-Board Sensor  
2.2.2  
Communication between Chassis  
Communication between several chassis is possible with the ICMB, which is an RS-485-based bus.  
It connects the BMCs of two or more chassis. You can connect up to 42 chassis, according to the  
ICMB Specification v1.0 Rev. 1.2. Refer to this specification for information on maximum cable  
length.  
The chassis are connected via the CPU boards’ RTBs. The ICMB connector is typically located on  
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the RTB’s front panel. See the Intel NetStructure™ MPRTM4808 Technical Product Specification  
for further reference.  
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IBMU Functionality  
Figure 9.  
Intelligent Chassis Management Bus (ICMB)  
The connection via ICMB is useful for maintenance purposes. If, for example, the CPU board in  
one chassis hangs, the BMC in the other chassis can read the log file of the affected BMC via  
ICMB.  
Another application is the monitoring and controlling of nonintelligent devices. If the CPU board  
the BMC is located on hangs or is in stand-by mode, the BMC in another chassis can request sensor  
2
data of the nonintelligent device via ICMB and the command “Master Write-Read I C”.  
The following section provides a simple communication example. The example supposes that a  
nonintelligent fan module located in chassis 1 and connected via IPMB1 to the BMC in chassis 1  
(BMC1) is monitored and managed by the BMC in chassis 2 (BMC2).  
Figure 10.  
Fan without IPMI Controller Monitored via ICMB  
The communication procedure is as follows:  
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IBMU Functionality  
1. The system management software residing on the CPU board in chassis 2 sends an ICMB  
message to the BMC2. This ICMB message contains the ICMB header information and the  
2
IPMI command “Master Write-Read I C” with which the fan sensor data is requested.  
2. The BMC2 sends the ICMB message to the BMC1 via ICMB.  
3. BMC1 extracts the IPMI command “Master Write-Read I2C” from the ICMB message.  
4. BMC1 reads the sensor temperature on the fan module via the command “Master Write-Read  
2
I C” and sensor registers.  
5. BMC1 adds an ICMB header to the sensor result and sends the ICMB message via ICMB and  
BMC2 to the system management software.  
Figure 11.  
Example for Nonintelligent Device via ICMB  
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Preparing Software for IPMI Usage  
Preparing Software for IPMI Usage 3  
3.1  
Action Plan  
Before being able to use IPMI the following steps are required and will be described in this chapter.  
3.2  
Notes on Writing Your Own IPMI Driver  
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The Intel NetStructure™ MPCBL5525 offers IPMI drivers for several operating systems. For  
information about designing your own IPMI driver, refer to the Intelligent Board Management Unit  
Reference Guide (PN217328), available by contacting Force Computers.  
The interface type used by the IBMU is the Keyboard Controller Style (KCS) interface. For the  
communication between the IPMI controller and the system management software, the KCS0  
interface is used. There are also the KCS1 and KCS2 interfaces: KCS 1 can be used to enable ECC  
error logging in the SEL via the operating system, and KCS2 is used for the BIOS POST codes.  
The KCS0 interface can be used in polled or in interrupt-driven mode. The default mode is polled,  
i.e. the application management software regularly reads the KCS0 register to find out whether  
data has arrived or the state has changed. Interrupt-driven mode means that the IPMI controller sets  
an interrupt in case data has arrived or the state has changed so that the IPMI driver is informed  
automatically.  
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Preparing Software for IPMI Usage  
3.3  
Sensor Data Records  
For each sensor attached to an IPMI controller in a system you need SDRs. SDRs for sensors on  
Force CPU boards are provided by Force Computers. SDRs for sensors on third-party products  
must be obtained by the respective manufacturer.  
3.3.1  
Obtaining SDR Settings  
To obtain SDR settings (thresholds, whether thresholds can be changed, whether a sensor generates  
events etc.), the default way is to write a function using the IPMI command “Get Device SDR” via  
your operating system IPMI driver API. To obtain only the threshold values, the default way is to  
write a function using the IPMI command “Get Sensor Threshold” via your operating system IPMI  
driver API.  
Note: On some boards, the thresholds for the board temperature sensor can be changed. For these boards,  
the upper and lower threshold values are by default set to the sensor’s minimum/maximum reading  
values so that events from the board temperature sensor are not likely to occur. To generate events,  
change the thresholds values. Keep in mind that the measured sensor value depends on the system’s  
components and their location. For information on where the board temperature is measured on  
your CPU board, refer to the CPU board’s TPS.  
servers/ipmi/tools.htm for the Intel IPMI Tool. See the IPMI Specification for more information.  
3.4  
Notes on Writing System Management Software  
For creating your own system management software you can use all IPMI commands marked as  
mandatory in the IPMI Specification. For information regarding Force-specific OEM IPMI  
commands, see the Intelligent Board Management Unit Reference Guide (PN217328) available by  
contacting Force Computers.  
With your management software and Force-specific OEM IPMI commands, you:  
Can check status of board sensors (physical sensors such as temperature or voltage sensors and  
discrete sensors). In the following only the reading values of the discrete sensors are described.  
Can obtain IBMU self-test results.  
Have to check whether the IPMI controller watchdog has reset the IPMI firmware.  
3.4.1  
Requirements for Events  
By default, the BMC only receives event messages from sensors attached to the BMC itself. To  
make PMs send event messages to the BMC, you need to define the event receiver, the BMC, via  
the IPMI command “Set Event Receiver”.  
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Preparing Software for IPMI Usage  
3.4.2  
Checking CPU Board Signals  
The IBMU is equipped with several discrete sensors used to check the assertion or deassertion of  
CPU board signals. After an assertion or deassertion of such a signal, the IPMI controller generates  
event messages. For further information on event messages, refer to tables 17-5 and 19-1 of the  
IPMI Specification 1.0.  
Set as PM, the IPMI controller sends these messages to the BMC in the system. The BMC saves  
the messages in the SEL and in the event message buffer.  
Note: In comparison to the event message buffer, the SEL keeps all events, even if the IPMI controller is  
turned off. Therefore, read the events from the SEL with the IPMI command “Get SEL Entry” and  
not from the event message buffer.  
Set as BMC, the IPMI controller simply saves the event messages in the SEL and in the event  
message buffer.  
The following subsections describe the discrete sensors that generate event mes-  
sages which can be read by the system management software.  
Note: Usually the sensor type is used to find out which sensor has sent an event and which signals were  
asserted. Since all sensors checking the CPU board signals are of the same sensor type, you have to  
use the sensor number to distinguish between the sensors.  
3.4.2.1  
Critical IRQ Status  
This sensor reads the following signals which have IRQ capability:  
PCI_RESET  
If asserted, signals that all devices attached to PCI buses are reset.  
NMI  
SMI  
IPMB1_ALERT  
If asserted, signals that a sensor on IPMB1 has reached a critical status.  
3.4.2.2  
3.4.2.3  
CPCI Signal  
This sensor reads two PCI-relevant signals, CPCI_ENUM and CPCI_BD_SEL. CPCI_ENUM is  
asserted, if a board is about to be removed from the system. CPCI_BD_SEL is asserted, if a board  
was fully plugged into the system and is running.  
Ejector Switch  
This sensor reads the LOCAL_ENUM signal. It is asserted when the lower front panel handle on  
the board containing the IPMI module was opened.  
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Preparing Software for IPMI Usage  
3.4.2.4  
POST Code  
This sensor allows you to read the board’s POST code with the IPMI command “Get Sensor  
Reading”.  
Note: This sensor does not generate event messages.  
3.4.3  
Monitoring the IBMU  
The Intel NetStructure MPCBL5525 System Master Board provides the possibility for the system  
management software to obtain information on a possible IBMU problem source (missing SDRs,  
memory error, or inaccessible buses). Furthermore, the IBMU guarantees uninterrupted system  
operation because the IPMI controller watchdog resets the firmware if the firmware hangs.  
3.4.3.1  
3.4.3.2  
Self Test  
The IBMU provides a self test that is run every time it is restarted, i.e. after plugging in the board  
containing the IBMU or after a crash. The self test result can be read with the IPMI command “Get  
Self Test Results”.  
IPMI Controller Watchdog  
The IPMI controller watchdog constantly monitors the IPMI firmware. If it detects a firmware  
crash, it automatically issues a reset of the IPMI controller. The board the IPMI controller is  
located on will NOT be reset.  
If the BMC is reset and a PM sends a message to the BMC during this reset, the message is lost.  
Your system management software therefore must send the command “Re-arm Sensor Events” to  
the PM. Then this PM will send the event as long as the critical situation persists.  
Note: If a PM is reset, your system management application must realize that a reset has occurred and  
initialize the IPMI controller. You need to take this into consideration when programming your  
system management application. Check e.g. the system time which is 0.00 after a reset.  
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Supported IPMI Commands and BMC/PM Addresses  
Supported IPMI Commands  
and BMC/PM Addresses  
4
4.1  
Standard IPMI Commands  
This section provides information on which IPMI commands are supported. All commands are  
uniquely identified by:  
Network function code (NetFn) – Specifies functional category of a command  
Command code (CMD) – Byte which specifies the operation  
The IPMI Specification defines several software channels which allow communication. The  
channel number must always be included in Send Message commands (for further information  
refer to the IPMI Specification). IPMB0 is addressed via software channel 0 and IPMB1 via  
channel 1.  
4.2  
Global IPMI Commands  
All commands in this category defined as mandatory by the IPMI Specification are implemented.  
In addition, the following optional commands are available.  
Table 4.  
Optional Global IPMI Commands  
Command  
NetFn  
CMD  
Cold Reset  
App  
App  
App  
App  
0216  
3216  
0816  
3516  
EnableMessageChannelReceive  
GetDeviceGUID1  
ReadEventMessageBuffer  
1.  
Only available on boards produced after 03/01/2003. You can read the production date from  
the Product Info Area of the FRU repository.  
All implemented commands can be used in every operation mode.  
4.2.1  
4.2.2  
System Interface Commands  
All commands in this category defined as mandatory by the IPMI specification are implemented.  
All commands can be used in every operation mode.  
Watchdog Commands  
All commands in this category defined as mandatory by the IPMI specification are implemented.  
All commands can be used in every operation mode.  
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Supported IPMI Commands and BMC/PM Addresses  
4.2.3  
SEL Commands  
All commands in this category defined as mandatory by the IPMI specification are implemented. In  
addition, the following optional commands are available.  
Note: SEL commands can only be used in BMC mode.  
Table 5.  
Optional SEL Device Commands  
Command  
NetFn  
CMD  
Get SEL Allocation Info  
Reserve SEL  
Storage  
4116  
4216  
4416  
4516  
4616  
Storage  
Storage  
Storage  
Storage  
Add SEL Entry  
Partial Add SEL Entry  
Delete SEL Entry  
4.2.4  
SDR Commands  
All commands in this category defined as mandatory by the IPMI specification are implemented. In  
addition, the following optional commands are available.  
Table 6.  
Optional SDR Device Commands  
Command  
NetFn  
CMD  
Get SDR Allocation Info  
Add SDR  
Storage  
Storage  
Storage  
Storage  
Storage  
Storage  
2016  
2416  
2516  
2616  
2816  
2916  
Partial Add SDR  
Delete SDR  
Get SDR Repository Time  
Set SDR Repository Time  
All commands can be used in every operation mode.  
4.2.5  
FRU Inventory Device Commands  
All commands in this category defined as mandatory by the IPMI Specification are implemented.  
The commands can be used in every operation mode.  
The FRU information returned by the IPMI command “Read FRU Inventory Data” is compatible  
with the Platform Management FRU information Storage Definition v1.0.  
The size of the complete FRU record consisting of:  
Internal Use Area  
Board Info Area  
Product Info Area  
Multi Record Area  
is limited to 1024 bytes.  
®
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Supported IPMI Commands and BMC/PM Addresses  
4.2.6  
Sensor Device Commands  
All commands in this category defined as mandatory by the IPMI specification are implemented. In  
addition, the following optional commands are available.  
Table 7.  
Implemented Optional Sensor Device Commands  
Command  
Get Device SDR Info  
NetFn  
CMD  
S/E  
S/E  
S/E  
S/E  
S/E  
S/E  
S/E  
S/E  
S/E  
S/E  
S/E  
S/E  
S/E  
S/E  
S/E  
S/E  
S/E  
2016  
2116  
2216  
2316  
2416  
2516  
2616  
2716  
2816  
2916  
2A16  
2D16  
2E16  
2F16  
0016  
0116  
0216  
Get Device SDR  
Reserve Device SDR Repository  
Get Sensor Reading Factors  
Set Sensor Hysteresis  
Get Sensor Hysteresis  
Set Sensor Threshold  
Get Sensor Threshold  
Set Sensor Event Enable  
Get Sensor Event Enable  
Re-arm Sensor Events  
Get Sensor Reading  
Set Sensor Type  
Get Sensor Type  
Set Event Receiver  
Get Event Receiver  
Platform Event  
All commands can be used in every operation mode.  
4.2.7  
ICMB Bridge Commands  
All commands in this category defined as mandatory by the IPMI specification are implemented. In  
addition, the following optional commands are available.  
Table 8.  
Implemented Optional ICMB Bridge Commands (Sheet 1 of 2)  
Command  
NetFn  
CMD  
Get Bridge State  
Set Bridge State  
Bridge  
Bridge  
Bridge  
Bridge  
Bridge  
Bridge  
Bridge  
Bridge  
0016  
0116  
0216  
0316  
0416  
0516  
0816  
0916  
Get ICMB Address  
Set ICMB Address  
Set Proxy Address  
Get Bridge Statistics  
Clear Bridge Statistics  
Get Proxy Address  
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Supported IPMI Commands and BMC/PM Addresses  
Table 8.  
Implemented Optional ICMB Bridge Commands (Sheet 2 of 2)  
Command  
NetFn  
CMD  
Get ICMB Connector Info  
Prepare for Discovery  
Get Addresses  
Bridge  
Bridge  
Bridge  
Bridge  
Bridge  
Bridge  
Bridge  
Bridge  
Bridge  
Bridge  
Bridge  
Bridge  
0A16  
1016  
1116  
1216  
2016  
2116  
3016  
3116  
3216  
3316  
3416  
3516  
Set Discovered  
Bridge Request  
Bridge Message  
Get Bridge Event Count  
Set Event Destination  
Set Event Reception State  
Send ICMB Event Message  
Get Event Destination  
Get Event Reception State  
4.3  
Force-Specific Commands  
The Force Computers IPMI firmware supports several commands that are not defined in the IPMI  
specification but are introduced by Force Computers. For more information regarding Force-  
specific OEM IPMI implementations, see the Intelligent Board Management Unit Reference Guide  
(PN217328), available by contacting Force Computers.  
4.3.1  
BMC/PMChangeRole  
This command is used to set the operation mode of the IPMI controller (BMC, PM or BMC stand-  
by). In BMC stand-by mode, a mode provided by Force Computers, the IPMI controller is PM but  
can manipulate the system event log (SEL) and sensor data repositories (SDR) like a BMC.  
4.3.1.1  
Request Data  
Byte  
Data Field  
Role  
0: BMC  
1: BMC stand-by  
2: PM  
1
4.3.1.2  
Response Data  
Byte  
Data Field  
1
Completion Code  
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4.3.2  
FlashFileSystemClear  
This command is used to delete all the SDR, FRU and SEL repository and to update the FRU data.  
4.3.2.1  
Request Data  
Byte  
Data Field  
Data Field  
-
-
4.3.2.2  
Response Data  
Byte  
1
Completion Code  
4.3.3  
GetGeographicalAddress  
This command is used to obtain the geographical address of the slot into which the board with the  
2
IPMI controller is plugged in and the IPMI controller’s I C address. This command can be used in  
every operation mode.  
4.3.3.1  
4.3.3.2  
Request Data  
None  
Response Data  
Byte  
Data Field  
1
2
3
4
Completion Code  
Geographical address  
I²C address of the IPMI controller on the IPMB(s) bus(es) in its current role  
I²C address of the IPMI controller on the IPMB(s) bus(es) in PM role  
If the IPMI controller acts as PM or BMC stand-by, the values in bytes 3 and 4 are equal. If the  
2
IPMI controller acts as BMC, the value in byte 3 is 20 and the value in byte 4 is the I C address  
16  
the BMC would have if he acts as PM.  
4.3.4  
GetSDRRepositoryCRC  
This command is used to obtain the Cyclic Redundancy Code (CRC) of the SDR repository. It can  
be used in high-availability configurations to verify that the SDR repository of the IPMI controller  
in BMC active mode and that of the IPMI controller in BMC stand-by mode are identical.  
This command can be used in every operation mode.  
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Supported IPMI Commands and BMC/PM Addresses  
4.3.4.1  
4.3.4.2  
Request Data  
Byte  
Data Field  
Data Field  
-
-
Response Data  
Byte  
1
2
3
4
5
Completion Code  
Record count LSB  
Record count MSB  
CRC16 LSB  
CRC16 MSB  
4.3.5  
SetShadowRepositoryEnable  
This command is used to enable or disable the access to the shadow repository of an IPMI  
controller in BMC stand-by mode.  
Note: This command can only be used if IPMI controller is in BMC stand-by mode. If the IPMI  
controller is not in BMC stand-by mode, “invalid command” is returned.  
4.3.5.1  
Request Data  
Byte  
Data Field  
Access  
1
0: Disabled  
1: Enabled  
4.3.5.2  
Response Data  
Byte  
Data Field  
1
Completion Code  
4.4  
BMC and PM Addresses  
To be able to send messages to other IPMI controllers (PMs) with your system management  
2
software, you need the IPMI controller’s I C address.  
2
If the IPMI controller acts as BMC, the I C address is 20 .  
16  
If the IPMI controller is set to PM, it depends on the geographical address of the board in the  
system. Refer to the system’s backplane description to find the geographical addresses or use the  
2
Force-specific IPMI command GetGeographicalAddress. The mapping of geographical and I C  
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Supported IPMI Commands and BMC/PM Addresses  
addresses is defined in the PICMG 2.9 Specification and is also shown in the table that follows.  
The IPMI controller of a board which has the geographical address 4 in a system, for example, can  
2
be addressed via I C address B6 .  
16  
Table 9.  
Address Mapping  
Geographical Address  
I²C Address  
0
Disabled  
B016  
B216  
B416  
B616  
B816  
BA16  
BC16  
BE16  
C016  
C416  
C616  
C816  
CA16  
CC16  
CE16  
D016  
D216  
D416  
D616  
D816  
DA16  
DC16  
DE16  
E016  
E216  
E416  
E616  
E816  
EA16  
EC16  
Disabled  
1
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
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Supported IPMI Commands and BMC/PM Addresses  
®
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Customer Support  
Customer Support  
5
5.1  
Customer Support  
This chapter offers technical and sales assistance information for this product. Information on  
returning an Intel® NetStructureproduct for service is in the following chapter.  
5.2  
Technical Support and Return for Service  
Assistance  
For all product returns and support issues, please contact your Intel product distributor or Intel  
Sales Representative for specific information.  
5.3  
Sales Assistance  
If you have a sales question, please contact your local Intel NetStructure Sales Representative or  
the Regional Sales Office for your area. Address, telephone and fax numbers, and additional  
information is available at Intel's website located at:  
Intel Corporation  
Telephone (in U.S.) 1-800-755-4444  
Telephone (Outside U.S.) 1-973-993-3030  
FAX 1-973-967-8780  
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Customer Support  
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