Intel 915GME User Manual
®
Mobile Intel 915GME Express  
Chipset  
Development Kit User’s Manual  
April 2007  
Order Number: 317230-001US  
®
Contents—Mobile Intel 915GME Express Chipset  
Contents  
1.0 About This Manual.....................................................................................................7  
1.1  
1.2  
1.3  
1.4  
Content Overview................................................................................................7  
Text Conventions ................................................................................................7  
Glossary of Terms and Acronyms...........................................................................9  
Support Options................................................................................................ 12  
1.4.1 Electronic Support Systems ..................................................................... 12  
1.4.2 Additional Technical Support.................................................................... 12  
Product Literature ............................................................................................. 12  
Related Documents ........................................................................................... 13  
1.5  
1.6  
2.0 Getting Started........................................................................................................ 14  
2.1  
Overview ......................................................................................................... 14  
2.1.1 Mobile Intel 915GME Express Chipset Features........................................ 14  
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2.2  
2.3  
Included Hardware and Documentation ................................................................ 16  
Software Key Features....................................................................................... 16  
2.3.1 AMI* BIOS ............................................................................................ 16  
Before You Begin............................................................................................... 17  
Setting Up the Evaluation Board.......................................................................... 18  
Configuring the BIOS......................................................................................... 19  
2.4  
2.5  
2.6  
3.0 Theory of Operation................................................................................................. 20  
3.1  
3.2  
3.3  
3.4  
Block Diagram .................................................................................................. 20  
Mechanical Form Factor...................................................................................... 21  
Thermal Management ........................................................................................ 22  
System Features and Operation .......................................................................... 22  
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3.4.1 Mobile Intel 915GME Express Chipset ..................................................... 22  
3.4.1.1 System Memory ....................................................................... 22  
3.4.1.2 DMI ........................................................................................ 23  
3.4.1.3 Advanced Graphics and Display Interface..................................... 23  
3.4.2 ICH6-M................................................................................................. 23  
3.4.2.1 PCI Express Slots...................................................................... 23  
3.4.2.2 PCI Slots ................................................................................. 23  
3.4.2.3 On-Board LAN .......................................................................... 24  
3.4.2.4 AC’97 and High Definition Audio.................................................. 24  
3.4.2.5 ATA / Storage .......................................................................... 24  
3.4.2.6 USB Connectors........................................................................ 24  
3.4.2.7 LPC Super I/O (SIO)/LPC Slot..................................................... 25  
3.4.2.8 Serial, IrDA.............................................................................. 25  
3.4.2.9 BIOS Firmware Hub (FWH)......................................................... 25  
3.4.2.10 System Management Controller (SMC)/Keyboard Controller............ 25  
3.4.2.11 Clocks..................................................................................... 25  
3.4.2.12 Real Time Clock........................................................................ 25  
3.4.2.13 Thermal Monitoring................................................................... 25  
3.4.3 System I/O and Connector Summary........................................................ 26  
3.4.3.1 PCI Express Support ................................................................. 27  
3.4.3.2 SATA Support........................................................................... 27  
3.4.3.3 IDE Support............................................................................. 27  
3.4.3.4 USB Ports ................................................................................ 27  
3.4.3.5 VGA Connector......................................................................... 27  
3.4.3.6 Keyboard/Mouse....................................................................... 28  
3.4.3.7 32 bit/33 MHz PCI Connectors .................................................... 28  
3.4.3.8 Ethernet 10/100 LAN Interface connector..................................... 28  
3.4.3.9 LVDS Flat Panel Display Interface................................................ 28  
3.4.4 Post Code Debugger ............................................................................... 28  
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Development Kit User’s Manual  
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Mobile Intel 915GME Express Chipset —Contents  
3.5  
3.6  
Clock Generation ...............................................................................................28  
Power Management States..................................................................................28  
3.6.1 Transition to S1 or S3 .............................................................................29  
3.6.2 Transition to S4......................................................................................29  
3.6.3 Transition to S5......................................................................................29  
3.6.4 Transition to Full-On ...............................................................................29  
Power Measurement Support...............................................................................30  
3.7  
4.0 Hardware Reference ................................................................................................34  
4.1  
4.2  
4.3  
4.4  
4.5  
4.6  
Primary Features ...............................................................................................34  
Back Panel Connectors .......................................................................................36  
Configuration Settings........................................................................................37  
Power On and Reset Buttons ...............................................................................40  
LEDs................................................................................................................41  
Other Headers...................................................................................................41  
4.6.1 H8 Programming Headers ........................................................................41  
4.6.2 Expansion Slots and Sockets ....................................................................42  
4.6.2.1 478 Pin Grid Array (Micro-FCPGA) Socket .....................................42  
4.6.2.2 PCI Express (x16) .....................................................................43  
4.6.2.3 ADD2 Slot ................................................................................45  
4.6.2.4 PCI Express (x1).......................................................................47  
4.6.2.5 IDE Connector ..........................................................................49  
4.6.2.6 SATA Pinout .............................................................................49  
4.6.2.7 Fan Connectors.........................................................................50  
A
Heat Sink Installation Instructions ..........................................................................51  
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Development Kit User’s Manual  
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April 2007  
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Contents—Mobile Intel 915GME Express Chipset  
Figures  
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1
2
3
4
5
6
7
8
Mobile Intel 915GME Express Chipset Block Diagram ................................................. 21  
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Mobile Intel 915GME Express Chipset Component Locations........................................ 34  
Back Panel Connector Locations ................................................................................. 36  
Configuration Jumper and Switch Locations ................................................................. 37  
Mobile Intel 915GME Express Chipset Power On and Reset Buttons.............................. 40  
Heat Sink and Back Plate .......................................................................................... 51  
Back Plate Pins ........................................................................................................ 52  
CPU Fan Header....................................................................................................... 53  
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Tables  
1
2
3
4
5
6
7
8
9
Acronyms ............................................................................................................... 11  
Intel Literature Centers............................................................................................. 12  
Related Documents .................................................................................................. 13  
System Clocks......................................................................................................... 28  
Mobile Intel 915GME Express Chipset Power Management States ................................ 29  
Mobile Intel 915GME Express Chipset Voltage Rails.................................................... 30  
Mobile Intel 915GME Express Chipset Component Location Legend .............................. 35  
Supported Configuration Jumper/Switch Settings ........................................................ 38  
Unsupported Jumper Default Position.......................................................................... 39  
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10 Mobile Intel 915GME Express Chipset LED Function Legend ........................................ 41  
11 H8 Programming Jumpers ......................................................................................... 42  
12 Expansion Slots and Sockets ..................................................................................... 42  
13 PCI Express (x16) Pinout (J6C1) ................................................................................ 43  
14 ADD2 Slot (J6C1)..................................................................................................... 45  
15 PCI Express (x1) Pinout (J7C2, J8C1 & J8D1)............................................................... 48  
16 IDE Connector (J7J2)................................................................................................ 49  
17 SATA Pinout (J7H1).................................................................................................. 49  
18 SATA Port 2 Power Connector Pinout (J6H3) ................................................................ 50  
19 SATA Port 0 Mobile Drive Connector Pinout (J8J3) ........................................................ 50  
20 Fan Connectors (J3F4 and J3B1) ................................................................................ 50  
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Mobile Intel 915GME Express Chipset  
April 2007  
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Development Kit User’s Manual  
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Mobile Intel 915GME Express Chipset —Contents  
Revision History  
Date  
April 2007  
Revision  
Description  
001  
Initial release of the document  
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Mobile Intel 915GME Express Chipset  
Development Kit User’s Manual  
6
April 2007  
Order Number: 317230-001US  
®
About This Manual—Mobile Intel 915GME Express Chipset  
1.0  
About This Manual  
®
This user’s manual describes the use of the Mobile Intel 915GME Express Chipset  
Development Kit. This manual has been written for OEMs, system evaluators, and  
embedded system developers. This document defines all jumpers, headers, LED  
functions, and their locations on the board, along with subsystem features and POST  
codes. This manual assumes basic familiarity in the fundamental concepts involved  
with installing and configuring hardware for a personal computer system.  
®
For the latest information about the Mobile Intel 915GME Express Chipset  
Development Kit reference platform, visit:  
http://developer.intel.com/design/intarch/devkits/index.htm  
For design documents related to this platform, such as schematics and bill of materials,  
please contact your Intel Representative.  
1.1  
Content Overview  
Chapter 1.0, “About This Manual” — This chapter contains a description of conventions  
used in this manual. The last few sections explain how to obtain literature and contact  
customer support.  
Chapter 2.0, “Getting Started”— Provides complete instructions on how to configure  
the evaluation board and processor assembly by setting jumpers, connecting  
peripherals, providing power, and configuring the BIOS.  
Chapter 3.0, “Theory of Operation” — This chapter provides information on the system  
design.  
Chapter 4.0, “Hardware Reference”— This chapter provides a description of jumper  
settings and functions, board debug capabilities, and pinout information for connectors.  
Appendix A, “Heat Sink Installation Instructions” gives detailed installation instructions  
®
for the Mobile Intel 915GME Express Chipset heat sink.  
1.2  
Text Conventions  
The following notations may be used throughout this manual.  
#
The pound symbol (#) appended to a signal name indicates that  
the signal is active low.  
Variables  
Instructions  
Variables are shown in italics. Variables must be replaced with  
correct values.  
Instruction mnemonics are shown in uppercase. When you are  
programming, instructions are not case-sensitive. You may use  
either uppercase or lowercase.  
Numbers  
Hexadecimal numbers are represented by a string of  
hexadecimal digits followed by the character H. A zero prefix is  
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Mobile Intel 915GME Express Chipset —About This Manual  
added to numbers that begin with A through F. (For example, FF  
is shown as 0FFH.) Decimal and binary numbers are  
represented by their customary notations. (That is, 255 is a  
decimal number and 1111 1111 is a binary number. In some  
cases, the letter B is added for clarity.)  
Units of Measure  
The following abbreviations are used to represent units of  
measure:  
A
amps, amperes  
GByte gigabytes  
KByte kilobytes  
Kohms kilo-ohms  
mA  
milliamps, milliamperes  
MByte megabytes  
MHz  
ms  
mW  
ns  
megahertz  
milliseconds  
milliwatts  
nanoseconds  
picofarads  
pF  
W
watts  
V
volts  
µA  
µF  
microamps, microamperes  
microfarads  
microseconds  
microwatts  
µs  
µW  
Signal Names  
Signal names are shown in uppercase. When several signals  
share a common name, an individual signal is represented by  
the signal name followed by a number, while the group is  
represented by the signal name followed by a variable (n). For  
example, the lower chip-select signals are named CS0#, CS1#,  
CS2#, and so on; they are collectively called CSn#. A pound  
symbol (#) appended to a signal name identifies an active-low  
signal. Port pins are represented by the port abbreviation, a  
period, and the pin number (e.g., P1.0).  
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About This Manual—Mobile Intel 915GME Express Chipset  
1.3  
Glossary of Terms and Acronyms  
This section defines conventions and terminology used throughout this document.  
ADD2  
ADD2 is an acronym for Advanced Digital Display, 2nd  
Generation. ADD2 video interfaces come in two configurations:  
Normal and Reversed. The normal is often referred to as ADD2  
or ADD2-N and the reversed is referred to as ADD2-R. The  
915GM platform can only support the ADD2-R video interface.  
Aggressor  
AGTL+  
A network that transmits a coupled signal to another network.  
The front-side bus uses a bus technology called AGTL+, or  
Assisted Gunning Transceiver Logic. AGTL+ buffers are open-  
drain, and require pull-up resistors to provide the high logic level  
and termination. AGTL+ output buffers differ from GTL+ buffers  
with the addition of an active pMOS pull-up transistor to assist  
the pull-up resistors during the first clock of a low-to-high  
voltage transition.  
Asynchronous GTL+ The processor does not utilize CMOS voltage levels on any  
signals that connect to the processor. As a result, legacy input  
signals such as A20M#, IGNNE#, INIT#, LINT0/INTR, LINT1/  
NMI, PWRGOOD, SMI#, SLP#, and STPCLK# utilize GTL+ input  
buffers. Legacy output signals (FERR# and IERR#) and non-  
AGTL+ signals (THERMTRIP# and PROCHOT#) also utilize GTL+  
output buffers. All of these signals follow the same DC  
requirements as AGTL+ signals, however the outputs are not  
actively driven high (during a logical 0 to 1 transition) by the  
processor (the major difference between GTL+ and AGTL+).  
These signals do not have setup or hold time specifications in  
relation to BCLK[1:0], and are therefore referred to as  
“Asynchronous GTL+ Signals”. However, all of the Asynchronous  
GTL+ signals are required to be asserted for at least two BCLKs  
in order for the processor to recognize them.  
Bus Agent  
Crosstalk  
A component or group of components that, when combined,  
represent a single load on the AGTL+ bus.  
The reception on a victim network of a signal imposed by  
aggressor network(s) through inductive and capacitive coupling  
between the networks.  
• Backward Crosstalk - Coupling that creates a signal in a  
victim network that travels in the opposite direction as the  
aggressor’s signal.  
• Forward Crosstalk - Coupling that creates a signal in a  
victim network that travels in the same direction as the  
aggressor’s signal.  
• Even Mode Crosstalk - Coupling from a signal or multiple  
aggressors when all the aggressors switch in the same  
direction that the victim is switching.  
• Odd Mode Crosstalk - Coupling from a signal or multiple  
aggressors when all the aggressors switch in the opposite  
direction that the victim is switching.  
Flight Time  
Flight time is a term in the timing equation that includes the  
signal propagation delay, any effects the system has on the TCO  
of the driver, plus any adjustments to the signal at the receiver  
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Mobile Intel 915GME Express Chipset —About This Manual  
needed to ensure the setup time of the receiver. More precisely,  
flight time is defined as:  
• The time difference between a signal at the input pin of a  
receiving agent crossing the switching voltage (adjusted to  
meet the receiver manufacturer’s conditions required for  
AC timing specifications; i.e., ringback, etc.) and the output  
pin of the driving agent crossing the switching voltage  
when the driver is driving a test load used to specify the  
driver’s AC timings.  
• Maximum and Minimum Flight Time - Flight time variations  
are caused by many different parameters. The more  
obvious causes include variation of the board dielectric  
constant, changes in load condition, crosstalk, power noise,  
variation in termination resistance, and differences in I/O  
buffer performance as a function of temperature, voltage,  
and manufacturing process. Some less obvious causes  
include effects of Simultaneous Switching Output (SSO)  
and packaging effects.  
• Maximum flight time is the largest acceptable flight time a  
network will experience under all conditions.  
• Minimum flight time is the smallest acceptable flight time a  
network will experience under all conditions.  
IrDA  
ISI  
IrDA is an acronym for Infrared Data Association, and this  
association has outlined a specification for serial communication  
between two devices via a bi-directional infrared data port. The  
915GM platform has such a port and it is located on the rear of  
the platform between the two USB connectors.  
Inter-symbol interference is the effect of a previous signal (or  
transition) on the interconnect delay. For example, when a  
signal is transmitted down a line and the reflections due to the  
transition have not completely dissipated, the following data  
transition launched onto the bus is affected. ISI is dependent  
upon frequency, time delay of the line, and the reflection  
coefficient at the driver and receiver. ISI may impact both timing  
and signal integrity.  
Network  
The network is the trace of a Printed Circuit Board (PCB) that  
completes an electrical connection between two or more  
components.  
Overshoot  
Pad  
The maximum voltage observed for a signal at the device pad,  
measured with respect to VCC.  
The electrical contact point of a semiconductor die to the  
package substrate. A pad is only observable in simulations.  
Pin  
The contact point of a component package to the traces on a  
substrate, such as the motherboard. Signal quality and timings  
may be measured at the pin.  
Power-Good  
Ringback  
“Power-Good,” “PWRGOOD,” or “CPUPWRGOOD” (an active high  
signal) indicates that all of the system power supplies and clocks  
are stable. PWRGOOD should go active a predetermined time  
after system voltages are stable and should go inactive as soon  
as any of these voltages fail their specifications.  
The voltage to which a signal changes after reaching its  
maximum absolute value. Ringback may be caused by  
reflections, driver oscillations, or other transmission line  
phenomena.  
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System Bus  
The System Bus is the microprocessor bus of the processor.  
Setup Window  
The time between the beginning of Setup to Clock (TSU_MIN)  
and the arrival of a valid clock edge. This window may be  
different for each type of bus agent in the system.  
SSO  
Simultaneous Switching Output (SSO) effects are differences in  
electrical timing parameters and degradation in signal quality  
caused by multiple signal outputs simultaneously switching  
voltage levels in the opposite direction from a single signal or in  
the same direction. These are called odd mode and even mode  
switching, respectively. This simultaneous switching of multiple  
outputs creates higher current swings that may cause additional  
propagation delay (“push-out”) or a decrease in propagation  
delay (“pull-in”). These SSO effects may impact the setup and/  
or hold times and are not always taken into account by  
simulations. System timing budgets should include margin for  
SSO effects.  
Stub  
The branch from the bus trunk terminating at the pad of an  
agent.  
Trunk  
The main connection, excluding interconnect branches, from  
one end agent pad to the other end agent pad.  
Undershoot  
The minimum voltage extending below VSS observed for a  
signal at the device pad.  
V
(CPU core)  
V
(CPU core) is the core power for the processor. The system  
CC  
CC  
bus is terminated to V (CPU core).  
CC  
Victim  
A network that receives a coupled crosstalk signal from another  
network is called the victim network.  
VRD 10.0  
The Voltage Regulator Module (a down on the board solution)  
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specification for the Intel Pentium 4 Processor with HT  
Technology processor. It is a DC-DC converter module that  
supplies the required voltage and current to a single processor.  
Table 1 defines the acronyms used throughout this document.  
Table 1.  
Acronyms (Sheet 1 of 2)  
Acronym  
Definition  
AC  
Audio Codec  
ASF  
AMC  
Anti-Etch  
CMC  
CNR  
EMI  
Alert Standard Format  
Audio/Modem Codec.  
Any plane-split, void or cutout in a VCC or GND plane is referred to as an anti-etch  
Common Mode Choke  
Communications and Networking Riser  
Electro Magnetic Interference  
Electrostatic Discharge  
ESD  
FS  
Full-speed. Refers to USB  
HS  
High-speed. Refers to USB  
ICH  
I/O Controller Hub  
LOM  
LPC  
LAN on Motherboard  
Low Pin Count  
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Mobile Intel 915GME Express Chipset —About This Manual  
Table 1.  
Acronyms (Sheet 2 of 2)  
Acronym  
Definition  
LS  
Low-speed. Refers to USB  
Modem Codec  
MC  
PCM  
PLC  
RTC  
SATA  
Pulse Code Modulation  
Platform LAN Connect  
Real Time Clock  
Serial ATA  
System Management Bus. A two-wire interface through which various system  
components may communicate.  
SMBus  
SPD  
STR  
TCO  
TDM  
TDR  
µBGA  
USB  
Serial Presence Detect  
Suspend To RAM  
Total Cost of Ownership  
Time Division Multiplexed  
Time Domain Reflectometry  
Micro Ball Grid Array  
Universal Serial Bus  
1.4  
Support Options  
1.4.1  
Electronic Support Systems  
Intel’s web site (http://www.intel.com/) provides up-to-date technical information and  
product support. This information is available 24 hours per day, 7 days per week,  
providing technical information whenever you need it.  
Product documentation is provided online in a variety of web-friendly formats at:  
http://appzone.intel.com/literature/index.asp  
1.4.2  
Additional Technical Support  
If you require additional technical support, please contact your Intel Representative or  
local distributor.  
1.5  
Product Literature  
You can order product literature from the following Intel literature centers:  
Table 2.  
Intel Literature Centers  
Location  
U.S. and Canada  
Telephone Number  
1-800-548-4725  
U.S. (from overseas)  
Europe (U.K.)  
Germany  
708-296-9333  
44(0)1793-431155  
44(0)1793-421333  
44(0)1793-421777  
81(0)120-47-88-32  
France  
Japan (fax only)  
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About This Manual—Mobile Intel 915GME Express Chipset  
1.6  
Related Documents  
Table 3 provides a summary of publicly available documents related to this  
development kit. As supplements to the documents listed below, technical white papers  
®
detailing specific features of the Mobile Intel 915GME Express Chipset can be found  
at:  
http://developer.intel.com/design/chipsets/915gme/index.htm  
For any additional documentation, please contact your Intel Representative.  
Table 3.  
Related Documents  
Order  
Document Title  
Number  
®
®
Intel Pentium M Processor on 90nm Process with 2 MByte L2 Cache Datasheet  
302189  
®
®
Intel Pentium M Processor on 90nm Process with 2 MByte L2 Cache Specification Update 302209  
®
®
Intel Pentium M Processor on 90 nm Process with 2 MByte L2 Cache for Embedded  
Applications Thermal Design Guide  
302231  
®
®
Intel Celeron M Processor on 90nm Process Datasheet  
303110  
300302  
®
®
Intel Celeron M Processors Specification Update  
®
®
®
®
Intel Pentium M Processor and Intel Celeron M Processor for Embedded Applications  
Thermal Design Guide  
273885  
301174  
®
®
®
®
Enhanced Intel SpeedStep Technology for the Intel Pentium M Processor  
®
Intel Architecture Software Developer’s Manual:  
®
•
•
IA-32 Intel Architecture Software Developer’s Manual Volume 1: Basic Architecture  
253665  
253666  
®
IA-32 Intel Architecture Software Developer’s Manual Volume 2A: Instruction Set  
Reference Manual A-M  
®
•
•
IA-32 Intel Architecture Software Developer’s Manual Volume 2B: Instruction Set  
253667  
253668  
Reference Manual N-Z  
®
IA-32 Intel Architecture Software Developer’s Manual Volume 3: System  
Programming Guide  
®
IA-32 Intel Architecture Optimization Reference Manual  
248966  
305264  
®
Mobile Intel 915PM/GM/GME/GMS and 910GML/GMLE Express Chipset Datasheet  
®
Intel 915GM/915GME Express Chipset GMCH Thermal Design Guide for Embedded  
305992  
Applications  
®
Intel I/O Controller Hub 6 (ICH6) Family Datasheet  
301473  
301474  
302362  
®
Intel I/O Controller Hub 6 (ICH6) Family Specification Update  
®
Intel I/O Controller Hub 6 (ICH6) Family Thermal Design Guide  
†
LPC Slot and Sideband Header Specification  
14159  
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Mobile Intel 915GME Express Chipset —Getting Started  
2.0  
Getting Started  
This chapter identifies the evaluation kit’s key components, features and specifications.  
It also details basic board setup and operation.  
2.1  
Overview  
®
The evaluation board consists of a baseboard populated with the Mobile Intel 915GME  
Express Chipset , other system board components, and peripheral connectors.  
Note:  
The evaluation board is shipped as an open system allowing for maximum flexibility in  
changing hardware configuration and peripherals. Since the board is not in a protective  
chassis, take extra precaution when handling and operating the system.  
2.1.1  
Mobile Intel® 915GME Express Chipset Features  
Features of the development kit board are summarized below:  
Processor  
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• Supports Intel Pentium M Processor with 2 MByte L2 Cache on 90 nm process in  
the 478 pin Flip Chip Pin Grid Array (Micro-FCPGA) package  
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— Supported processors are the Intel Pentium M 760 Processor and the Intel  
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Pentium M 738 Processor  
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• Supports Intel Celeron M Processor on 90 nm process in the 478 pin Flip Chip  
Pin Grid Array (Micro-FCPGA) package  
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— Supported processors are the Intel Celeron M 370 Processor and the Intel  
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Celeron M 373 Processor  
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Note:  
This reference platform does not support the Intel Pentium M 745 Processor.  
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Mobile Intel 915GME Express Graphics Memory Controller Hub (915GME  
Express GMCH)  
• 1257 pin Micro-FCBGA Package  
• Supports a 400/533 MHz front side bus  
• Dual-Channel DDR2 at 400/533 MHz  
• Two SODIMM slots (one per channel) support DDR2 SODIMMS (unbuffered, non-  
ECC) modules  
• Supports 128 MBytes to 2 GBytes using 256 Mbit, 512 Mbit, or 1 Gbit technology  
• x16 PCI Express Graphics or Serial Digital Video Out (SDVO) port  
• LVDS, VGA support  
I/O Controller Hub 6 (ICH6-M)  
• 609 pin plastic BGA package  
• DMI (x4) interface with GMCH  
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Getting Started—Mobile Intel 915GME Express Chipset  
• Two SATA and one IDE (40 pin) Hard Drive interface  
• Two PCI 2.3 compliant desktop slots  
• 82802AC8 Firmware Hub (FWH)  
• 82562EZ 10/100 Mbps Platform LAN Connect (PLC)  
• Two x1 PCI Express slots.  
Note:  
There are actually three x1 PCI Express slots but slot 2 was used for validation  
purposes. Only slots 0 and 1 are supported.  
Clocking  
• CK-410M and CK-SSCD  
• Battery-backed real time clock  
Connector Interface Summary  
• One x16 PCI Express Video Interface, doubles as an ADD2-R connector to provide  
access to dual SDVO ports if PCI Express is unused  
• Two SATA ports  
• One Ultra ATA (33/66/100/133) IDE connector supporting up to two IDE devices  
• Eight Universal Serial Bus (USB) 2.0 ports (Five ports provided on rear-panel, two  
provided via front-panel header (J6H2), and one at the PCI Express docking  
connector.)  
• Two PCI 2.3 compliant 33 MHz interface connectors  
• PS/2-style keyboard and PS/2 mouse (6-pin mini-DIN) connectors  
• Standard S-Video connector at back panel interface (not functional)  
• LVDS connector on top of circuit board near GMCH  
• One VGA connector provides access to integrated graphics  
• One LAN connector providing 10/100 connectivity from Intel 82562EZ 10/100 Mbit  
PLC  
• One 9-pin serial port connector.  
• One IrDA port  
• Two PCI Express slots (x1)  
• Two SODIMM connectors on rear side of circuit board  
Debug Features  
• Extended Debug Port (XDP) connector  
• On-board Port 80h display  
Miscellaneous Features  
• Configurable for ATX 1.1 Power Supply in desktop mode or AC Mobile Brick/Battery  
Pack for Mobile Mode  
• ATX Form Factor eight layer PCB  
• AMI* system BIOS  
• Built-in Wake On LAN (WOL) header  
• Three built-in fan power connectors: Rear Chassis Fan, CPU Fan, Front Chassis Fan  
• Power/Reset buttons  
• CMOS clear jumper  
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Mobile Intel 915GME Express Chipset —Getting Started  
• BIOS recovery jumper  
• Boot Block protection jumper  
• Support for Serial, IrDA, serial mouse, and keyboard  
2.2  
Included Hardware and Documentation  
The following hardware and documentation is included in the development kit:  
®
• One Mobile Intel 915GME Express Chipset board  
®
®
• One Intel Pentium M Processor with 2 MB L2 Cache on 90 nm process in the 478  
pin Flip-Chip Pin Grid Array (Micro-FCPGA) package (Installed)  
• One Firmware Hub (FWH) (Installed)  
• One MCH (915GME) heat sink (Installed)  
• One Type 2032, socketed 3 V lithium coin cell battery (Installed)  
• One DDR2 SODIMM (200 Pin)  
• One CPU thermal solution and CPU back plate (included in kit box – not populated  
on board)  
• One hard drive  
• One cable kit  
2.3  
Software Key Features  
The software in the kit was chosen to facilitate development of real-time applications  
based on the components used in the evaluation board. The driver CD included in the  
kit contains all of the software drivers necessary for basic system functionality under  
the following operating systems: Windows* 2000/XP/XP Embedded, and Linux*.  
Note:  
Note:  
While every care was taken to ensure the latest versions of drivers were provided on  
the enclosed CD at time of publication, newer revisions may be available. Updated  
drivers for Intel components can be found at: http://www.intel.com.  
For all third-party components, please contact the appropriate vendor for updated  
drivers.  
Software in the kit is provided free by the vendor and is only licensed for evaluation  
purposes. Refer to the documentation in your evaluation kit for further details on any  
terms and conditions that may be applicable to the granted licenses. Customers using  
the tools that work with Microsoft* products must license those products. Any targets  
created by those tools should also have appropriate licenses. Software included in the  
kit is subject to change.  
Refer to http://developer.intel.com/design/intarch/devkits for details on additional  
software from other third-party vendors.  
2.3.1  
AMI* BIOS  
This development kit ships pre-installed with AMI* BIOS pre-boot firmware from AMI*.  
AMI* BIOS provides an industry-standard BIOS platform to run most standard  
operating systems, including Windows* 2000/XP/XP Embedded, Linux*, and others.  
The AMI* BIOS Application Kit (available through AMI*) includes complete source code,  
a reference manual, and a Windows-based expert system, BIOStart*, to enable easy  
®
and rapid configuration of customized firmware for your Mobile Intel 915GME Express  
Chipset .  
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Getting Started—Mobile Intel 915GME Express Chipset  
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The following features of AMI* BIOS are enabled in the Mobile Intel 915GME Express  
Chipset :  
• DDR2 SDRAM detection, configuration, and initialization  
®
• Mobile Intel 915GME Express Chipset configuration  
• POST codes displayed to port 80h  
• PCI/PCI Express device enumeration and configuration  
• Integrated video configuration and initialization  
• Super I/O configuration  
• CPU microcode update  
2.4  
Before You Begin  
Additional hardware may be necessary to successfully set up and operate the  
evaluation board.  
VGA Monitor: Any standard VGA or multi-resolution monitor may be used. The setup  
instructions in this chapter assume the use of a standard VGA monitor, TV, or flat panel  
monitor.  
Keyboard: The evaluation board can support either a PS/2 or USB style keyboard.  
Mouse: The evaluation board can support either a PS/2 or USB style mouse.  
Hard Drives and Compact Disc Drives: Up to two SATA drives and two IDE devices  
(master and slave) may be connected to the evaluation board. A compact disc drive  
may be used to load the OS. All these storage devices maybe attached to the board  
simultaneously.  
Video Adapter: A standard PCI Express video adapter or an ADD2-R video adapter  
may be used for additional display flexibility. Please contact the respective vendors for  
drivers and necessary software for adapters not provided with this development kit.  
Check the BIOS for the proper video settings. See Section 2.6, “Configuring the BIOS”  
on page 19 for more information.  
Note:  
The enclosed driver CD includes drivers necessary for LAN, Integrated graphics, and  
system INF utilities.  
Network Adapter: A 10/100 Mbit network interface is provided on the evaluation  
board. The network interface will not be operational until after all the necessary drivers  
have been installed. A standard PCI/PCI Express adapter may be used in conjunction  
with, or in place of, the onboard network adapter. Please contact the respective vendors  
for drivers and necessary software for adapters not provided with this development kit.  
You must supply appropriate network cables to utilize the LAN connector or any other  
installed network cards.  
®
Power Supply: The Mobile Intel 915GME Express Chipset has the option to be  
powered from two different power sources: an ATX power supply, or ‘Mobile Brick’. The  
®
Mobile Intel 915GME Express Chipset contains all of the voltage regulators  
necessary to power the system.  
There are two main supported power supply configurations, Desktop and Mobile. The  
Desktop solution consists of only using the ATX power supply. The Mobile solution  
consists of only using the AC Brick.  
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Mobile Intel 915GME Express Chipset —Getting Started  
Note:  
Desktop peripherals, including add-in cards, will not work in mobile power mode. If  
desktop peripherals are used, the platform must be powered using desktop power  
mode. The AC Brick power supply configuration does not provide the 12 V supply  
required by most desktop peripherals.  
Note:  
Note:  
Select a power supply that complies with the "ATX12V" 1.1 specification. For more  
information, refer to http://www.formfactors.org.  
If the power button on the ATX power supply is used to shut down the system, wait at  
least five seconds before turning the system on again to avoid damaging the system.  
Other Devices and Adapters: The evaluation board functions much like a standard  
desktop computer motherboard. Most PC-compatible peripherals can be attached and  
configured to work with the evaluation board.  
2.5  
Setting Up the Evaluation Board  
Once the necessary hardware (described in Section 2.4) has been gathered, follow the  
®
steps below to set up the Mobile Intel 915GME Express Chipset evaluation board.  
Note:  
To locate items discussed in the procedure below, please refer to Section 4.0.  
1. Create a safe work environment.  
Ensure a static-free work environment before removing any components from their  
anti-static packaging. The evaluation board is susceptible to electrostatic discharge  
damage, and such damage may cause product failure or unpredictable operation. A  
flame retardant work surface must also be used.  
2. Inspect the contents of your kit.  
Check for damage that may have occurred during shipment. Contact your sales  
representative if any items are missing or damaged.  
Caution:  
Connecting the wrong cable or reversing the cable can damage the evaluation  
board may damage the device being connected. Since the board is not in a  
protective chassis, use caution when connecting cables to this product.  
Caution:  
Standby voltage is constantly applied to the board. Therefore, do not insert or  
remove any hardware unless the system is unplugged.  
Note:  
The evaluation board is a standard ATX form factor. An ATX chassis may be used if a  
protected environment is desired. If a chassis is not used, standoffs must be used to  
elevate the board off the working surface to protect the memory and to protect from  
any accidental contact to metal objects.  
3. Check the jumper default position setting. Refer to Figure 4 for jumper location.  
Jumper J6H1 is used to clear the CMOS memory. Make sure this jumper is set for  
normal operation.  
4. Be sure to populate the following hardware on your evaluation board:  
®
— One Pentium M 760 Processor  
— One processor thermal solution  
— One DDR2 SODIMM (200-pin)  
Note:  
For proper installation of the CPU thermal solution, please refer to Appendix A, “Heat  
Sink Installation Instructions”  
5. Install a SATA or IDE hard disk drive.  
6. Connect any additional storage devices to the evaluation board.  
7. Connect the keyboard and mouse.  
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Getting Started—Mobile Intel 915GME Express Chipset  
Connect a PS/2-style or USB mouse and keyboard (see Figure 3 on page 36 for  
connector locations).  
Note:  
J1A1 (on the baseboard) is a stacked PS/2 connector. The bottom connector is for the  
keyboard and the top is for the mouse.  
8. Connect an Ethernet cable (optional).  
9. Connect the monitor through the VGA connector.  
10.Connect the power supply.  
Connect an appropriate power supply to the evaluation board. Make sure the power  
supply is not plugged into an electrical outlet (turned off). After connecting the  
power supply board connectors, plug the power supply cord into an electrical  
outlet.  
11.Power up the board.  
Reset and Power are implemented on the evaluation board through buttons located  
on SW1C1and SW1C2, respectively. Refer to Figure 5 on page 40 for switch  
locations.  
Turn on the power to the monitor and evaluation board. Ensure that the fansink on  
the processor is operating.  
12.Install operating system and necessary drivers  
Depending on the operating system chosen, all necessary drivers for components  
included in this development kit can be found on the enclosed CD. Please see  
Section 2.3 for information on obtaining updated drivers.  
2.6  
Configuring the BIOS  
AMI* BIOS is pre-loaded on the evaluation board. The default BIOS settings may need  
to be modified to enable/disable various features of the evaluation board. The setup  
program can be used to modify BIOS settings and can be accessed during the Power On  
Self Test (POST). Setup options are configured through a menu-driven user interface.  
For AMI BIOS POST codes, visit:  
http://www.ami.com  
BIOS updates periodically may be posted to Intel’s Developers’ Web site at:  
http://developer.intel.com/design/intarch/devkits/  
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Mobile Intel 915GME Express Chipset —Theory of Operation  
3.0  
Theory of Operation  
3.1  
Block Diagram  
®
Figure 1 shows the Mobile Intel 915GME Express Chipset block diagram.  
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Theory of Operation—Mobile Intel 915GME Express Chipset  
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Figure 1.  
Mobile Intel 915GME Express Chipset Block Diagram  
CK-410M  
Clocking  
Intel® Pentium® M  
processor with 2MB  
L2 cache  
Thermal  
Sensor  
XDP  
CK-SSCD  
Clocking  
LVDS  
VGA  
IMVP IV  
VR  
LVDS/  
ALS/BLI  
FSB  
400/533 MHz  
DDR VR  
Mobile Intel®  
915GME Express  
Chipset  
CRT  
Dual Channel DDR2  
400/533 MHz  
(GMCH)  
PCI Express / SDVO  
PCIE GFX  
915GME  
VREG  
USB 2.0  
7 USB Conn  
PCI 2.3  
1 Docking Conn  
x4 DMI  
IDE  
40 Pin Conn  
SATA Port 2  
USB  
VGA  
LAN  
SATA Port 0  
PCIE  
Dock  
Intel® 82801FBM  
(ICH6M)  
Cable Connect  
Direct Connect  
PCIE Slot 0  
PCIE Slot 1  
Serial, IrDA/  
CIR  
LAN  
(82562EZ)  
10/100 LCI  
LPC  
SIO  
2 - PS/2  
Scan Matrix  
AON  
Port 80h  
Decoder  
LPC  
Slot  
SMC/KBC  
FWH  
3.2  
Mechanical Form Factor  
The evaluation board conforms to the ATX form factor. For extra protection in a  
development environment, you may want to install the evaluation board in an ATX  
chassis. Internal and rear panel system I/O connectors are described in Section 3.4.3.  
An overview of connector and slot locations is provided in Section 4.0.  
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Mobile Intel 915GME Express Chipset —Theory of Operation  
3.3  
Thermal Management  
The objective of thermal management is to ensure that the temperature of each  
component is maintained within specified functional limits. The functional temperature  
limit is the range within which the electrical circuits can be expected to meet their  
specified performance requirements.  
Operation outside the functional limit can degrade system performance and cause  
reliability problems.  
The development kit is shipped with a fansink thermal solution for installation on the  
processor. This thermal solution has been tested in an open-air environment at room  
temperature and is sufficient for evaluation purposes. The designer must ensure that  
adequate thermal management is provided for any customer-derived designs.  
3.4  
System Features and Operation  
The following sections provide a detailed view of system features and operation. Refer  
to Figure 2 and Table 7 for the location of the major components of the platform.  
3.4.1  
Mobile Intel® 915GME Express Chipset  
®
®
The Mobile Intel 915GME Express Chipset features the 915GMCH and the Intel I/O  
Controller Hub (ICH6-M) chipset.  
®
The Mobile Intel 915GME Express Chipset GMCH provides the processor interface  
®
®
optimized for Intel Pentium M Processors, system memory interface, DMI and  
internal graphics. It provides flexibility and scalability in graphics and memory  
subsystem performance. The following sections describe the reference board’s  
®
implementation of the Mobile Intel 915GME Express Chipset GMCH features.  
• 1257 Micro-FCBGA package  
• 400/533MHz Front Side Bus  
• 32-bit host bus addressing  
• System memory controller (DDR2 implemented)  
— Supports Dual Channel and Single Channel operation  
— Two 200-pin SODIMM slots  
— DDR2 400/533  
• Direct Media Interface (DMI)  
• Integrated graphics based on Intel’s Graphics Media Accelerator 900  
— Directly supports on-board VGA and LVDS interfaces.  
— Supports resolutions up to 2048 x 1536 @ 85 Hz.  
• SDVO interface via PCI Express x16 connector provides maximum display flexibility  
— Can drive up to two display outputs  
— Maximum single channel resolution of 2048 x 1536 @ 60 Hz  
3.4.1.1  
System Memory  
The evaluation board supports DDR2 400/533 main memory. Two 200-pin SODIMM  
connectors (one per channel) on the board support unbuffered, non-ECC, single and  
double-sided DDR2 400/533 MHz SODIMMs. These SODIMMs provide the ability to use  
up to 1 Gbit technology for a maximum of 2 GBytes system memory.  
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Theory of Operation—Mobile Intel 915GME Express Chipset  
Note:  
Memory that utilizes 128 MBit technology is not supported by the GMCH and is not  
®
supported on the Mobile Intel 915GME Express Chipset .  
Note:  
The SODIMM connectors are on the back side of the board.  
Caution:  
Standby voltage is applied to the SODIMM sockets when the system is in the S3 state.  
Therefore, do not insert or remove SODIMMs unless the system is unplugged.  
3.4.1.2  
3.4.1.3  
DMI  
®
The Mobile Intel 915GME Express Chipset GMCH’s Direct Media Interface (DMI)  
provides high-speed bi-directional chip-to-chip interconnect for communication with  
the ICH6-M.  
Advanced Graphics and Display Interface  
The reference board has five options for displaying video, VGA, LVDS, SDVO, or PCI  
Express Graphics. SDVO (ADD2-R) and PCI Express Graphics are multiplexed on the  
®
®
same pins within the Mobile Intel 915GME Express Chipset . The Mobile Intel  
915GME Express Chipset contains one SDVO/PCI Express Graphics Slot (J6C1) for a  
PCI Express compatible graphics card or an SDVO compatible graphics card, one LVDS  
connector (J5F1) and one 15-pin VGA connector (J2A1B).  
3.4.2  
ICH6-M  
The ICH6-M is a highly integrated multifunctional I/O controller hub that provides the  
interface to the system peripherals and integrates many of the functions needed in  
today’s PC platforms. The following sections describe the reference board  
implementation of the ICH6-M features, which are listed below:  
• Two PCI Express (x1) connectors  
• Two PCI connectors  
• LPC interface  
• Wake-On-LAN support  
• System management  
• ACPI* 2.0 compliant  
• Real Time Clock  
• 609 mBGA package  
• Two SATA drive connectors  
• One IDE connector  
• Eight Universal Serial Bus (USB) 2.0 ports (five ports provided on rear-panel, two  
provided via front-panel header (J6H2) and one at the PCI Express docking  
connector.)  
• Integrated 10/100 MAC  
3.4.2.1  
3.4.2.2  
PCI Express Slots  
The reference board has two PCI Express slots for add-in cards. The PCI Express  
interface is compliant to the PCI Express Rev. 01a Specification.  
PCI Slots  
The reference board has two x1 PCI slots for add-in cards. The PCI bus is compliant to  
the PCI Rev. 2.3 Specification at 33 MHz.  
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Mobile Intel 915GME Express Chipset —Theory of Operation  
3.4.2.3  
On-Board LAN  
The 82562EZ provides the PHY for the Intel ICH6-M’s integrated LAN connect interface.  
This provides a low cost, reduced footprint solution for 10/100 Mbit LAN connectivity.  
The 82562EZ component is connected to the ICH6-M chipset through the LAN Connect  
Interface (LCI) and to an RJ45 connector at J5A1A with built in magnetic decoupling.  
Access to this interface is provided on the rear I/O panel (See Figure 3 on page 36).  
Features of the 82562EZ are as follows:  
• IEEE* 802.3 10BASE-T/100BASE-TX compliant physical layer interface  
• IEEE 802.3u Auto-Negotiation support  
• Digital Adaptive Equalization control  
• Link status interrupt capability  
• XOR Tree mode support for board testing  
• Three-port LED support (speed, link, and activity)  
• 10BASE-T auto-polarity correction  
• Platform LAN connect interface support  
• 82540EM layout compatible  
• Diagnostic loopback mode  
• 1:1 transmit transformer ratio support  
• Low power (less than 300 mW in active transmit mode)  
• Reduced power in “unplugged mode” (less than 50 mW)  
• Automatic detection of “unplugged mode”  
3.4.2.4  
3.4.2.5  
AC’97 and High Definition Audio  
AC’97 and High Definition Audio are not supported on the board.  
ATA / Storage  
®
The Mobile Intel 915GME Express Chipset provides one parallel ATA IDE connector  
and two serial ATA connectors. The parallel ATA IDE Connector is a standard 40-pin  
0.1” center header at J7J2 for a desktop IDE drive. A power connector is supplied on  
®
the Mobile Intel 915GME Express Chipset to power a parallel ATA hard disk drive at  
®
J4J2. One of the two serial ATA connectors on the Mobile Intel 915GME Express  
Chipset is a direct connect connector; located at J8J3. The other serial ATA connector  
is broken up into two connectors. One connector is for the serial data signals, and the  
other is for to power the serial ATA hard disk drive. These connectors are located at  
J7H1 and J6H3. A green LED at CR7J1 indicates activity on ATA channel.  
®
The Mobile Intel 915GME Express Chipset also supports ‘ATA swap’ capability for both  
the parallel IDE channel and the serial ATA channels. The parallel IDE device should be  
®
powered from the power connector, J4J2, on the Mobile Intel 915GME Express Chipset  
to utilize the hot swap feature. This feature requires customer-developed software  
support.  
3.4.2.6  
USB Connectors  
The ICH6-M provides a total of eight USB 2.0 ports. Three ports are routed to a triple-  
stack USB connector at J3A1. Two ports are routed to a combination RJ-45/dual USB  
connector at J5A1B. Two ports are routed to a USB front panel header at J6H2. The  
final USB port is routed to the PCI Express Docking Connector at J9J4.  
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Theory of Operation—Mobile Intel 915GME Express Chipset  
3.4.2.7  
LPC Super I/O (SIO)/LPC Slot  
®
An SMSC LPC47N207 serves as the SIO on the Mobile Intel 915GME Express Chipset  
platform. Shunting the jumper at J7E4 to the 2-3 positions can disable the SIO by  
holding it in reset. This allows other SIO solutions to be tested in the LPC slot at J8F2.  
A sideband header is provided at J9G2 for this purpose. This sideband header also has  
signals for LPC power management. Information on this header is on sheet 29 of the  
®
Mobile Intel 915GME Express Chipset schematics and is detailed in the “LPC Slot and  
Sideband Header Specification” (see Table 3, “Related Documents” on page 13).  
3.4.2.8  
3.4.2.9  
3.4.2.10  
Serial, IrDA  
The SMSC SIO incorporates a serial port, and IrDA (Infrared), as well as general  
purpose IOs (GPIO). The serial port connector is provided at J2A1A, and the IrDA  
transceiver is located at U4A2. The IrDA transceiver on Mobile Intel 915GME Express  
Chipset supports both SIR (slow IR) and CIR (Consumer IR). The option to select  
between the two is supported through software and GPIO pin on the SIO.  
®
BIOS Firmware Hub (FWH)  
®
The 8 Mbit Flash device used on the Mobile Intel 915GME Express Chipset to store  
system and video BIOS as well as an Intel Random Number Generator (RNG) is a  
socketed E82802AC8 a 32-pin PLCC package. The reference designator location of the  
FWH device is U8G1. The BIOS can be upgraded using an MS-DOS* based utility and is  
addressable on the LPC bus off of the ICH6-M.  
System Management Controller (SMC)/Keyboard Controller  
The Hitachi* H8S/HD64F2 serves as both SMC and KBC for the platform. The SMC/KBC  
controller supports two PS/2 ports, battery monitoring and charging, EMA support,  
wake/runtime SCI events, and power sequencing control. The two PS/2 ports on the  
®
Mobile Intel 915GME Express Chipset are for legacy keyboard and mouse. The  
keyboard plugs into the bottom jack and the mouse plugs into the top jack at J1A2.  
Scan matrix keyboards can be supported via an optional connector at J9E2.  
3.4.2.11  
Clocks  
®
The Mobile Intel 915GME Express Chipset board uses a CK-410M and CK-SSCD  
compatible solution. The CK-SSCD solution offers improved EMI performance by  
spreading the radiated clock emissions over a wider spectrum than a single frequency.  
This is accomplished while controlling the clock frequency deviation such that system  
performance is not compromised. The FSB frequency is determined from decoding the  
processor BSEL settings.  
3.4.2.12  
3.4.2.13  
Real Time Clock  
An on-board battery at BT5H1 maintains power to the real time clock (RTC) when in a  
®
mechanical off state. A CR2032 battery is installed on the Mobile Intel 915GME  
Express Chipset development kit.  
Thermal Monitoring  
The processor has a thermal diode for temperature monitoring. The SMC thermal  
monitoring device will throttle the processor if it becomes hot. If the temperature of the  
processor rises too high, the SMC will alternately blink the CAPS lock and NUM lock  
LEDs on the board, and the board will shut down.  
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Mobile Intel 915GME Express Chipset —Theory of Operation  
3.4.3  
System I/O and Connector Summary  
The evaluation board provides extensive I/O capability in the form of internal  
connectors and headers as detailed by the following list. For detailed information on  
these connectors and headers, please refer to “Hardware Reference” on page 34.  
• One (x16) PCI Express connector  
• Two (x1) PCI Express connectors  
• Two PCI connectors  
• One IDE interface (supports two drives)  
• Two SATA connectors  
• Two USB ports via front panel header (J8G1)  
• One LVDS video connector  
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Theory of Operation—Mobile Intel 915GME Express Chipset  
In addition to the internal I/O connections listed above, the evaluation board also  
contains the following I/O on the rear panel (as illustrated in Figure 3 on page 36).  
• Five USB ports on back panel.  
• VGA connector  
• PS/2-style keyboard and mouse ports  
• LAN connector  
• One 9-pin serial connector  
• One IrDA port  
• One SVideo connector (not functional)  
3.4.3.1  
PCI Express Support  
The evaluation board provides access to one x16 PCI Express connector. Any industry  
standard x16 PCI Express video adapter may be used with this interface. The  
evaluation board also provides access to two x1 PCI Express connectors. Any industry  
standard x1 PCI Express adapter may be used with these interfaces.  
3.4.3.2  
3.4.3.3  
3.4.3.4  
SATA Support  
The evaluation board provides support for up to two SATA disk drives. The SATA  
controllers are software compatible with IDE interfaces, while providing lower pin  
counts and higher performance.  
IDE Support  
The evaluation board has a 40-pin connector for the ICH6-M’s integrated IDE controller.  
This connector supports up to two Ultra ATA/100 hard drives; one master and one  
slave.  
USB Ports  
The evaluation board provides eight USB (2.0) ports on the rear panel and two  
additional ports through the front panel header. (J8G1).  
There are four UHCI Host Controllers and two EHCI Host Controllers. Each UHCI Host  
Controller includes a root hub with two separate USB ports each, for a total of eight  
legacy USB ports.  
Each EHCI Host Controllers includes a root hub that supports up to four USB 2.0 ports.  
The connection to either the UHCI or EHCI controllers is dynamic and dependant on the  
particular USB device. As such, all ports support High Speed, Full Speed, and Low  
Speed (HS/FS/LS).  
3.4.3.5  
VGA Connector  
A standard 15 pin D-Sub connector on the rear panel provides access to the analog  
output of the Intel GMA 900. The integrated graphics supports a maximum resolution  
of 2048 x 1536 @ 85Hz. This can be connected to any capable analog CRT or flat panel  
display with analog input.  
When used in conjunction with any of the other display options, the displays can  
operate Dual Independent mode. This allows the unique content to appear on each  
display at unique refresh rates and timings.  
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Mobile Intel 915GME Express Chipset —Theory of Operation  
3.4.3.6  
Keyboard/Mouse  
The keyboard and mouse connectors are PS/2 style, six-pin stacked miniature DSUB  
connectors. The top connector is for the mouse and the bottom connector is for the  
keyboard.  
3.4.3.7  
3.4.3.8  
3.4.3.9  
32 bit/33 MHz PCI Connectors  
Two industry standard 32 bit/33 MHz PCI connectors are provided on the evaluation  
board. These slots support 3.3 V and 5 V devices.  
Ethernet 10/100 LAN Interface connector  
The evaluation board provides support for one Industry standard 10/100 RJ45 LAN  
Interface Connector (Integrated with the dual USB connector).  
LVDS Flat Panel Display Interface  
The evaluation board provides support for one forty-four pin LVDS video interface  
connector. The provided LVDS connects to most flat panel display assemblies.  
3.4.4  
3.5  
Post Code Debugger  
A port 80-83 display at CR6A1, CR6A2, CR6A3, and CR6A4 show cycles and can be  
used for debug information during POST. The evaluation board uses an AMI* BIOS.  
For AMI* BIOS POST codes, please visit: http://www.ami.com  
Clock Generation  
®
The Mobile Intel 915GME Express Chipset board uses a CK-410M and CK-SSCD  
compatible solution. The FSB frequency is determined from decoding the processor  
BSEL settings.  
The clock generator provides Processor, GMCH, ICH6-M, PCI, PCI Express, SATA, and  
USB reference clocks. Clocking for DDR2 is provided by the GMCH.  
Table 4.  
System Clocks  
Clock Name  
Speed  
133 MHz @ 533  
100 MHz @ 400  
CPU  
100 MHz @ 400  
133 MHz @ 533  
DDR2  
PCI Express and DMI  
100 MHz  
100 MHz  
33 MHz  
14 MHz  
48 MHz  
SATA  
PCI  
Audio  
USB  
3.6  
Power Management States  
The evaluation board supports S1 (Stop Grant), S3 (Suspend to RAM), S4 (Suspend to  
disk), and S5 (Soft-off) states. Transition requirements are detailed below.  
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Theory of Operation—Mobile Intel 915GME Express Chipset  
Table 5 lists the power management states that have been identified for the Mobile  
®
Intel 915GME Express Chipset Platform.  
®
Table 5.  
Mobile Intel 915GME Express Chipset Power Management States  
State  
G0/S0/C0  
Description  
Full On  
G0/S0/C2  
G0/S0/C3  
G0/S0/C4  
G1/S3_HOT  
G1/S3_COLD  
G1/S4  
STPCLK# signal active  
Deep Sleep: DPSLP# signal active  
Deeper Sleep: DPRSLP# signal active  
Suspend to RAM (all S3 rails are turned on except processor power rails)  
Suspend to RAM (all S3 rails are turned off)  
Suspend to Disk  
Soft Off  
G2/S5  
G3  
Mechanical Off  
3.6.1  
Transition to S1 or S3  
If enabled, the transition to S1 or S3 from the full-on state can be accomplished in the  
following ways:  
• The OS performs the transition through software.  
• Press the front panel power button for less than four seconds (assuming the OS  
power management support has been enabled).  
3.6.2  
3.6.3  
Transition to S4  
“Wake on S4” (Suspend to disk) is controlled by the operating system.  
Transition to S5  
The transition to S5 is accomplished by the following means:  
• Press the front panel power button for less than four seconds (if enabled through  
the OS).  
• Press the front panel power button for more than four seconds to activate power  
button override.  
3.6.4  
Transition to Full-On  
The transition to the Full-On state can be from S1, S3, or S5. The transition from S1 or  
S3 is a low latency transition that is triggered by one of the following wake events:  
• Power management timer expiration  
• Real Time Clock (RTC) triggered alarm  
• Power button activation  
• USB device interrupt  
• PME# assertion  
• Mouse/Keyboard movement (Applies only to S1 Transition)  
• AC power loss  
®
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®
Mobile Intel 915GME Express Chipset —Theory of Operation  
For AC power loss, the system operation is defined by register settings in the Intel  
ICH6-M. Upon the return of power, a BIOS option, set prior to the power loss, allows  
the system to either go immediately to the S5 state, or reboot to the Full-On state, no  
matter what the state was before the power loss. External logic for this functionality is  
not necessary. If the BIOS remains in the S5 state after AC power loss, only the power  
button or the RTC alarm can bring the system out of the S5 state. The status of enabled  
wake events will be lost.  
3.7  
Power Measurement Support  
Power measurement resistors are provided on the platform to measure the power of  
most subsystems. All power measurement resistors have a tolerance of 1%. The value  
of these power measurement resistors are 2 mΩ by default. Power on a particular  
subsystem is calculated using the following formula:  
V2  
P =  
R
R is the value of the sense resistor (typically 0.002 Ω)  
V is the voltage measured across the sense resistor.  
It is recommended that the user use a high precision digital multi-meter tool such as  
the Agilent* 34401A digital multi-meter. Such a meter has 6½ digits of accuracy and  
can provide a much greater accuracy in power measurement that a common 3½ digit  
multimeter.  
Table 6 summarizes all the power measurement sense resistors located on the Mobile  
®
Intel 915GME Express Chipset platform. All sense resistors are 0.002 Ω unless  
otherwise noted.  
®
Table 6.  
Mobile Intel 915GME Express Chipset Voltage Rails (Sheet 1 of 4)  
Reference  
Designator  
Voltage Groups  
Voltage Rail  
1.0  
1.5  
+V1  
U8A2.6  
NC1-6_R  
R8A3.2  
Q3J2.1-3  
R7V1.1  
R3J12.2  
R7V2.1  
Q3Y1.1-3  
R5U15.1  
C5R3.1  
C5T7.2  
R6R1.1  
C4T1.1  
C4R7.1  
C5T12.1  
C5T9.1  
R4D1.2  
+V1.5  
+V1.5_VCCAUX  
+V1.5A  
1.5 Always  
+V1.5A_ICH  
+V1.5S  
1.5 Switched  
+V1.5S_DLVDS  
+V1.5S_DDRDLL  
+V1.5S_S_PCIE  
+V1.5S_3GPLL (0.5Ω)  
+V1.5S_MPLL  
+V1.5S_HPLL  
+V1.5S_DPLLA  
+V1.5S_DPLLB  
+V1.5S_HMPLL  
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®
Theory of Operation—Mobile Intel 915GME Express Chipset  
®
Table 6.  
Mobile Intel 915GME Express Chipset Voltage Rails (Sheet 2 of 4)  
Reference  
Designator  
Voltage Groups  
Voltage Rail  
+V1.5S_ICH_EV  
R6G10.1  
+V1.5S_PCIE_L  
+V1.5S_PCIE_ICH  
+V1.5S_ICH  
R6G7.2  
FB6G1.1  
R7H13.2  
R6V13.2  
R7H8.2  
R3C4.2  
R5B11.2  
R5B12.2  
R5B1.2  
R4N6.2  
R5B2.2  
Q5H2.5-8  
R9B2.2  
R8B11.2  
Q2J3.1-3  
R5U1.1  
R5F6.1  
+V1.5S_GPLL_ICH  
+V1.5S_APLL_ICH  
+VCCA_PROC  
+V1.8_DDR  
1.8  
+V1.8_DIMM  
+V1.8_LAN  
+VDDQ_VTTVR  
DDR_6225_VOUT1 (0.005Ω)  
+12S  
12.0 Switched  
2.5 Switched  
+12S_PCI  
+V12S_PCIESLOT0  
V2.5S  
V2.5_ALVDS  
V2.5_TXLVDS  
V2.5_HV  
R5U17.2  
R6E2.2  
C5U2.3  
R5F7.2  
V2.5_3GBG  
V2.5_CRTDAC  
V2.5_SYNC  
V2.5_PCI_IDE  
+V3.3  
R7W9.1  
Q4G2.1-3  
R7U2.2  
R8F8.2  
3.3  
+V3.3_VCCPAUX  
+V3.3_LPCSLOT  
+V3.3_LAN  
R9A1.2  
R7A1.1  
R8B12.1  
R8N1.1  
R9B3.2  
R8E1.1  
R2H4.2  
R7F5.1  
+VLAN_18-33  
+VLAN_33-33  
+VLAN_10-33  
+V3.3_PCISLT3  
+V3.3_ACZ (0Ω)  
+V3.3A (0.05Ω)  
+V3.3A_ICH  
3.3 Always  
+V3.3A_VCCPAUX  
+V3.3A_R1_TPM  
+V3.3A_VCCPSUS  
+V3.3A_KBC  
+V3.3S  
R7U2.2  
R9A4.1  
R8F10.2  
R8H6.2  
Q4G1.1-3  
C5T14.1  
3.3 Switched  
+V3.3S_AVTBG  
®
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®
Mobile Intel 915GME Express Chipset —Theory of Operation  
®
Table 6.  
Mobile Intel 915GME Express Chipset Voltage Rails (Sheet 3 of 4)  
Reference  
Designator  
Voltage Groups  
Voltage Rail  
+V3.3S_PEG  
R6C1.2  
+V3.3S_ICH  
R8U3.2  
R6V3.1  
R6E1.2  
R9A6.1  
R7C5.2  
R7B20.2  
R8D1.2  
R5G7.1  
R5W1.1  
R6D1.2  
R7C6.2  
R7C7.2  
R8W4.2  
R7E7.2  
R4A3.2  
R9M2.2  
R6H4.2  
R6V5.2  
R7C16.2  
R5W1.2  
R6W10.1  
R6W10.2  
R5W4.1  
Q4V4.1-3  
R8F9.2  
+V3.3S_LVDSBKLT  
+V3.3S_L  
+V3.3S_PCI  
+V3.3S_PCISLOT0  
+V3.3S_PCISLOT1  
+V3.3S_PCISLOT2  
+V3.3S_CLKRC  
+V3.3S_CLKVDD (2.2Ω)  
+V3.3S_SSCD  
+V3.3S_BUFFER  
+V3.3S_DB400  
+V3.3S_FWH  
+V3.3S_SIO  
+V3.3S_IR  
+V3.3S_R1_TPM  
+V3.3S_SATA_P2  
+V3.3S_LVDSDDC  
+V3.3S_DB400_VDDA  
VDD_A_CR (2.2Ω)  
+V3.3S_CLKVDD1 (2.2Ω)  
VDD_48_CR  
VDD_REF_CR (1Ω)  
+5V  
5.0  
+5V_LPCSLOT  
+5V_R1_TPM  
+5V_VTTVR  
R9M1.2  
R4N1.2  
R1B1.1  
Q4G4.5-8  
R5J4.2  
+5V_PS2  
5.0 Always  
+V5A  
+V5SB_ATXA  
USBPWR  
R3B1.1  
R6J1.1  
IN_D_R  
5.0 Switched  
+5VS  
Q4G4.1-3  
FB2A2.2  
R8B10.2  
R5J3.2  
+5VS_F_DAC  
+5V_PCISLT3  
+5VS_PATA  
+5VS_SATA_P2  
+5VS_PCI  
R7H14.2  
R9B5.1  
R1B7.2  
+5VS_PHASE1 (CPU Core)  
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®
Theory of Operation—Mobile Intel 915GME Express Chipset  
®
Table 6.  
Mobile Intel 915GME Express Chipset Voltage Rails (Sheet 4 of 4)  
Reference  
Designator  
Voltage Groups  
Voltage Rail  
+5VS_PHASE2 (CPU Core)  
+5VS_VTTMCH  
+VBAT  
R3B3.2  
R4V1.2  
U4F2.14  
R6F9.1  
R4G2.2  
R5B5.1  
R4G1.2  
R5J1.2  
Battery Voltage  
+VCC_LVDSBKLT  
VBAT_VTTVR  
VDC_VDDQVR  
+VBAT_MCHVR  
+VBATA  
Batter Voltage Always  
+V12_ATX  
R5J1.1  
Battery Voltage Switched +VBATS  
+V12S_PEG  
Q6B2.5-8  
R6B5.1  
R5G1.2  
R8B11.2  
R7B19.2  
R8C6.2  
R7H12.2  
R4X4.2  
R4T2.2  
R4T2.1  
R3T1.2  
R4T1.1  
R6W7.1  
R4Y2.2  
R4Y2.1  
R1H6.2  
VBATS_L  
+V12S_PCISLOT0  
+V12S_PCISLOT1  
+V12S_PCISLOT2  
+V12S_SATA_P2  
+12VS_PATA  
+VCC_GMCH_CORE  
+VCC_GMCH  
+VCCP  
+VCCP_GMCH  
+VCCP_VCCPCPU  
-V12a  
-12  
-V12A_ATX  
Battery Charger  
+VCHRGR (0.025Ω)  
®
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®
Mobile Intel 915GME Express Chipset —Hardware Reference  
4.0  
Hardware Reference  
This section provides reference information on the hardware, including locations of  
evaluation board components, connector pinout information and jumper settings.  
Figure 2 provides an overview of basic board layout.  
4.1  
Primary Features  
®
Figure 2 shows the major components of the Mobile Intel 915GME Express Chipset  
board and Table 7 gives a brief description of each component.  
®
Figure 2.  
Mobile Intel 915GME Express Chipset Component Locations  
®
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Hardware Reference—Mobile Intel 915GME Express Chipset  
1
®
Table 7.  
Mobile Intel 915GME Express Chipset Component Location Legend  
1
2
3
4
5
6
7
8
9
Reserved  
18  
19  
20  
21  
22  
23  
24  
25  
26  
Intel ICH6-M  
FWH  
35  
36  
37  
38  
39  
40  
41  
42  
43  
Parallel ATA Power  
4-in-1 VREG Controller  
Reserved  
Reserved  
PCI Express Slot 0  
PCI Express Slot 1  
Reserved  
SMC/KBC  
Reserved  
Reserved  
Reserved  
AC Brick Connector  
Intel Processor  
XDP Connector  
VID LEDS  
DB400 Clock Buffer  
PCI Express Slot 2  
PCI Slot 4  
Reserved  
SATA Direct Connect  
Front Panel Header  
SATA Cable Connect  
Port 80  
Reserved  
®
Mobile Intel 915GME Express  
10 PCI Slot 3  
27  
Parallel ATA Connector  
44  
Chipset (GMCH)  
11 Reserved  
28  
29  
30  
31  
32  
SATA Power Connector  
Reserved  
45  
46  
47  
48  
49  
Port 82-83 Display  
12 SMSC SIO  
PCI Express Graphics Slot  
Port 80-81 Display  
CK-SSCD  
13 Reserved  
Front Panel USB  
LVDS Connector  
CK_410M  
14 Keyboard Scan Matrix  
15 LPC Sideband Header  
LAN Component  
ATX Power Supply  
Connector  
16 LPC Slot  
33  
34  
50  
Reserved  
17 Reserved  
RTC Battery  
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®
Mobile Intel 915GME Express Chipset —Hardware Reference  
4.2  
Back Panel Connectors  
®
This section describes the Mobile Intel 915GME Express Chipset panel connectors on  
®
the Mobile Intel 915GME Express Chipset platform.  
Note:  
Many of the connectors provide operating voltage (for example, +5 V DC and +12 V  
DC) to devices inside the computer chassis, such as fans and internal peripherals. Most  
of these connectors are not over-current protected. Do not use these connectors for  
powering devices external to the computer chassis. A fault in the load presented by the  
external devices could cause damage to the computer, the interconnecting cable, and  
the external devices themselves.  
®
Figure 3 shows the back panel connectors to the Mobile Intel 915GME Express Chipset  
platform.  
Figure 3.  
Back Panel Connector Locations  
®
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Hardware Reference—Mobile Intel 915GME Express Chipset  
4.3  
Configuration Settings  
Note:  
Do not move jumpers with the power on. Always turn off the power and unplug the  
power cord from the computer before changing jumper settings. Failure to do so may  
cause damage to the board.  
Figure 4 shows the location of the configuration jumpers and switches.  
Table 8 summarizes the supported jumpers and switches and gives their default and  
optional settings.  
Table 9 summarizes the unsupported jumpers and switches and gives their default  
position. The unsupported jumpers must remain in their default position or the  
®
operation of the platform is unpredictable. The Mobile Intel 915GME Express Chipset  
board is shipped with the jumpers and switches shunted in the default locations.  
Figure 4.  
Configuration Jumper and Switch Locations  
®
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®
Mobile Intel 915GME Express Chipset —Hardware Reference  
Table 8.  
Supported Configuration Jumper/Switch Settings  
Ref.  
Desig.  
No.  
Default Setting  
Optional Setting  
Option Setting  
1
SIO Reset  
1-2 Normal Operation  
1-2 Normal Operation  
2-3 to hold the SIO in Reset  
2-3 to hold the H8 in Reset  
J7E4  
J8G1  
2
3
H8 Reset  
IN - Clock disabled- enable H8  
Programming  
1 Hz Clock  
Out - Normal Operation  
OUT - Normal Operation  
J9G1  
J9J3  
In - Enable external H8  
Programming.  
4
H8 Programming  
5
6
7
8
9
LID Switch  
1-2 Normal Operation  
OUT - Normal Operation  
OUT - Normal Operation  
2-3 LID Switch Closed  
1-2 disable the H8  
IN - Recover BIOS  
2-3 to program the H8  
In to clear  
SW9J2  
J9J1  
H8 Disable  
BIOS Recovery  
J8H2  
J7J1  
In-Circuit H8 Programming 1-2 Normal Operation  
Clear CMOS  
OUT - Normal operation  
OUT - Normal operation  
J6H1  
IN to force the board to  
shutdown.  
10  
Force Shutdown  
J2H1  
Empty - Disable the processor  
thermal diode from ADM1023  
13  
14  
15  
Thermal Diode Connection  
Sleep S3 Hot/Cold Switch  
Tx Select  
1-2 Normal Operation  
1-2 S3_HOT  
J3B3  
2-3 S3_COLD  
SW4A1  
J7A3  
2-3 connect TxD to H8 for  
programming  
1-2 Normal Operation  
2-3 connect RxD to H8 for  
programming  
16  
Rx Select  
1-2 Normal Operation  
J7A2  
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Table 9.  
Unsupported Jumper Default Position  
Jumper  
J1E2  
Pins  
Jumper  
J7C3  
Pins  
2-3  
2-3  
1-X  
1-2  
3-4  
1-2  
1-X  
1-2  
1-X  
1-X  
2-3  
5-6  
1-X  
2-3  
1-2  
1-2  
1-X  
1-X  
2-3  
2-3  
1-X  
2-3  
1-2  
1-2  
1-X  
1-X  
1-2  
1-2  
J1E3  
J1F2  
J2J2  
J3B3  
J3C1  
J3F1  
J3F3  
J5G1  
J5G2  
J6E1  
J6E1  
J6G2  
J7B1  
J7E1  
J7E3  
J7J3  
J8E1  
J8E2  
J8F1  
J8H1  
J9J2  
J9J5  
J9J6  
J9J7  
J9J8  
SW4A1  
1
1
1
1
1
1
1
1
1
1
Note:  
1.  
X indicates that the jumper is installed with one contact  
affixed to pin one and the other contact disconnected.  
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Mobile Intel 915GME Express Chipset —Hardware Reference  
4.4  
Power On and Reset Buttons  
®
The Mobile Intel 915GME Express Chipset board has two push buttons, POWER and  
RESET. The POWER button releases power to the entire board, causing the board to  
boot. The RESET button will force all systems to warm reset. The two buttons are  
located near the CPU close to the edge of the board. The POWER button is located at  
SW1C2 and the RESET button is located at SW1C1.  
®
Figure 5.  
Mobile Intel 915GME Express Chipset Power On and Reset Buttons  
®
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Hardware Reference—Mobile Intel 915GME Express Chipset  
4.5  
LEDs  
®
The following LEDs provide status for various functions on the Mobile Intel 915GME  
Express Chipset board.  
®
Table 10.  
Mobile Intel 915GME Express Chipset LED Function Legend  
Function  
LED  
CR9G1  
Keyboard Number Lock  
Keyboard Scroll Lock  
Keyboard Caps Lock  
System State S0  
System State S3_COLD  
System State S3_HOT  
System State S4  
System State S5  
ATA Activity  
CR9G2  
CR9G3  
CR3G4  
CR3G1  
CR3G2  
CR3G3  
CR2G1  
CR7J1  
CR1B1  
CR1B2  
CR1B3  
CR1B4  
CR1B5  
CR1B6  
VID 0  
VID 1  
VID 2  
VID 3  
VID 4  
VID 5  
4.6  
Other Headers  
4.6.1  
H8 Programming Headers  
The microcontroller for system management/keyboard/mouse control can be upgraded  
in two ways. The user can either use a special MS-DOS* utility or use an external  
computer connected to the system via the serial port on the board.  
If the user chooses to use an external computer connected to the system via the serial  
port, there are five jumpers that have to be set correctly first. Please refer to Table 11  
for a summary of these jumpers and refer to Figure 4 for the location of each jumper.  
Caution:  
Make sure the motherboard is not powered on and the power supply is disconnected  
before moving any of the jumpers.  
Here is the sequence of events necessary to program the H8.  
1. With the board powered off, move the five jumpers listed in Table 11 to the  
programming stuffing option.  
2. Power the S5 voltage rails by attaching an AC brick or an ATX power supply to the  
system.  
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®
Mobile Intel 915GME Express Chipset —Hardware Reference  
3. Program the H8 via the serial port.  
4. Disconnect the power supply from the system.  
5. With the board powered off, move the five jumpers listed in Table 11 back to the  
default stuffing option.  
Table 11.  
H8 Programming Jumpers  
Reference  
Designator  
Programming Stuffing  
Option  
#
Jumper  
Default Stuffing Option  
Out - normal operation -  
clock enabled  
IN - clock disabled - enable H8  
programming  
3
1Hz Clock  
J9H1  
IN - enable external H8  
programming  
4
8
H8 Programming J9J3  
OUT - normal operation  
1-2 normal operation (SIO)  
1-2 Normal Operation  
In-circuit H8  
J7J1  
2-3 connect TxD to H8 for  
programming  
Programming  
2-3 connect TxD to H8 for  
programming  
15 Tx Select  
16 Rx Select  
J7A3  
J7A2  
2-3 connect RxD to H8 for  
programming  
1-2 normal operation (SIO)  
4.6.2  
Expansion Slots and Sockets  
Table 12.  
Expansion Slots and Sockets  
Reference  
Designator  
Slot/Socket Description  
Detail  
U2E1  
478 Pin Grid Array (Micro-FCPGA) Processor Socket  
DDR2 - Channel A - SODIMM slot  
DDR2 - Channel B - SODIMM slot  
LVDS Graphics Interface  
PCI Express (x16)  
J5N1  
J5P1  
J5F1  
J6C1  
J6C1  
J7C2  
J8C1  
J8D1  
J8B1  
J9B3  
J7J2  
Table 13  
Table 14  
Table 15  
Table 15  
Table 15  
ADD2-R Slot  
PCI Express (x1) Slot 1  
PCI Express (x1) Slot 2  
PCI Express (x1) Slot 3  
PCI 2.3 Slot 1  
PCI 2.3 Slot 2  
IDE Interface Connector  
J8J3  
Mobile SATA Hard Drive Interface Connector  
Desk Top SATA Hard Drive Interface Connector  
SATA Desk Top Power Connector  
Intel Firmware Hub Socket  
Battery  
J7H1  
J6H3  
U8G1  
BT5H1  
4.6.2.1  
478 Pin Grid Array (Micro-FCPGA) Socket  
The pin locking mechanism on the CPU socket is released by rotating the screw on the  
socket 180 degrees counter-clockwise. CPU pins are keyed so as to only allow insertion  
in one orientation. DO NOT FORCE CPU into socket. Once the CPU is properly seated  
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into the socket, turn the screw 180 degrees clock-wise to secure the CPU in the socket.  
Note that the slot on the screw aligns with the lock and unlock legend on the case of  
the CPU socket.  
Caution:  
Please refer to the CPU installation instruction in Appendix A prior to inserting the CPU  
as the CPU and socket can be easily damaged.  
4.6.2.2  
PCI Express (x16)  
The platform has one 16 lane PCI Express Graphics slot and supports either x1 or x16  
®
modes. The slot is wired “lane reversed” which connects the Mobile Intel 915GME  
Express Chipset lanes 0 through 15 to lanes 15 through 0 on the slot. The Mobile Intel  
®
915GME Express Chipset will internally un-reverse this wiring since its CFG9 power-on  
strap is tied low.  
Table 13.  
PCI Express (x16) Pinout (J6C1) (Sheet 1 of 3)  
Pin  
Description  
PRSNT1#  
Pin  
Description  
+12 V  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
A9  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
B8  
B9  
+12 V  
+12 V  
+12 V  
RSVD  
GND  
GND  
(JTAG) TCK  
(JTAG) TDI  
(JTAG) TDO  
(JTAG) TMS  
+3.3 V  
SMCLK  
SMDAT  
GND  
+3.3 V  
(JTAG) TRST#  
+3.3 VAUX  
WAKE#  
RSVD  
A10  
A11  
A12  
A13  
A14  
A15  
A16  
A17  
A18  
A19  
A20  
A21  
A22  
A23  
A24  
A25  
A26  
A27  
A28  
A29  
+3.3 V  
B10  
B11  
B12  
B13  
B14  
B15  
B16  
B17  
B18  
B19  
B20  
B21  
B22  
B23  
B24  
B25  
B26  
B27  
B28  
B29  
PERST#  
GND  
REFCLK+  
REFCLK-  
GND  
GND  
LANE 0 (T+)  
LANE 0 (T-)  
GND  
LANE 0 (R+)  
LANE 0 (R-)  
GND  
PRSNT2*  
GND  
RSVD  
LANE 1 (T+)  
LANE 1 (T-)  
GND  
GND  
LANE 1 (R+)  
LANE 1 (R-)  
GND  
GND  
LANE 2 (T+)  
LANE 2 (T-)  
GND  
GND  
LANE 2 (R+)  
LANE 2 (R-)  
GND  
GND  
LANE 3 (T+)  
LANE 3 (T-)  
GND  
GND  
LANE 3 (R+)  
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Table 13.  
PCI Express (x16) Pinout (J6C1) (Sheet 2 of 3)  
Pin  
A30  
Description  
LANE 3 (R-)  
Pin  
B30  
Description  
RSVD  
A31  
A32  
A33  
A34  
A35  
A36  
A37  
A38  
A39  
A40  
A41  
A42  
A43  
A44  
A45  
A46  
A47  
A48  
A49  
A50  
A51  
A52  
A53  
A54  
A55  
A56  
A57  
A58  
A59  
A60  
A61  
A62  
A63  
A64  
A65  
A66  
A67  
A68  
A69  
GND  
B31  
B32  
B33  
B34  
B35  
B36  
B37  
B38  
B39  
B40  
B41  
B42  
B43  
B44  
B45  
B46  
B47  
B48  
B49  
B50  
B51  
B52  
B53  
B54  
B55  
B56  
B57  
B58  
B59  
B60  
B61  
B62  
B63  
B64  
B65  
B66  
B67  
B68  
B69  
PRSNT2#  
GND  
RSVD  
RSVD  
LANE 4 (T+)  
LANE 4 (T-)  
GND  
GND  
LANE 4 (R+)  
LANE 4 (R-)  
GND  
GND  
LANE 5 (T+)  
LANE 5 (T-)  
GND  
GND  
LANE 5 (R+)  
LANE 5 (R-)  
GND  
GND  
LANE 6 (T+)  
LANE 6 (T-)  
GND  
GND  
LANE 6 (R+)  
LANE 6 (R-)  
GND  
GND  
LANE 7 (T+)  
LANE 7 (T-)  
GND  
GND  
LANE 7 (R+)  
LANE 7 (R-)  
GND  
PRSNT#2  
GND  
RSVD  
LANE 8 (T+)  
LANE 8 (T-)  
GND  
GND  
LANE 8 (R+)  
LANE 8 (R-)  
GND  
GND  
LANE 9 (T+)  
LANE 9 (T-)  
GND  
GND  
LANE 9 (R+)  
LANE 9 (R-)  
GND  
GND  
LANE 10 (T+)  
LANE 10 (T-)  
GND  
GND  
LANE 10 (R+)  
LANE 10 (R-)  
GND  
GND  
LANE 11 (T+)  
LANE 11 (T-)  
GND  
GND  
LANE 11 (R+)  
LANE 11 (R-)  
GND  
GND  
LANE 12 (T+)  
LANE 12 (T-)  
GND  
GND  
LANE 12 (R+)  
LANE 12 (R-)  
GND  
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®
Hardware Reference—Mobile Intel 915GME Express Chipset  
Table 13.  
PCI Express (x16) Pinout (J6C1) (Sheet 3 of 3)  
Pin  
A70  
Description  
GND  
Pin  
B70  
Description  
LANE 13 (T+)  
LANE 13 (T-)  
GND  
A71  
A72  
A73  
A74  
A75  
A76  
A77  
A78  
A79  
A80  
A81  
A82  
GND  
B71  
B72  
B73  
B74  
B75  
B76  
B77  
B78  
B79  
B80  
B81  
B82  
LANE 13 (R+)  
LANE 13 (R-)  
GND  
GND  
LANE 14 (T+)  
LANE 14 (T-)  
GND  
GND  
LANE 14 (R+)  
LANE 14 (R-)  
GND  
GND  
LANE 15 (T+)  
LANE 15 (T-)  
GND  
GND  
LANE 15 (R+)  
LANE 15 (R-)  
GND  
PRST2#  
RSVD  
4.6.2.3  
ADD2 Slot  
When not being used for PCI Express, the x16 slots can be used for Serial Digital Video  
Out (SDVO), which is also sometimes referred to as ADD2 (Advanced Digital Display  
nd  
2
generation). SDVO cards provide for a third party vendor secondary graphics add-  
®
on such as a digital panel interface. It is important to note that the Mobile Intel  
915GME Express Chipset does not support lane reversal of its SDVO interface and  
since the slot is routed lane reversed, a special SDVO card which un-reverses the lanes  
must be used. These cards are sometimes referred to as ADD2-R (“R” for reversed)  
cards.  
Note:  
ADD2-N (“N” for normal) cards are not compatible with the board.  
Table 14.  
ADD2 Slot (J6C1) (Sheet 1 of 3)  
Pin  
Number  
A
B
1
2
3
4
5
6
7
8
9
N/C  
12 V  
12 V  
Reserved  
GND  
N/C  
12 V  
12 V  
GND  
N/C  
N/C  
N/C  
N/C  
GND  
3.3 V  
N/C  
N/C  
3.3 V  
3.3 V  
RESET  
10  
11  
N/C  
N/C  
Key  
12  
13  
GND  
N/C  
Reserved  
GND  
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Table 14.  
ADD2 Slot (J6C1) (Sheet 2 of 3)  
Pin  
Number  
A
B
14  
N/C  
SDVOC_Red+  
SDVOC_Red-  
GND  
15  
16  
17  
18  
GND  
SDVOC_TV_CLK_ln+  
SDVOC_TV_CLK_ln-  
GND  
SDVO_CtrlClk  
GND  
End of x1 Connector  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
Reserved  
GND  
SDVOB_Green+  
SDVOB_Green-  
GND  
SDVOB_Int+  
SDVOB_Int-  
GND  
GND  
SDVOB_Blue+  
SDVOB_Blue-  
GND  
GND  
SDVOB_Stall+  
SDVOB_Stall-  
GND  
GND  
SDVOB_Clk+  
SDVOB_Clk-  
GND  
GND  
N/C  
N/C  
Reserved  
SDVOB_CtrlData  
GND  
GND  
Reserved  
End of x4 Connector  
33  
34  
35  
36  
37  
38  
39  
40  
41  
42  
43  
44  
45  
46  
47  
48  
49  
Reserved  
GND  
SDVOC_Red+  
SDVOC_Red-  
GND  
N/C  
N/C  
GND  
GND  
SDVOB_Green+  
SDVOB_Green-  
GND  
GND  
SDVOB_Int+  
SDVOB_Int-  
GND  
GND  
SDVOB_Blue+  
SDVOB_Blue-  
GND  
GND  
N/C  
N/C  
GND  
GND  
SDVOB_Clk+  
SDVOB_Clk-  
GND  
GND  
N/C  
N/C  
N/C  
GND  
GND  
End of x8 Connector  
50  
Reserved  
N/C  
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Hardware Reference—Mobile Intel 915GME Express Chipset  
Table 14.  
ADD2 Slot (J6C1) (Sheet 3 of 3)  
Pin  
Number  
A
B
51  
52  
53  
54  
55  
56  
57  
58  
59  
60  
61  
62  
63  
64  
65  
66  
67  
68  
69  
70  
71  
72  
73  
74  
75  
76  
77  
78  
79  
80  
81  
82  
GND  
N/C  
N/C  
GND  
GND  
N/C  
N/C  
GND  
GND  
N/C  
N/C  
GND  
GND  
N/C  
N/C  
GND  
GND  
N/C  
N/C  
GND  
GND  
N/C  
N/C  
GND  
GND  
N/C  
N/C  
GND  
GND  
N/C  
N/C  
GND  
GND  
N/C  
N/C  
GND  
GND  
N/C  
N/C  
GND  
GND  
N/C  
N/C  
GND  
GND  
N/C  
N/C  
GND  
GND  
N/C  
N/C  
GND  
GND  
N/C  
N/C  
GND  
GND  
N/C  
N/C  
GND  
N/C  
N/C  
GND  
Reserved  
4.6.2.4  
PCI Express (x1)  
The three PCI Express x1 connectors allow the use of any industry standard PCI  
Express device. The pin configuration of the connectors is given below.  
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Table 15.  
PCI Express (x1) Pinout (J7C2, J8C1 & J8D1)  
Pin  
Description  
PRSNT1#  
Pin  
Description  
+12 V  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
A9  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
B8  
B9  
+12 V  
+12 V  
+12 V  
RSVD  
GND  
GND  
(JTAG) TCK  
(JTAG) TDI  
(JTAG) TDO  
(JTAG) TMS  
+3.3 V  
SMCLK  
SMDAT  
GND  
+3.3 V  
(JTAG) TRST#  
+3.3 VAUX  
WAKE#  
RSVD  
A10  
A11  
A12  
A13  
A14  
A15  
A16  
A17  
A18  
+3.3 V  
B10  
B11  
B12  
B13  
B14  
B15  
B16  
B17  
B18  
PERST#  
GND  
REFCLK+  
REFCLK-  
GND  
GND  
LANE 0 (T+)  
LANE 0 (T-)  
GND  
LANE 0 (R+)  
LANE 0 (R-)  
GND  
PRSNT2*  
GND  
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4.6.2.5  
IDE Connector  
Table 16.  
IDE Connector (J7J2)  
Pin  
Signal  
Reset IDE  
Pin  
Signal  
Ground  
1
2
3
Host Data 7  
Host Data 6  
Host Data 5  
Host Data 4  
Host Data 3  
Host Data 2  
Host Data 1  
Host Data 0  
Ground  
4
Host Data 8  
Host Data 9  
Host Data 10  
Host Data 11  
Host Data 12  
Host Data 13  
Host Data 14  
Host Data 15  
Key  
5
6
7
8
9
10  
12  
14  
16  
18  
20  
22  
24  
26  
28  
30  
32  
34  
36  
38  
40  
11  
13  
15  
17  
19  
21  
23  
25  
27  
29  
31  
33  
35  
37  
39  
DRQ3  
Ground  
I/O Write  
Ground  
I/O Read  
Ground  
I/O Ch Ready  
DACK 3  
CSEL  
Ground  
IRQ 14  
NC  
Address 1  
Address 0  
Chip Select 0  
Activity  
DATA Detect  
Address 2  
Chip Select 1  
Ground  
4.6.2.6  
SATA Pinout  
Table 17.  
SATA Pinout (J7H1)  
Pin  
Signal  
1
2
3
4
5
6
7
GND  
TXP  
TXN  
GND  
RXN  
RXP  
GND  
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Table 18.  
SATA Port 2 Power Connector Pinout (J6H3)  
Pin  
Signal  
1, 2  
3, 4  
5
+3.3 V  
+5 V  
+12 V  
GND  
6, 7, 8, 9, 10  
Table 19.  
SATA Port 0 Mobile Drive Connector Pinout (J8J3)  
Pin  
Signal  
2
TX  
3
TX#  
RX  
5
6
RX#  
+3.3 V  
+5 V  
+12 V  
GND  
GND  
8, 9, 10  
14, 15, 16, 18  
20, 21, 22  
1, 4, 7, 11  
12, 13, 17, 19  
4.6.2.7  
Fan Connectors  
Table 20.  
Fan Connectors (J3F4 and J3B1)  
Pin  
Signal  
1
2
+5V  
GND  
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®
Heat Sink Installation Instructions—Mobile Intel 915GME Express Chipset  
Appendix A Heat Sink Installation Instructions  
®
It is necessary for the Mobile Intel 915GME Express Chipset to have a thermal  
solution attached to the processor in order to keep the processor within its operating  
temperature.  
A heat sink is included in the kit. To install the heat sink:  
1. Remove heat sink from its package and separate the fan sink portion from the heat  
sink back plate.  
Figure 6.  
Heat Sink and Back Plate  
2. Examine the base of the heat sink, where contact with the processor die is made.  
There is a white Thermal Interface Material (TIM) on the surface. Do not add any  
additional TIMs on top of this white material.  
3. Place the back plate on the underside of the board so that the pins protrude  
through the holes in the system board around the processor.  
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®
Mobile Intel 915GME Express Chipset —Heat Sink Installation Instructions  
Figure 7.  
Back Plate Pins  
Back plate  
pins  
4. Clean the die of the processor with isopropyl alcohol before the heat sink is  
attached to the processor. This ensures that the surface of the die is clean.  
5. Place the heat sink over the pins of the heat sink back plate. Slide the heat sink  
over the lugs on the back plate pins so that the base is directly over the processor  
die. Turn the heat sink clockwise until it contacts the die. Then turn the heat sink ¼  
turn to tighten it. The heat sink should be snug but not tight.  
Caution:  
Overtightening the heat sink could cause excessive pressure on the die and damage  
the processor.  
6. Plug the fan connector for the heat sink onto the CPU fan header on the  
motherboard.  
®
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Development Kit User’s Manual  
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®
Heat Sink Installation Instructions—Mobile Intel 915GME Express Chipset  
Figure 8.  
CPU Fan Header  
CPU fan  
header  
®
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