Epson RTC 72423 User Manual

MQ162-03  
Application Manual  
Real Time Clock Module  
RTC-72421/72423  
Model  
Product Number  
RTC-72421 A  
RTC-72421 B  
RTC-72423 A  
RTC-72423  
Q4272421x000100  
Q4272421x000200  
Q4272423x000600  
Q4272423x000700  
RTC - 72421 / 72423  
CONTENTS  
Overview............................................................................................. 1  
Block diagram ..................................................................................... 1  
Terminal connections.......................................................................... 2  
Terminal functions............................................................................... 3  
Characteristics .................................................................................... 4  
1. Absolute maximum ratings........................................................................................ 4  
2. Recommended operating conditions......................................................................... 4  
3. Frequency characteristics and current consumption characteristics.......................... 4  
4. Electrical characteristics ( DC characteristics ) ......................................................... 4  
Switching characteristics (AC characteristics) ........................................... 5  
1. When ALE is used .................................................................................................... 5  
2. When ALE is fixed at VDD......................................................................................... 6  
Registers............................................................................................. 7  
1. Register table............................................................................................................ 7  
2. Notes ........................................................................................................................ 7  
3. Functions of register bits (overview).......................................................................... 7  
4. Setting the fixed-period pulse output mode and fixed-period interrupt mode............. 8  
5. Resetting the fixed-period pulse output mode and fixed-period interrupt mode......... 8  
Register description ............................................................................ 9  
1. Timing registers ........................................................................................................ 9  
2. CD register (control register D) ............................................................................... 10  
3. CE register (control register E)................................................................................ 11  
4. CF register (control register F)................................................................................ 13  
Using the RTC-72421/RTC-72423.....................................................14  
1. Power-on procedure (initialization).......................................................................... 14  
2. Read/write of S1 to W registers .............................................................................. 16  
3. Write to 30-second ADJ bit ..................................................................................... 16  
4. Using the CS1 pin ................................................................................................... 17  
Power supply circuit example.............................................................17  
Examples of connection to general-purpose microprocessor.............18  
External dimensions...........................................................................19  
Marking layout....................................................................................19  
Reference data ..................................................................................20  
Application notes................................................................................21  
1. Notes on handling................................................................................................... 21  
2. Notes on packaging ................................................................................................ 21  
RTC - 72421 / 72423  
4-BIT PARALLEL INTERFACE REAL TIME CLOCK MODULE  
RTC - 72421 / 72423  
Built-in crystal unit removes need for adjustment and reduces installation costs  
Microprocessor bus compatible ( tWW, tRD = 120 ns )  
Use of C-MOS IC enables low current consumption ( 5 µA Max., at VDD = 2.0 V )  
Compatibility with Intel CPU bus  
Address latch enable (ALE) pin compatible with multiplex bus CPUs  
Time (hours, minutes, seconds) and calendar (year, month, day) counter  
24-hour/12-hour switchover and automatic leap-year correction functions  
Fixed-period interrupt function  
30-seconds correction (adjustment) function  
Stop, start, and reset functions  
Battery back-up function  
Same mounting conditions as general-purpose SMD ICs possible (RTC-72423)  
Pins and functions compatible with the SMC-5242 series  
Overview  
The RTC-72421/RTC-72423 module is a real time clock that can be connected directly to a microprocessor's bus. Its built-in crystal  
unit enables highly accurate time-keeping with no physical access required for adjustment and, since there is no need to connect  
external components, mounting and other costs can be reduced.  
In addition to its time and calendar functions, the RTC-72421/RTC-72423 enables the use of 30-seconds correction and fixed-  
period interrupt functions.  
The RTC-72421/RTC-72423 module is ideally suited for applications requiring timing management, such as personal computers,  
dedicated word-processors, fax machines, multi-function telephones, and sequencers.  
Block diagram  
RTC-72421/72423  
OSC  
Counter  
D3  
D2  
D1  
D0  
RESET STOP  
HOLD  
bit  
BUSY  
bit  
Gate  
Gate  
bit  
bit  
24/12  
bit  
30sec ADJ  
bit  
S1  
S10  
D10  
MI1  
MI10  
H1  
Y1  
H10  
Y10  
W
WR  
RD  
A3  
A2  
A1  
S1 to CF  
D1  
MO1 MO10  
Decoder  
Latch  
A0  
CS0  
Output Selector  
ALE  
CS1  
STD.P  
64 Hz  
1 Second carry  
1 Minute carry  
1 Hour carry  
CD  
CE  
CF  
Page - 1  
MQ - 162 - 03  
RTC - 72421 / 72423  
Terminal connections  
RTC-72421  
RTC-72423  
DD  
STD.P  
1
2
24  
23  
22  
V
VDD  
VDD  
STD.P 1  
18  
17  
16  
(
(
)
)
0
DD  
V
CS  
(
)
CS0  
ALE  
A0  
2
3
DD  
V
N.C.  
ALE  
3
4
21 N.C.  
(
)
VDD  
0
1
A
5
20 CS  
4
5
6
7
8
9
15 CS1  
14 D0  
13 D1  
12 D2  
11 D3  
10 WR  
0
N.C.  
6
19  
D
1
A
7
18 N.C.  
17 N.C.  
1
A1  
N.C.  
8
2
A
9
16  
15  
14  
D
D
D
A2  
3
2
3
A
10  
11  
12  
A3  
RD  
GND  
13 WR  
RD  
GND  
The (VDD) pins are at the same electrical level as VDD. Do not connect these pins externally. The N.C. pins are not connected  
internally. Ground them in order to prevent noise.  
Page - 2  
MQ - 162 - 03  
RTC - 72421 / 72423  
Terminal functions  
Pin No.  
RTC-72421 RTC-72423  
Input/ou  
tput  
Function  
Signal  
Connect these pines to a bi-directional data bus or CPU data bus. Use this bus  
to read to and write from the internal counter and registers.  
CS1 CS0 RD WR  
Mode of D0 to D3  
Output mode (read mode)  
Input mode (write mode)  
Do not use  
H
H
H
L
L
L
L
L
H
H
L
L
D0-D3  
(Data bus)  
Bi-  
direction  
1114  
1416, 19  
L
H or L  
High impedance (back-up mode)  
High impedance (RTC not selected)  
H
H
H or L  
Address input pins used for connection to CPU address, etc. Used to select the  
RTC’s internal counter and registers (address selection).  
When the RTC is connected to a multiplexed-bus type of CPU, these pines can  
also be used in combination with the ALE described below  
A0-A3  
(Address bus)  
5, 7, 9, 10  
Input  
Input  
47  
Reads in address data and  
When the ALE is high, the address data and  
When the (through-mode) ALE falls, the address data and  
state for internal latching.  
state is read into the RTC.  
state at that  
status are maintained while  
CS0  
CS0  
CS0  
point are held. The held address data and  
the ALE is low.  
CS0  
ALE  
3
4
(Address Latch Enable)  
Address data and CS0 status  
ALE  
H
Read into the RTC to set address data  
Held in the RTC (latched at the trailing edge of the ALE)  
L
If the RTC is connected to a CPU that does not have an ALE pin and thus there  
is no need to use this ALE pin, fix it to VDD.  
Writes the data on D0 to D3 into the register of the address specified by A0 to  
WR  
A3, at the leading edge of  
WR  
.
10  
8
13  
11  
Input  
Input  
(WRite)  
Make sure that  
and  
are never low at the same time.  
RD  
WR  
Output data to D0 to D3 from the register at the address specified by A0 to A3,  
while is low.  
RD  
RD  
(ReaD)  
Make sure that  
and  
are never low at the same time.  
RD  
WR  
When CS1 is high and  
read and write are enabled.  
is low, the RTC’s chip-select function is valid and  
CS0  
When the RTC is connected to a multiplexed-bus type of CPU,  
requires  
CS0  
CS1, CS  
0
15,2  
20,2  
Input  
the operation of the ALE (see the description of the ALE).  
(Chip Select)  
Use CS1 connected to a power voltage detection circuit. When CS1 is high, the  
RTC is enabled; when it is low, the RTC is on standby.  
When CS1 goes low, the HOLD and RESET bits in the RTC registers are  
cleared to 0.  
This is an N-channel open drain output pin.  
Depending on the setting of the CE register, a fixed-period interrupt signal and a  
pulse signal are output.  
The output from this pin cannot be inhibited by the CS1 and  
signals.  
CS0  
Use a load voltage that is less than or equal to VDD. If not using this pin, keep it  
open-circuit.  
An example of STD.P connection is shown below.  
+5 V or VDD  
RTC  
STD.P  
(STanDard Pulse)  
At least 2.2 kΩ  
1
1
Output  
STD.P  
If the STD.P output is not be used during standby operation, connecting the pull-  
up resister to +5 V provides a reduction in current consumption. If the STD.P  
output is to be used even during standby, connect the pull-up resistor to the  
RTC’s VDD. In this case, the current consumption will be increased by the  
amount of current flowing through the pull-up resistor.  
Connect this pin to power source. Supply to 5 V ± 10 % to this pin during normal  
operation; at least 2 V during battery back-up operation.  
VDD  
18  
24  
12  
Connect this pin to ground.  
GND  
9
These pins are connected internally to VDD. Leave them open circuit.  
(VDD)  
16, 17  
22,23  
3, 6, 8,  
17, 18, 21  
These pins are not connected internally. Ground them.  
N.C.  
Page - 3  
MQ - 162 - 03  
RTC - 72421 / 72423  
Characteristics  
1. Absolute maximum ratings  
Item  
Supply voltage  
Input voltage  
Symbol  
Condition  
Specification  
Unit  
V
VDD  
Ta=+25 °C  
Ta=+25 °C  
Ta=+25 °C  
RTC-72421  
RTC-72423  
0.3 to 7.0  
GND0.3 to VDD+0.3  
GND0.3 to VDD+0.3  
55 to +85  
VI  
V
Output voltage  
VO  
V
°C  
°C  
Storage temperature  
TSTG  
55 to +125  
2. Recommended operating conditions  
Item  
Supply voltage  
Symbol  
Condition  
Specification  
Unit  
VDD  
4.5 to 5.5  
RTC-72421 ; 10 to +70  
RTC-72423 ; 40 to +85  
2.0 to 5.5  
V
°C  
°C  
V
Operating temperature  
TOPR  
No condensation  
Data hold voltage  
VDH  
tCDR  
tr  
CS1 data hold time  
Operation recovery time  
See the section on data  
hold timing  
2.0 Min.  
µs  
3. Frequency characteristics and current consumption characteristics  
Item  
Symbol  
Condition  
Specification  
Unit  
RTC-72421A  
± 10  
± 50  
± 20  
± 50  
RTC-72421B  
RTC-72423A  
RTC-72423  
Ta=+25 °C  
VDD=5.0 V  
Frequency tolerance  
f/f0  
× 10-6  
RTC-72421 : 10 °C to +70 °C  
(+25 °C reference)  
+10 / 120  
Operation temperature  
RTC-72423 : 40 °C to +85 °C  
(+25 °C reference)  
+10 / 220  
Frequency voltage  
characteristics  
Ta=+25 °C  
VDD=2.0 V to 5.5 V  
± 5 Max.  
× 10-6 / V  
× 10-6 / year  
Aging  
fa  
VDD=5.0 V, Ta=+25 °C  
± 5 Max.  
Drop test 3 times on a hard board from  
0.75 m height, or 29400 m/s2 × 0.2 ms ×  
1/2 sin wave × 3 directions  
× 10-6  
Shock resistance  
S.R.  
± 10 Max.  
IDD1  
IDD2  
VDD=5.0 V  
1.0 Typ.  
0.9 Typ.  
10 Max.  
5 Max.  
Ta=+25 °C, CS1=0 V  
I/O currents excluded  
Current consumption  
µA  
VDD=2.0 V  
4. Electrical characteristics ( DC characteristics )  
Item  
Symbol  
Condition  
Applicable pins  
Min. Typ. Max.  
Unit  
High input voltage 1  
Low input voltage 1  
High input voltage 2  
Low input voltage 2  
VIH1  
VIL1  
VIH2  
VIL2  
All input pins except for  
2.2  
V
CS1  
0.8  
4/5VDD  
VDD=2.0 V to  
5.5 V  
CS1  
V
1/5VDD  
Input pins except for  
D0 to D3  
Input leakage current 1  
ILK1  
1/-1  
µA  
VI=VDD/0 V  
Input leakage current 2  
Low output voltage 1  
High output voltage  
ILK2  
VOL1  
VOH  
10/-10  
IOL=2.5 mA  
IOH=-400 µA  
IOL=2.5 mA  
VI = VDD / 0 V  
D0 to D3  
0.4  
V
2.4  
Low output voltage 2  
Off-state leakage current  
VOL2  
IOFFLK  
0.4  
STD.P  
10/-10  
µA  
Input pins except for  
D0 to D3  
Input capacitance  
CI  
Input  
frequency  
1 MHz  
10  
20  
pF  
Input-output capacitance  
CI/O  
D0 to D3 and STD.P  
Page - 4  
MQ - 162 - 03  
RTC - 72421 / 72423  
Switching characteristics (AC characteristics)  
1. When ALE is used  
Write mode  
( VDD=5 V ± 0.5 V, RTC-72421;Ta=10 °C to +70 °C, RTC-72423;Ta=40 °C to +85 °C )  
Item  
Symbol  
tSU(CS1)  
tSU(A-ALE)  
th(ALE-A)  
tw(ALE)  
Condition  
Min.  
1000  
50  
Max.  
Unit  
CS1 set-up time  
Address set-up time before ALE  
Address hold time after ALE  
ALE pulse width  
50  
80  
ALE set-up time before write  
Write pulse width  
tSU(ALE-W)  
tw(W)  
0
120  
50  
ns  
ALE set-up time after write  
Data input set-up time before write  
Data input hold time after write  
CS1 hold time  
tSU(W-ALE)  
tSU(D-W)  
th(W-D)  
80  
10  
th(CS1)  
1000  
200  
Write recovery time  
trec(W)  
Read mode  
( VDD=5 V ± 0.5 V, RTC-72421;Ta=10 °C to +70 °C, RTC-72423;Ta=40 °C to +85 °C )  
Item  
Symbol  
tSU(CS1)  
tSU(A-ALE)  
th(ALE-A)  
tw(ALE)  
Condition  
Min.  
1000  
50  
Max.  
Unit  
CS1 set-up time  
Address set-up time before ALE  
Address hold time after ALE  
ALE pulse width  
50  
80  
ALE set-up time before read  
ALE set-up time after read  
Data output transfer time after read  
Data output floating transfer time after read  
CS1 hold time  
tSU(ALE-R)  
tSU(R-ALE)  
tPZV(R-Q)  
tPVZ(R-Q)  
th(CS1)  
0
ns  
50  
CL=150 pF  
120  
70  
0
1000  
200  
Read recovery time  
trec(W)  
(1) Write mode  
VIH2  
VIH2  
CS1  
tsu(CS1)  
th(CS1)  
tsu(A-ALE)  
th(ALE-A)  
VIH1  
VIH1  
VIL1  
A0 to A3  
CS0  
VIL1  
tw(ALE)  
VIH1  
VIH1  
ALE  
VIL1  
tsu(ALE-W)  
VIH1  
VIL1  
VIL1  
tsu(W-ALE)  
VIH1  
tw(W)  
WR  
VIL1  
th(W-D)  
tsu(D-W)  
VIH1  
VIL1  
VIH1  
VIL1  
D0 to D3  
(Input)  
(2) Read mode  
VIH2  
VIH2  
CS1  
tsu(CS1)  
tsu(A-ALE)  
th(CS1)  
th(ALE-A)  
VIH1  
VIL1  
VIH1  
VIL1  
A0 to A3  
CS0  
tw(ALE)  
VIH1  
VIH1  
ALE  
RD  
VIL1  
tsu(ALE-R)  
VIH1  
VIL1  
VIL1  
tsu(R-ALE)  
VIH1  
VIL1  
tpvz(R-Q)  
VIH1  
tpzv(R-Q)  
VIH1  
VIL1  
D0 to D3  
(Input)  
VIL1  
Page - 5  
MQ - 162 - 03  
RTC - 72421 / 72423  
2. When ALE is fixed at V  
DD  
Write mode  
( VDD=5 V ± 0.5 V, RTC-72421;Ta=10 °C to +70 °C, RTC-72423;Ta=40 °C to +85 °C )  
Item  
Symbol  
tSU(CS1)  
th(CS1)  
tSU(A-W)  
th(W-A)  
tw(W)  
Condition  
Min.  
1000  
1000  
50  
Max.  
Unit  
CS1 set-up time  
CS1 hold time  
Address set-up time before write  
Address hold time after write  
Write pulse width  
10  
ns  
120  
80  
Data input set-up time before write  
Data input hold time after write  
Write recovery time  
tSU(D-W)  
th(W-D)  
trec(W)  
10  
200  
Read mode  
( VDD=5 V ± 0.5 V, RTC-72421;Ta=10 °C to +70 °C, RTC-72423;Ta=40 °C to +85 °C )  
Item  
Symbol  
tSU(CS1)  
th(CS1)  
tSU(A-R)  
th(R-A)  
Condition  
Min.  
1000  
1000  
50  
Max.  
Unit  
CS1 set-up time  
CS1 hold time  
Address set-up time before read  
Address hold time after read  
Data output transfer time after read  
Data output floating transfer time after read  
Read recovery time  
10  
ns  
tpzv(R-Q)  
tpvz(R-Q)  
trec(R)  
CL=150 pF  
120  
70  
0
200  
(1) Write mode  
VIH2  
VIH2  
CS1  
tsu(CS1)  
th(CS1)  
VIH1  
VIH1  
VIL1  
A0 to A3  
CS0  
VIL1  
tsu(A-W)  
tw(W)  
th(W-A)  
VIH1  
VIL1  
VIH1  
WR  
VIL1  
th(W-D)  
tsu(D-W)  
VIH1  
VIL1  
VIH1  
VIL1  
D0 to D3  
(Input)  
(2) Read mode  
VIH2  
VIH2  
CS1  
tsu(CS1)  
th(CS1)  
VIH1  
VIH1  
VIL1  
A0 to A3  
CS0  
VIL1  
tsu(A-R)  
th(R-A)  
VIH1  
VIL1  
VIH1  
RD  
VIL1  
tpvz(R-Q)  
tpzv(R-Q)  
VOH  
VOL  
VOH  
VOL  
D0 to D3  
(Output)  
(3) Read/write recovery mode  
trec(R/W)  
VIH1  
VIH1  
RD,WR  
Page - 6  
MQ - 162 - 03  
RTC - 72421 / 72423  
Registers  
1. Register table  
Address  
Register  
name  
Data  
Count  
(BCD)  
A3  
A2  
A1  
A0  
Remarks  
(Hex)  
D3  
D2  
D1  
D0  
0
1
2
3
4
5
6
7
8
9
A
B
C
D
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
S1  
S10  
MI1  
MI10  
H1  
s8  
s4  
s40  
mi4  
mi40  
h4  
s2  
s20  
mi2  
mi20  
h2  
s1  
s10  
mi1  
mi10  
h1  
0 to 9  
0 to 5  
0 to 9  
0 to 5  
0 to 9  
0 to1 or 2  
0 to 9  
0 to 3  
0 to 9  
0 to 1  
0 to 9  
0 to 9  
0 to 6  
1-second digit register  
10-seconds digit register  
1-minute digit register  
10-minute digit register  
1-hour digit register  
*
mi8  
*
h8  
H10  
D1  
*
PM/AM  
d4  
h20  
d2  
h10  
d1  
10-hours digit register  
1-day digit register  
d8  
D10  
MO1  
MO10  
Y1  
*
*
d20  
mo2  
*
d10  
mo1  
mo10  
y1  
10-days digit register  
1-month digit register  
10-months digit register  
1-year digit register  
mo8  
mo4  
*
*
y8  
y80  
y4  
y2  
Y10  
W
y40  
w4  
y20  
w2  
y10  
w1  
10-years digit register  
Day-of-the-week register  
Control register D  
*
CD  
30s ADJ  
IRQ FLAG  
BUSY  
HOLD  
ITRPT/  
STND  
STOP  
E
F
1
1
1
1
1
1
0
1
CE  
CF  
t1  
t0  
MASK  
Control register E  
Control register F  
TEST  
24/12  
RESET  
2. Notes  
The counts at addresses 0 to C are all positive logic. Therefore, a register bit that is 1 appears as a high-level signal on the data bus.  
Data representation is BCD.  
Do not set an impossible date or time in the RTC. If such a value is set, the effect is unpredictable.  
When the power is turned on (before the RTC is initialized), the state of all bits is undefined. Therefore, write to all registers after  
power-on, to set initial values. For details of the initialization procedure, see "Using the RTC-72421/RTC-72423".  
The TEST bit of control register F is used by EPSON for testing. Operation cannot be guaranteed if 1 is written to this bit, so make  
sure that it is set to 0 during power-on initialization.  
3. Functions of register bits (overview)  
Bit name  
Function  
Not used. Writing to this bit has no effect; reading it always returns 0.  
All written BCD code.  
* mark  
Seconds to year digit  
This is special (base 7) counter that increments each time the day digits are incremented. It counts from 0 to 6. Since the value in the  
counter bears no relationship to the day of the week, the user can choose the coding that relates the counter value to the day of the  
week. The following is just one example of this relationship.  
Day-of-the-week digit  
Count  
Day  
0
1
2
3
4
5
6
Sunday  
Monday  
Tuesday  
Wednesday Thursday  
Friday  
Saturday  
The PM/AM bit is 1 for p.m. times; 0 for a.m. times. This bit is valid only for 12-hour-clock mode (when the 24/12 bit is 0); in 24-hour-  
clock mode (when the 24/12 bit is 1), this bit is always 0.  
PM/AM  
30-seconds ADJ  
Writing 1 to this bit executes a 30-seconds correction.  
The IRQ FLAG bit is set to 1 when an interrupt request is generated in fixed-period interrupt mode. Writing 0 to this bit clears it. Note  
that it is possible to write 1 to this bit, but this will have no effect.  
IRQ FLAG  
In fixed-period pulse output mode, this bit is at 1 while the pulse output is active(While the STD.P pin output is low), and is  
automatically cleared when pulse output ends. Writing 0 to this bit while pulse output is active forcibly cancels the pulse output.  
Use the BUSY bit when accessing data in the S1 to W registers. This bit is set to 1 during the incrementation cycle of the S1 to W  
registers, and is set to 0 otherwise. When the BUSY bit is 1, access to the S1 to W registers is inhibited.  
BUSY  
HOLD  
Note that the HOLD bit must also be used when accessing the S1 to W registers. The BUSY bit is always 1 when the HOLD bit is 0.  
There is no need to check the BUSY bit when accessing the control registers (CD, CE and CF).  
When 1 has been written to the HOLD bit, the status of the BUSY bit can be checked. While the HOLD bit is 1, any incrementation of  
the digits is held just once. (The incrementation is held only once, even if the HOLD bit remains at 1 for two or more seconds.)  
Clear the HOLD bit to 0 by forcing the CS1 pin low.  
t1,t0  
These bits set the timing for fixed-period pulse output and interrupts (1/64 seconds, 1 second, 1minute or 1 hour).  
The ITRPT/STND bit sets fixed-period pulse output mode and fixed-period interrupt mode. Write 1 to this bit to set interrupt(INRPT)  
mode; when write 0 to it to set pulse output(STND) mode.  
ITRPT/STND  
The MASK bit disables fixed-period pulse output and fixed-period interrupts. Write 1 to this bit to mask and inhibit these modes; write  
0 to it to enable these modes.  
MASK  
TEST  
The TEST bit is used by EPSON for test purposes. Operation cannot be guaranteed if 1 is written to this bit, so make sure that it is  
set to 0 during power-on initialization.  
The 24/12 bit switches between 24-hour clock and 12-hour clock. Write 1 to this bit to set 24-hour mode; write 0 to it to set 12-hour  
mode. When the 24/12 bit is set, both the timer registers and the timer mode must be reset to match. Note that the h20 bit of the H10  
register is always in 12-hour-clock mode.  
24/12  
The STOP bit sets an inhibition on clock operation in 8192 Hz steps which are divisions of the 1 second signal from the RTC’s  
internal 32768 Hz oscillation source. The clock is inhibited when the STOP bit is 1, and released again when it becomes 0. The  
internal oscillation circuit continues to operate even when the STOP bit is 1.  
STOP  
The RESET bit resets the part of the counter that is below one second. Write 1 to this bit to reset; 0 to release the reset.  
The RESET bit set to 0 when the CS1 pin goes low.  
RESET  
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RTC - 72421 / 72423  
4. Setting the fixed-period pulse output mode and fixed-period interrupt mode  
Mode  
pin  
Setting of fixed-period output timing  
MASK ITRPT/STND ITRPT/STND  
STD.P  
Fixed-period pulse output mode  
Fixed-period interrupt mode  
0
0
0
1
Set to 1 when Set low when  
t1 bit  
t0 bit  
0
0
0
1
1
0
1
1
active  
"0"  
active  
Fixed-period pulse output  
inhibited  
1
0 or 1  
Open-circuit  
Output period  
1/64 s  
1 s  
1 min.  
1 hour  
5. Resetting the fixed-period pulse output mode and fixed-period interrupt mode  
Mode  
pin  
IRQ FLAG  
IRQ FLAG  
STD.P  
Reset immediately after the write  
Reset immediately after the write  
Fixed-period pulse output mode  
MASK=0  
write 0  
("1" "0")  
("L" "OPEN")  
Automatically returned by the set period Automatically returned by the set period  
ITRPT/STND=0  
No write  
("1" "0")  
Reset immediately after write  
("1" "0")  
("L" "OPEN")  
Reset immediately after the write  
("L" "OPEN")  
Fixed-period interrupt mode  
MASK=0  
write 0  
ITRPT/STND=1  
No write  
The interrupt request continues, with no reset. Subsequent interrupt are ignored.  
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RTC - 72421 / 72423  
Register description  
1. Timing registers  
(1) S1 to Y10 registers  
These registers are 4-bit, positive logic registers in which the digits of the year, month, day, hour, minute, and second are  
continuously written in BCD code.  
For example, when(1, 0, 0, 1) has been written to the bits of the S1 register, the current value in the S1 register is 9. As  
described previously, data is handled by 4-bit BCD codes. Therefore, the S1 to Y10 registers consist of units registers and  
tens registers.  
When seconds are read, for example, the values in the S1 and S10 registers are both read out to give the total number of  
seconds.  
(2) W register  
The W register is a counter that increments each time the day digits are incremented. It counts from 0 to 6. Since the value in  
the counter bears no relationship to the day of the week, the user can choose the coding that relates the counter value to the  
day of the week. The following is just one example of this relationship;  
Count  
Day  
0
1
2
3
4
5
6
Sunday  
Monday  
Tuesday  
Wednesday Thursday  
Friday  
Saturday  
(3) H10 register (PM/AM, h20, h10)  
The H10 register contains a combination of the 10-hours digit bits and the PM/AM bit. Therefore, the contents of this register  
will depend on whether the 12-hour clock or 24-hour clock is selected. If the 12-hour clock is selected, the user must bear in  
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RTC - 72421 / 72423  
2. CD register (control register D)  
(1) HOLD bit (D0)  
Use the HOLD bit when accessing the S1 and W registers. For details, see "Read/write of S1 to W registers".  
HOLD bit  
Function HOLD bit  
0
1
The BUSY bit is always 1 (the BUSY status cannot be checked).  
The BUSY status can be checked. When the HOLD bits is 1 and the BUSY bit is 0, read and write are enabled.  
When the HOLD bit is 1, any incrementation in the count is held within the RTC. The held incrementation is automatically  
compensated for when the HOLD bit becomes 0. (Second and subsequent incrementations are ignored.) Therefore, if the  
HOLD bit is at 1 for two or more seconds in succession, the time will be slightly slow (delay). Make sure that any access to  
the S1 to W registers is completed within one second, then clear the HOLD bit to 0.  
The status of the BUSY bit remains as set while the HOLD bit is at 1. If the HOLD bit is not cleared temporarily to 0, the  
BUSY bit will not indicate any change within the RTC of the BUSY status. Therefore, when checking the status of the BUSY  
bit, write 0 to the HOLD bit each time the BUSY bit is read, to update the status of the BUSY bit.  
If the CS1 pin goes low while the HOLD bit is 1, the HOLD bit is automatically cleared to 0.  
There is no need to use the HOLD bit when accessing the control registers (CD, CE, and CF).  
(2) BUSY bit (D1)  
The BUSY bit indicates whether or not the digits from the seconds digit onward are being incremented, and is used when  
accessing the S1 to W registers. For details, see "Read/write of S1 to W registers".  
There is no need to check the BUSY bit when accessing the control registers (CD, CE, and CF).  
BUSY bit  
Significance of the BUSY bit  
Condition  
Remarks  
0
1
1
Access enable  
HOLD=1  
The RTC is not counting  
Access disabled  
The count has been incremented in the RTC (190 µs Max.)  
The count cannot be checked  
BUSY is always 1  
HOLD=0  
The status of the BUSY bit remains as set while the HOLD bit is at 1. If the HOLD bit is not cleared temporarily to 0, the  
BUSY bit will not indicate any change within the RTC of the BUSY status. Therefore, when checking the status of the BUSY  
bit, write 0 to the HOLD bit each time the BUSY bit is read, to update the status of the BUSY bit.  
The BUSY bit is a read-only bit, so any attempt to write 1 or 0 to it is ignored.  
(3) IRQ FLAG bit (D2)  
The IRQ FLAG bit is an internal status bit that corresponds to the status of the STD.P pin output, to indicate whether or not an  
interrupt request has been issued to the CPU. When the STD.P pin output is low, the IRQ FLAG bit is 1; when the STD.P pin  
output is open-circuit, the IRQ FLAG bit is 0.  
When writing data to the CD register, keep the IRQ FLAG bit at 1, except when deliberately writing 0 to it. Writing 0 to the IRQ  
FLAG bit cancels its status if it had become 1 at that instant or just before.  
i. Interrupt processing (interrupt status monitor function)  
Since the IRQ FLAG bit indicates that an interrupt request has been generated to the CPU, it is in synchronization with  
the status of the STD.P pin output. In other words, the status of the STD.P pin output can be monitored by monitoring the  
IRQ FLAG bit.  
In fixed-period pulse output mode, the relationship between the IRQ FLAG bit and the STD.P pin output is as follows:  
STD.P pin output  
IRQ FLAG bit  
Low  
1
Open(for open-drain output)  
0
The timing of the IRQ FLAG bit and the STD.P pin output in fixed-period pulse output mode is as follows:  
*STD.P pin output  
IRQ FLAG bit  
0
1
0
Approx.  
1.95 ms  
7.8125 ms  
The output levels of the STD.P pin are low (down) and open circuit (up).  
ii. STD.P pin output reset function  
The STD.P pin output can be reset after an interrupt is generated by writing 0 to the IRQ FLAG bit.  
The relationships of this operation are shown below. Note that writing 1 to this bit is possible, but it has no effect.  
IRQ FLAG bit  
STD.P pin output  
1
0
Low  
Open(for open-drain output)  
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RTC - 72421 / 72423  
*STD.P pin output  
IRQ FLAG bit  
0
1
0
1
Interrupt generation (in synchronization  
with count incrementation)  
Writing of 0 IRQ FLAG bit.  
The output levels of the STD.P pin are low (down) and open circuit (up).  
Note: If the STD.P pin output remains low as set, subsequently generated interrupts are ignored. In order to prevent  
interrupts from being overlooked, write 0 to the IRQ FLAG bit before the next interrupt is generated, to return the STD.P  
pin to high.  
iii. Initial setting of IRQ FLAG bit  
If the fixed-period interrupt mode is not used, set the IRQ FLAG bit to 1. If the fixed-period interrupt mode is used, set the  
IRQ FLAG bit to 0.  
(4) 30-second ADJ bit (D3)  
The 30-seconds ADJ bit provides a 30-seconds correction (by which term is meant a rounding to the nearest whole minute)  
when 1 is written to it. The 30-seconds correction takes a maximum of 76.3 µs to perform, and after the correction the 30-  
seconds ADJ bit is automatically returned to 0. This operation also clears the sub-second bits of the internal counter down to  
the 1/256-seconds counter. During the 30-seconds correction, access to the counter registers at addresses 0 to C is inhibited,  
so monitor the 30-seconds ADJ bit to check that this bit has returned to 0, before starting subsequent processing. If no  
access is made to the RTC for 76.3 µs or more after 1 is written to the 30-seconds ADJ bit, there is no need to check the 30-  
seconds ADJ bit again.  
i. Operation of 30-seconds ADJ bit  
Writing 1 to the 30-seconds ADJ bit performs a 30-second correction. This 30-seconds correction changes the seconds  
and minutes digits as shown below. If the minutes digits have been incremented, an upward carry is propagated.  
Status of seconds digits before correction  
Status of seconds digits after correction  
00 seconds. No carry to the minutes digits.  
0 seconds. Carry to the minutes digits.  
Up to 29 seconds  
30 to 59 seconds  
Example: The correction caused by the 30-seconds ADJ bit sets the time within the RTC to 00:00:00 if it was within the  
range of 00:00:00 to 00:00:29, or to 00:01:00 if it was within the range of 00:00:30 to 00:00:59.  
ii. Access inhibited after 30-seconds correction  
For 76.3 µs after 1 is written to the 30-seconds ADJ bit, the RTC is engaged in internal processing, so read to and write  
from the S1 to W registers is inhibited. The 30-seconds ADJ bit is automatically cleared to 0 at the end of the 76.3 µs.  
3. CE register (control register E)  
(1) MASK bit (D0)  
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RTC - 72421 / 72423  
2.Fixed-period interrupt mode (ITRPT/STND=1)  
0
1
0
1
MASK bit  
0
1
0
IRQ FLAG bit  
*STD. P pin  
Nothing is output because  
the MASK bit is at 1  
Interrupt timing  
Reset at the point at which 0 is written to the IRF FLAG bit  
No interrupts are generated while the MASK bit is at 1  
The output levels of the STD.P pin are low(down) and open circuit(up).  
(2) ITRPT/STND bit (D1)  
The ITRPT/STND bit specifies fixed-period pulse output mode or fixed-period interrupt mode for the fixed-period operating  
mode.  
The mode selected by each setting of this bit is as follows:  
ITRPT/STND  
Operating mode  
0
1
Fixed-period pulse output mode  
Fixed-period interrupt mode  
For details of the timing of fixed-period operation, see the section on the t0 and t1 bits below.  
(3) t0 (D2), t1 (D3) bits  
These bits select the timing of fixed-period operation in fixed-period pulse output mode or fixed-period interrupt mode. There  
is no special counter within the RTC for fixed-period operation; the fixed-period operation is performed at the incrementation  
of the time (period) specified by the t0 and t1 bits.  
i. Setting t0 and t1  
Setting these bits specifies the generation timing for fixed-period pulse output or fixed-period interrupts.  
t1  
0
0
1
1
t0  
0
1
0
1
Period(frequency)  
1/64 seconds (64 Hz)  
1 second (1 Hz)  
Remarks  
In fixed-period pulse output mode, the STD.P pin output is low  
for 7.8125 ms  
(not that half the 1/64 second period is 7.8125 ms)  
1 minute (1/60 Hz)  
1 hour (1/3600 Hz)  
ii. STD.P pin output control  
The timing of STD.P pin output is at the incrementation of the period specified by the t0 and t1 bits.  
Example : STD.P pin output when 1 hour is set  
(Conditions: t0=1, t1=1, MASK=0)  
PM 1:00  
PM 2:00  
Fixed-period pulse output mode  
(ITRPT/STND=0)  
STD.P pin output  
Automatic reset after 7.8125 ms  
STD.P pin output  
Fixed-period interrupt output mode  
(ITRPT/STND=1)  
Reset by writing 0 to IRQ FLAG bit  
iii. Frequency of STD.P pin output in fixed-period pulse output mode  
In fixed-period pulse output mode, the timing of output is determined by the frequency of the internal crystal unit. This  
means that the output can be used to measure any error in the frequency of the crystal unit.  
Note: The 30-seconds correction could generate a carry. If such a carry occurs when the t0 and t1 bits are set to  
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RTC - 72421 / 72423  
4. CF register (control register F)  
(1) RESET bit (D0)  
Writing 1 to the RESET bit clears the sub-second bits of the internal counter down to the 1/256-seconds counter. The reset  
continues for as long as the RESET bit is 1. End the reset by writing 0 to the RESET bit. If the level of the CS1 pin goes low,  
the RESET bit is automatically cleared to 0.  
(2) STOP bit (D1)  
Writing 1 to the STOP bit stops the clock of the internal counter from the 1/8192 second bit onward. Writing 0 to the STOP bit  
restarts the clock.  
This function can be used to create a cumulative timer.  
(3) 24/12 bit (D2)  
Set the 24/12 bit to select either 12-hour clock or 24-hour clock as the timer mode. In 12-hour clock mode, the PM/AM bit is  
used.  
i. Switching between 12-hour clock and 24-hour clock  
Writing 1 to the 24/12 bit selects 24-hour clock mode. In 24-hour clock mode, the PM/AM bit is inoperative and is always  
0. Writing 0 to the 24/12 bit selects 12-hour clock mode. In 12-hour clock mode, the PM/AM bit becomes valid. It is 0 for  
a.m. times and 1 for p.m. times.  
ii. Overwriting the 24/12 bit  
Overwriting the contents of the 24/12 bit could destroy the contents of the registers from the H1 register upward (from the  
1-hour digit upward). Therefore, before overwriting the 24/12 bit, it is necessary to save the contents of the hour (H1,  
H10), day (D1, D10), month (MO1, MO10), year (Y1, Y10), and day-of-the-week (W) registers, then re-write the data back  
into the registers to suit the new timer mode, after overwriting the 24/12 bit.  
(4) TEST bit (D3)  
The TEST bit is used by EPSON for test purposes. Operation cannot be guaranteed if 1 is written to this bit, so make sure  
that it is set to 0 during power-on initialization.  
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RTC - 72421 / 72423  
Using the RTC-72421/RTC-72423  
1. Power-on procedure (initialization)  
When power is turned on, the contents of all registers and the output from the STD.P pin are undefined. Therefore, all the registers  
must be initialized after power on. Follow the procedure given below for initialization.  
Power On  
Start the counter  
At ths point, there is no need to  
(A)  
Initialize the control registers  
check the BUSY bit.  
Check the status of the BUSY bit  
(B)  
(C)  
STOP and RESET the counter  
Set the current time in the registers  
1
(initialize the S to W registers)  
Start the counter and release  
the HOLD status  
(A)  
From here on, check the status of the  
BUSY bit before accessing any of the  
D
E
F
registers, except for the C , C and C  
control register.  
To next process  
For details of processes (A) to (C), see next page.  
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RTC - 72421 / 72423  
(A)Starting the count  
START  
Set the CF register  
Reg.F  
0*00B  
TEST  
24/12  
STOP  
0
0 or 1  
0
0
RESET  
Set the CE register  
This setting is not necessary when  
the STD.P pin is not used  
Reg.D  
0*00B  
30 s ADJ  
IRQ FLAG  
HOLD  
0
Set the IRQ FLAG bit to 0 when fixed-period  
interrupt mode is used, or to 1when it is not  
used.  
0 or 1  
0
To next process  
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RTC - 72421 / 72423  
2. Read/write of S1 to W registers  
Use one of the procedures shown below to access registers other than the control registers (CD, CE, and CF) while the RTC is  
operating. Note that the control registers can be accessed regardless of the status of the BUSY bit.  
Read or write when the HOLD bit is used  
From previous process  
HOLD bit 1  
From previous process  
HOLD bit  
1
Read the BUSY bit  
Read the BUSY bit  
NO  
or  
NO  
BUSY bit = 0?  
YES  
BUSY bit = 0?  
YES  
HOLD bit 0  
HOLD bit 0  
Read required digit data or  
set the time  
Read requierd digit data or  
set the time  
Wait 190 µs  
HOLD bit 0  
HOLD bit 0  
To next process  
To next process  
Read when the HOLD bit is not used  
From previous process  
Read the required digit data  
(1st time)  
Store the read data (A data)  
Read the required digit data  
(2nd time)  
Store the read data (Bdata)  
NO  
A=B?  
YES  
To next process  
The operation when the HOLD bit is not used involves reading the same digit twice and comparing the read values. This is to  
avoid the problem of reading unstable data that would occur if the data was read while the RTC was incrementing the count.  
3. Write to 30-second ADJ bit  
The 30-seconds ADJ function is enabled by writing 1 to the 30-seconds ADJ bit. Note that the counter registers (S1 to W) cannot  
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RTC - 72421 / 72423  
4. Using the CS pin  
1
The RTC-72421/RTC-72423 has 2 chip-select signal systems: CS0  
Page - 17  
MQ - 162 - 03  
RTC - 72421 / 72423  
Examples of connection to general-purpose microprocessor  
Page - 18  
MQ - 162 - 03  
RTC - 72421 / 72423  
External dimensions  
1. RTC-72421  
23.1 Max.  
6.3  
7.62  
0.2  
Min.  
4.2  
Max.  
1.52  
0.46  
0.25  
2.54  
Min.  
2.54  
0 - 15  
2. RTC-72423  
16.3 Max.  
7.9  
12.0  
0.1  
Min.  
2.8  
Max.  
0.2  
0.35  
1.0  
Unless otherwise stated, all units are [mm]  
1.27  
0 - 10  
Marking layout  
Type  
Frequency tlerance  
Indications of frequency tolerance  
Type  
Indication  
Tolerances  
±10 x10-6  
±50 x10-6  
±20 x10-6  
±50 x10-6  
RTC72421  
A
A
B
RTC-72421  
A
RTC-72423  
No indications  
EPSON 6053C  
Logo mark  
Manufacturing lot no.  
Note: The illustration is a general representation of the content and location of information on the  
label, and is not a detailed specification of the typeface, size or positioning of printing used on the  
label.  
Page - 19  
MQ - 162 - 03  
RTC - 72421 / 72423  
Reference data  
[Finding the frequency stability]  
1. Example of frequency and temperature characteristics  
θT = +25 C Typ.  
°
1. Frequency and temperature characteristics can be approximated  
using the following equations.  
10-6  
×
= -0.035 10-6 Typ.  
α
×
0
fT = α ( θT - θX )2  
: Frequency deviation in any  
temperature  
fT  
-50  
-100  
-150  
( 1 / °C2 )  
: Coefficient of secondary temperature  
α
( 0.035±0.005 ) × 10-6 / °C2  
: Ultimate temperature (+25±5 °C)  
: Any temperature  
θT  
( °C )  
θX ( °C )  
-50  
0
+50  
+100  
2. To determine overall clock accuracy, add the frequency precision  
and voltage characteristics.  
Temperature [ C]  
°
f/f = f/fo + fT + fV  
: Clock accuracy (stable frequency) in  
any temperature and voltage.  
f/f  
: Frequency precision  
f/fo  
fT  
: Frequency deviation in any  
temperature.  
: Frequency deviation in any voltage.  
fV  
3. How to find the date difference  
Date Difference = f/f × 86400(s)  
* For example: f/f = 11.574 × 10-6 is an error of  
approximately 1 second/day.  
2. Frequency voltage characteristics ( Typ. )  
Frequency[x10-6]  
3. Current consumption voltage characteristics ( Typ. )  
Current consumption[µA]  
Condtions  
5 V reference,Ta=+25 °C  
Conditions  
CS1=0 V, No load, Ta=+25 °C  
5
+4  
+2  
0
4
3
2
1
2
3
4
5
6
DD  
Supply Voltage(V ) [V]  
-2  
-4  
2
3
4
5
6
DD  
Supply voltage(V  
)
Note:  
This data shows average values for a sample lot.  
For rated values, see the specifications.  
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MQ - 162 - 03  
RTC - 72421 / 72423  
Application notes  
1. Notes on handling  
This module uses a C-MOS IC to realize low power consumption. Carefully note the following cautions when  
handling.  
(1) Static electricity  
While this module has built-in circuitry designed to protect it against electrostatic discharge, the chip could still be  
damaged by a large discharge of static electricity. Containers used for packing and transport should be  
constructed of conductive materials. In addition, only soldering irons, measurement circuits, and other such  
devices which do not leak high voltage should be used with this module, which should also be grounded when  
such devices are being used.  
(2) Noise  
If a signal with excessive external noise is applied to the power supply or input pins, the device may malfunction or  
"latch up." In order to ensure stable operation, connect a filter capacitor (preferably ceramic) of greater that 0.1 µF  
as close as possible to the power supply pins ( between VDD and GND ). Also, avoid placing any device that  
generates high level of electronic noise near this module.  
Do not connect signal lines to the shaded area in the figure shown in Fig.1 and, if possible, embed this area in a  
GND land.  
(3) Voltage levels of input pins  
Apply signal levels that are as close as possible to VDD and ground, to all pins except the CS1 pin. Mid-level  
potentials will cause increased current consumption and a reduced noise margin, and can impair the functioning of  
the device.  
Since it is likely that power consumption will increase excessively and operation cannot be guaranteed, the setting  
of the voltage range of VIH2 and VIL2 at the CS1 pin should be such that the system is designed so that it is not  
affected by ripple or other noise.  
Note that the CS1 pin cannot handle a TTL interface.  
(4) Handling of unused pins  
Since the input impedance of the signal pins is extremely high, operating the device with these pins open circuit  
can lead to malfunctions due to noise. Pull-up or pull-down resistors should be provided for all unused signal pins.  
The N.C. pins should be connected to either VDD or GND, to prevent noise. If not using the ALE pin, connect it  
directly to VDD.  
2. Notes on packaging  
(1) Soldering heat resistance  
If the temperature within the package exceeds +260 °C, the characteristics of the crystal oscillator will be degraded  
and it may be damaged. The reflow conditions within our reflow profile is recommended.  
Therefore, always check the mounting temperature and time before mounting this device. Also, check again if the  
mounting conditions are later changed.  
See Fig. 2 profile for our evaluation of Soldering heat resistance for reference.  
(2) Mounting equipment  
While this module can be used with general-purpose mounting equipment, the internal crystal oscillator may be  
damaged in some circumstances, depending on the equipment and conditions. Therefore, be sure to check this. In  
addition, if the mounting conditions are later changed, the same check should be performed again.  
(3) Ultrasonic cleaning  
Depending on the usage conditions, there is a possibility that the crystal oscillator will be damaged by resonance  
during ultrasonic cleaning. Since the conditions under which ultrasonic cleaning is carried out (the type of cleaner,  
power level, time, state of the inside of the cleaning vessel, etc.) vary widely, this device is not warranted against  
damage during ultrasonic cleaning.  
(4) Mounting orientation  
This device can be damaged if it is mounted in the wrong orientation. Always confirm the orientation of the device  
before mounting.  
(5) Leakage between pins  
Leakage between pins may occur if the power is turned on while the device has condensation or dirt on it. Make  
sure the device is dry and clean before supplying power to it.  
Fig. 2 Reference profile for our evaluation of Soldering heat resistance.  
Fig. 1: Example GND Pattern  
Temperature [ °C ]  
RTC-72421  
+260 °C Max.  
1 5 °C / s  
RTC-72423  
+1 +5 °C / s  
+170 °C  
100 s  
+220 °C  
35 s  
+1 +5 °C / s  
Pre-heating area  
Stable Melting area  
time [ s ]  
Page - 21  
MQ - 162 - 03  
Application Manual  
Distributor  
AMERICA  
EPSON ELECTRONICS AMERICA, INC.  
HEADQUARTER  
150 River Oaks Parkway, San Jose, CA 95134, U.S.A.  
Phone: (1)800-228-3964 (Toll free) : (1)408-922-0200 (Main) Fax: (1)408-922-0238  
Atlanta Office  
3010 Royal Blvd. South, Ste. 170, Alpharetta, GA 30005, U.S.A.  
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Boston Office  
Chicago Office  
El Segundo Office  
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Phone: (1)800-249-7730 (Toll free) : (1)310-955-5300 (Main) Fax: (1)310-955-5400  
EUROPE  
EPSON EUROPE ELECTRONICS GmbH  
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Phone: (49)-(0)89-14005-0 Fax: (49)-(0)89-14005-110  
Düsseldorf Branch Office  
Altstadtstrasse 176, 51379 Leverkusen, Germany  
Phone: (49)-(0)2171-5045-0 Fax: (49)-(0)2171-5045-10  
UK & Ireland Branch Office Unit 2.4, Doncastle House, Doncastle Road, Bracknell, Berkshire RG12 8PE, England  
Phone: (44)-(0)1344-381700 Fax: (44)-(0)1344-381701  
French Branch Office  
LP 915 Les Conquérants, 1 Avenue de l' Atlantique, Z.A. de Courtaboeuf 2  
91976 Les Ulis Cedex, France  
Phone: (33)-(0)1-64862350 Fax: (33)-(0)1-64862355  
ASIA  
EPSON (CHINA) CO., LTD.  
23F, Beijing Silver Tower 2# North RD DongSangHuan ChaoYang District, Beijing, China  
Phone: (86) 10-6410-6655 Fax: (86) 10-6410-7319  
4F, Bldg.,27, No.69, Gui Qing Road, Cao hejing, Shanghai, China  
Phone: (86) 21-6485-0835 Fax: (86) 21-6485-0775  
EPSON HONG KONG LTD.  
20/F., Harbour Centre, 25 Harbour Road, Wanchai, Hong kong  
Phone: (852) 2585-4600 Fax: (852) 2827-2152  
EPSON ELECTRONIC TECHNOLOGY DEVELOPMENT (SHENZHEN )CO., LTD.  
Flat 16A, 16/F, New Times Plaza, No.1 Taizi Road, Shenzhen, China  
Phone: (86) 755-6811118 Fax: (86) 755-6677786  
EPSON TAIWAN TECHNOLOGY & TRADING LTD.  
14F, No.7, Song Ren Road, Taipei 110  
Phone: (886) 2-8786-6688 Fax: (886)2-8786-6660  
EPSON SINGAPORE PTE. LTD.  
No.1, Temasek Avenue #36-00, Millenia Tower, Singapore 039192  
Phone: (65) 337-7911 Fax: (65) 334-2716 http://www.epson.com.sg  
SEIKO EPSON CORPORATION KOREA Office  
50F, KLI 63 Building,60 Yoido-dong, Youngdeungpo-Ku, Seoul, 150-763, Korea  
Phone: (82) 2-784-6027 Fax: (82) 2-767-3677 http://www.epson-device.co.kr  
Gumi Branch Office  
6F, Good Morning Securities Bldg., 56, Songjeong-dong Gumi-City, Gyongsangbuk-Do,  
730-090, Korea  
Phone: (82) 54-454-6027 Fax: (82) 54-454-6093  
ELECTRONIC DEVICE MARKETING DEPARTMENT  
Electronic devices information on WWW server  

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