Embedded Computing for
Business-Critical ContinuityTM
MVME2500
Installation and Use
P/N: 6806800L01H
January 2014
Contents
About this Manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
1.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
1.2 Standard Compliances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
1.3 Mechanical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
1.4 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
1.5 Product Identification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Hardware Preparation and Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
2.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
2.2 Unpacking and Inspecting the Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
2.3 Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
2.3.1 Environmental Requirements. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
2.3.2 Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
2.3.3 Equipment Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
2.4 Configuring the Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
2.5 Installing Accessories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
2.5.1 Rear Transition Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
2.5.2 PMC/XMC Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
2.6 Installing and Removing the Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
2.7 Completing the Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
3.1 Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
3.2 Front Panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
3.2.1 Reset Switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
3.3 LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
3.3.1 Front Panel LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
3.3.2 Onboard LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
3.4 Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
3.4.1 Front Panel Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
3.4.1.1 RJ45 with Integrated Magnetics (J1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
3.4.1.2 Front Panel Serial Port (J4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
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3.4.1.3 USB Connector (J5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
3.4.1.4 VMEBus P1 Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
3.4.1.5 VMEBus P2 Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
3.4.2 Onboard Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
3.4.2.1 Flash Program Connector (P7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
3.4.2.2 SATA Connector (J3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
3.4.2.3 PMC Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
3.4.2.4 JTAG Connector (P6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
3.4.2.5 COP Connector (P6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
3.4.2.6 SD Connector (J2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
3.4.2.7 XMC Connector (XJ2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
3.4.2.8 Miscellaneous P2020 Debug Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
3.5 Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
3.5.1 Geographical Address Switch (S1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
3.5.2 SMT Configuration Switch (S2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
4.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
4.2 Chipset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
4.2.1 e500 Processor Core. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
4.2.2 Integrated Memory Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
4.2.3 PCI Express Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
4.2.4 Local Bus Controller (LBC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
4.2.5 Secure Digital Hub Controller (SDHC). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
4.2.6 I2C Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
4.2.7 USB Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
4.2.8 DUART. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
4.2.9 DMA Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
4.2.10 Enhanced Three-Speed Ethernet Controller (eTSEC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
4.2.11 General Purpose I/O (GPIO). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
4.2.12 Security Engine (SEC) 3.1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
4.2.13 Common On-Chip Processor (COP). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
4.2.14 P20x0 Hardware Configuration Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
4.3 System Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
4.4 Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
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4.4.1 Real Time Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
4.4.2 Internal Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
4.4.3 Watchdog Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
4.4.4 FPGA Tick Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
4.5 Ethernet Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
4.6 SPI Bus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
4.6.1 SPI Flash Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
4.6.2 SPI Flash Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
4.6.3 Firmware Redundancy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
4.6.4 Crisis Recovery. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
4.7 Front UART Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
4.8 Rear UART Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
4.9 PMC/XMC Sites . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
4.9.1 PMC Add-on Card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
4.9.2 XMC Add-on Card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
4.10 SATA Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
4.11 VME Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
4.11.1 Tsi148 VME Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
4.12 USB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
4.13 I2C Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
4.14 Reset/Control FPGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
4.15 Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
4.15.1 Onboard Voltage Supply Requirement. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
4.15.2 Power Up Sequencing Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
4.16 Clock Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
4.17 Reset Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
4.17.1 Reset Sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
4.18 Thermal Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
4.19 Real-Time Clock Battery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
4.20 Debugging Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
4.20.1 POST Code Indicator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
4.20.2 JTAG Chain and Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
4.20.3 Custom Debugging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
4.21 Rear Transition Module (RTM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
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5.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
5.2 Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
5.3 Flash Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
5.4 Linux Devices Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
5.5 Programmable Logic Device (PLD) Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
5.5.1 PLD Revision Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
5.5.2 PLD Year Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
5.5.3 PLD Month Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
5.5.4 PLD Day Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
5.5.5 PLD Sequence Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
5.5.6 PLD Power Good Monitor Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
5.5.7 PLD LED Control Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
5.5.8 PLD PCI/PMC/XMC Monitor Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
5.5.9 PLD U-Boot and TSI Monitor Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
5.5.10 PLD Boot Bank Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
5.5.11 PLD Write Protect and I2C Debug Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
5.5.12 PLD Test Register 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
5.5.13 PLD Test Register 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
5.5.14 PLD GPIO2 Interrupt Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
5.5.15 PLD Shutdown and Reset Control and Reset Reason Register . . . . . . . . . . . . . . . . . . . . . . 95
5.5.16 PLD Watchdog Timer Refresh Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
5.5.17 PLD Watchdog Control Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
5.5.18 PLD Watchdog Timer Count Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
5.6 External Timer Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
5.6.1 Prescaler Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
5.6.2 Control Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
5.6.3 Compare High and Low Word Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
5.6.4 Counter High and Low Word Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Boot System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
6.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
6.2 Accessing U-Boot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
6.3 Boot Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
6.3.1 Booting from a Network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
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Contents
6.3.2 Booting from an Optional SATA Drive. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
6.3.3 Booting from a USB Drive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
6.3.4 Booting from an SD Card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
6.3.5 Booting VxWorks Through the Network. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
6.4 Using the Persistent Memory Feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
6.5 MVME2500 Specific U-Boot Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
6.6 Updating U-Boot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
7.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
7.2 Reset Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
7.3 Interrupt Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
7.4 I2C Bus Device Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
7.5 Ethernet PHY Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
7.6 Other Software Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
7.6.1 MRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
7.6.2 Real Time Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
7.6.3 Quad UART. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
7.6.4 LBC Timing Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
7.7 Clock Distribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
7.7.1 System Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
7.7.2 Real Time Clock Input. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
7.7.3 Local Bus Controller Clock Divisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
A.1 Replacing the Battery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
B.1 Emerson Network Power - Embedded Computing Documents . . . . . . . . . . . . . . . . . . . . . . . . . 129
B.2 Manufacturers’ Documents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
B.3 Related Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
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MVME2500 Installation and Use (6806800L01H)
Contents
Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
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MVME2500 Installation and Use (6806800L01H)
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Key Features of the MVME2500 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Board Standard Compliances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Mechanical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Available Board Variants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Available Board Accessories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Environmental Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Front Panel LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Onboard LEDs Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Front Panel Tri-Speed Ethernet Connector (J1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
USB Connector (J5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
VMEbus P1 Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
VMEbus P2 Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Flash Programming Header (P7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Custom SATA Connector (J3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
PMC J11 Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
PMC J12 Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
PMC J13 Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
PMC J14 Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
COP Header (P10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
SD Connector (J2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
XMC Connector (XJ2) Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
P20x0 Debug Header . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Geographical Address Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Geographical Address Switch Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Voltage Supply Requirement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
POST Code Indicator on the LED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Physical Address Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Flash Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Linux Devices Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
PLD Revision Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
PLD Year Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
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MVME2500 Installation and Use (6806800L01H)
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PLD Month Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
PLD Day Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
PLD LED Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
PLD PCI/PMC/XMC Monitor Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
PLD U-Boot and TSI Monitor Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
PLD Boot Bank Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
PLD Test Register 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
PLD Test Register 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
PLD GPIO2 Interrupt Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
PLD Shutdown and Reset Control and Reset Reason Register . . . . . . . . . . . . . . . . . . . . . . 95
PLD Watchdog Timer Refresh Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
PLD Watchdog Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
PLD Watchdog Timer Count Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Prescaler Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Compare High Word Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100
Counter High Word Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .101
PHY Types and MII Management Bus Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .118
LBC Timing Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .120
Clock Distribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .121
System Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .122
Manufacturers’ Publications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .130
Related Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .130
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MVME2500 Installation and Use (6806800L01H)
List of Figures
Serial Number Location . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Front Panel LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Onboard LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Geographical Address Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
SMT Configuration Switch Position . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
SPI Device Multiplexing Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Battery Location . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
11
MVME2500 Installation and Use (6806800L01H)
List of Figures
12
MVME2500 Installation and Use (6806800L01H)
About this Manual
Overview of Contents
This manual is divided into the following chapters and appendices.
Introduction gives an overview of the features of the product, standard compliances,
mechanical data, and ordering information.
Hardware Preparation and Installation outlines the installation requirements, hardware
accessories, switch settings, and installation procedures.
Controls, LEDs, and Connectors describes external interfaces of the board. This includes
connectors and LEDs.
Functional Description includes a block diagram and functional description of major
components of the product.
Memory Maps and Registers contains information on system resources including system
control and status registers and external timers.
Boot System describes the boot loader software.
Programming Model contains additional programming information for the board.
Replacing the Battery contains the procedures for replacing the battery.
Related Documentation provides a listing of related product documentation,
manufacturer’s documents, and industry standard specifications.
Safety Notes summarizes the safety instructions in the manual.
Sicherheitshinweise is a German translation of the Safety Notes chapter.
Abbreviations
This document uses the following abbreviations:
Term
CPLD
DDR
DDR3
DMI
Definition
Complex Programmable Logic Device
Double Data Rate
Double Data Rate 3
Direct Media Interface
13
MVME2500 Installation and Use (6806800L01H)
About this Manual
Term
DUART
EEPROM
FCC
Definition
Dual UART
Erasable Programmable Read-Only Memory
Federal Communications Commission
GigaByte
GB
Gbit
Gbps
I/O
Gigabit
Gigabits per second
Input/Output
IEEE
Institute of Electrical and Electronics Engineers
Light Emitting Diode
LED
MHz
MCP
MRAM
OS
Megahertz
Multi-Chip Package
Magnetoresistive Random Access Memory
Operating System
PCB
Printed Circuit Board
PCI
Peripheral Component Interconnect
PCI Express
PCI-E
PCI-X
PIM
Peripheral Component Interconnect eXtended
PCI Mezzanine Card Input/Output Module
Programmable Logic Device
PCI Mezzanine Card (IEEE P1386.1)
Processor PCI Mezzanine Card
Real-Time Clock
PLD
PMC
PrPMC
RTC
RTM
SATA
UART
Rear Transition Module
Serial AT Attachment
Universal Asynchronous Receiver-Transmitter
14
MVME2500 Installation and Use (6806800L01H)
About this Manual
Term
USB
Definition
Universal Serial Bus
VITA
VME
XMC
VMEbus International Trade Association
Versa Module Eurocard
PCI Express Mezzanine Card
Conventions
The following table describes the conventions used throughout this manual.
Notation
Description
0x00000000
Typical notation for hexadecimal numbers (digits are
0 through F), for example used for addresses and
offsets
0b0000
bold
Same for binary numbers (digits are 0 and 1)
Used to emphasize a word
Screen
Used for on-screen output and code-related
elements or commands in body text
Courier + Bold
Used to characterize user input and to separate it
from system output
Reference
Used for references and for table and figure
descriptions
File > Exit
<text>
[text]
Notation for selecting a submenu
Notation for variables and keys
Notation for software buttons to click on the screen
and parameter description
...
Repeated item for example node 1, node 2, ..., node
12
.
.
.
Omission of information from example/command
that is not necessary at the time being
..
Ranges, for example: 0..4 means one of the integers
0,1,2,3, and 4 (used in registers)
15
MVME2500 Installation and Use (6806800L01H)
About this Manual
Notation
|
Description
Logical OR
Indicates a hazardous situation which, if not avoided,
could result in death or serious injury
Indicates a hazardous situation which, if not avoided,
may result in minor or moderate injury
Indicates a property damage message
No danger encountered. Pay attention to important
information
16
MVME2500 Installation and Use (6806800L01H)
About this Manual
Summary of Changes
This manual has been revised and replaces all prior editions.
Part Number
6806800L01A
6806800L01B
Publication Date
June 2010
Description
First edition
October 2010
This version includes updates and revisions
for the EA release of the MVME2500.
Table 1.3. Added mechanical data.
Table 4-3. Removed the following
commands: brd_reset, irqinfo, mac. Added
soft_reset.
Table 4-1. Removed: L2 SRAM, L1 for stack
and Boot Page entries.
Changed all instances of "via" to "through".
Impelemented editorial changes.
6806800L01C
May 2011
adding the following.
–
–
–
Added Functional Description
Applied editorial edits
6806800L01D
May 2011
Edited Memory Maps and Registers
Edited Programming Model
Edited Figure "Component Layout"
Edited Figure "Onboard LEDs"
17
MVME2500 Installation and Use (6806800L01H)
About this Manual
Part Number
6806800L01E
Publication Date
July 2011
Description
6806800L01F
August 2011
Changed title of Section 3.4.1 to Front Panel
Updated Figure "Component Layout" on
page 35 to include proper label for XMC
connectors.
6806800L01G
6806800L01H
January 2013
January 2014
18
MVME2500 Installation and Use (6806800L01H)
Chapter 1
Introduction
1.1
Overview
The MVME2500 is a VMEbus board based on the Freescale QorlQ P2010 (single-core) or P2020
(dual-core) processor. It has a 6U form-factor and has an expansion slot for an optional PCI
Mezzanine Card (PMC) or PCI eXpress Mezzanine Card (XMC). It comes with either 1 GB or 2 GB
of DDR3 SDRAM, and is offered with either IEEE 1101.10 compliant or SCANBE ejector handles.
The front panel I/O configuration consists of two RJ45 10/100/1000BASE-T Ethernet ports, a
USB 2.0 port, a Micro DB9 RS-232 serial console port, and a reset/abort switch. It also has an
LED to signal board failure and another LED that can be configured in the LED register.
The rear I/O includes support for VMEbus (Legacy VME, VME 64, VME64x, and 2eSST), rear
PMC/XMC I/O, RTM I/O (through VME P2), two 10/100/1000BASE-T Ethernet, four UART, and
RTM I2C/Presence/Power. See the table below for a summary of the features of the
MVME2500.
Table 1-1 Key Features of the MVME2500
Function
Processor
Features
Freescale QorIQ P2010 (single-core) or P2020 (dual-core)
800 MHz or 1000 MHz core frequency
512 KB L2 cache
Three 10/100/1000 Mbps enhanced three-speed Ethernet
controllers (eTSECs)
Two PCI-E 1.0a x1 interface controllers
One PCI-E 1.0a x2 interface controller
USB 2.0 interface
Enhanced secure digital host controller
DDR3 memory controller at 800 MT/s
SPI interface (four chip selects, but only two are used on the
board)
Enhanced local bus controller
UART
Two I2C interfaces
Programmable interrupt controller
Memory
1 GB or 2 GB DDR3 soldered chip memory without ECC
19
MVME2500 Installation and Use (6806800L01H)
Introduction
Table 1-1 Key Features of the MVME2500 (continued)
Function
Features
Front panel I/O
Backplane I/O
Expansion
Micro DB9 RS-232 serial console port
USB 2.0
Two RJ45 10/100/1000BASE-T Ethernet
Reset/Abort switch
Fail LED and User LED
PMC/XMC front panel I/O (optional)
VME Bus
RTM I/O (through VME P2)
PMC/XMC I/O with P4 I/O
Two 10/100/1000BASE-T Ethernet
Four UART
RTM I2C/Presence/Power
Expansion site 1:
PMC supporting PCI-X 64/33 interface
XMC supporting PCI-E 1.0a x2 interface
Expansion site 2:
SATA drive kit
Boot Flash
16 MB SPI Flash
512 KB MRAM
SDHC Socket
Persistent Data Storage
User Flash
I2C Devices
Real-Time Clock
Board Temperature Sensor
8 KB VPD EEPROM
Two 64 KB User EEPROM
CPLD
Watchdog, timers, and registers
Boot Firmware
U-Boot-based firmware image in 16 MB SPI Flash. This flash is split
into two 8 MB chips.
20
MVME2500 Installation and Use (6806800L01H)
Introduction
Table 1-1 Key Features of the MVME2500 (continued)
Function
Features
Operating System
Based from BSP provided by Freescale which is based from
standard Linux version 2.6.32-rc3
Development tool is ltib 9.1.1 (Linux Target Image Builder)
from Freescale
VxWorks
1.2
Standard Compliances
The product is designed to meet the following standards. Results are pending until testing is
finished.
Table 1-2 Board Standard Compliances
Standard
Description
EN 60950-1/A11:2009
Safety Requirements (legal)
IEC 60950-1:2005 2nd Edition
CAN/CSA C22.2 No 60950-1
FCC Part 15, Subpart B, Class A (non-
residential)
EMC requirements (legal) on system level
(predefined Emerson system)
ICES-003, Class A (non-residential)
EMC Directive 89/336/EEC
EN55022 Class B
EN55024
AS/NZS CISPR 22, Class A
EN300386
ETSI EN 300 019 series
Directive 2011/65/EU
Environmental Requirements
Directive on the restriction of the use of certain
hazardous substances in electrical and electronic
equipment (RoHS)
21
MVME2500 Installation and Use (6806800L01H)
Introduction
1.3
Mechanical Data
The following table provides details about the dimensions and weight of the board.
Table 1-3 Mechanical Data
Feature
Value
Height
233.44 mm (9.2 inches)
160.0 mm (6.3 inches)
261.8 mm (10.3 inches)
19.8 mm (0.8 inches)
Depth
Front Panel Height
Width
Max. Component Height
Weight
14.8 mm (0.58 inches)
400 grams (standard variant), 700 grams (ET variants)
1.4
Ordering Information
As of the printing date of this manual, this guide supports the models listed below.
Table 1-4 Available Board Variants
Order Number
Processor
Speed
Memory
1 GB
Ejector
MVME2500-0163
MVME2500-0161
MVME2500-0173
MVME2500-0171
MVME2500ET-0173
MVME2500ET-0171
QorIQ P2010 (single-core)
QorIQ P2010 (single-core)
QorIQ P2020 (dual-core)
QorIQ P2020 (dual-core)
QorIQ P2020 (dual-core)
QorIQ P2020 (dual-core)
800 MHz
800 MHz
1200 MHz
1200 MHz
1000 MHz
1000 MHz
IEEE
1 GB
SCANBE
IEEE
2 GB
2 GB
SCANBE
IEEE ENP2
SCANBE ENP2
2 GB
2 GB
22
MVME2500 Installation and Use (6806800L01H)
Introduction
As of the printing date of this manual, the following board accessories are available.
Table 1-5 Available Board Accessories
Order Number
Description
VME-HDMNTKIT
VME-64GBSSDKIT
MVME7216E-101
MVME7216E-102
MVME721ET-101
MVME721ET-102
VME HD mounting kit
VME 64GB SSD and mounting kit
VME RTM (IEEE handle)
VME RTM (SCANBE Handle)
VME RTM Extended Temperature (IEEE handle)
VME RTM Extended Temperature (SCANBE Handle)
Female - to -male micro-mini DB-9 to DB9 adapter cable
SERIAL-MINI-D (30-
W2400E01A)
23
MVME2500 Installation and Use (6806800L01H)
Chapter 2
Hardware Preparation and Installation
2.1
Overview
This chapter provides installation and safety instructions for this product. Installation
instructions for the optional PMC and transition module are also included.
A fully implemented MVME2500 consists of the base board plus:
PCI Mezzanine Card (PMC) or PCI-E Mezzanine Card (XMC) for added versatility
Rear transition module
SATA kit
The following are the things that need to be done before using the board. Be sure to read the
entire chapter, including all caution and warning notes, before you begin.
25
MVME2500 Installation and Use (6806800L01H)
Hardware Preparation and Installation
2.2
Unpacking and Inspecting the Board
Read all notices and cautions prior to unpacking the product.
Damage of Circuits
Electrostatic discharge and incorrect installation and removal can damage circuits or
shorten its life.
Before touching the board or electronic components, make sure that you are working
in an ESD-safe environment.
Shipment Inspection
1. Verify that you have received all items of your shipment.
2. Check for damage and report any damage or differences to customer service.
3. Remove the desiccant bag shipped together with the board and dispose of it according to
your country’s legislation.
The product is thoroughly inspected before shipment. If any damage occurred during
transportation or any items are missing, contact customer service immediately.
2.3
Requirements
Make sure the board meets the requirements specified in the next sections when the board is
operated in your particular system configuration.
26
MVME2500 Installation and Use (6806800L01H)
Hardware Preparation and Installation
2.3.1
Environmental Requirements
Operating temperatures refer to the temperature of the air circulating around the board and
not to the component temperature.
Table 2-1 Environmental Requirements
Characteristics
Commercial Versions
Extended Temperature Versions
Applicable Variants
MVME2500-0163
MVME2500-0161
MVME2500-0173
MVME2500-0171
MVME2500ET-0173
MVME2500ET-0171
1
1
Cooling Method
Forced Air 7 CFM
Forced Air 7 CFM
Operating
0°C to +55°C
-40°C to +71°C
Temperature
Storage
-40°C to +85°C
-50°C to +100°C
Vibration Sine
(10min/axis)
2 G, 5 to 2000 Hz
10 G, 15 to 2000 Hz
Vibration Random
(1hr/axis)
0.01g2/Hz, 15 to 2000 Hz
0.04g2/Hz, 15 to 2000 Hz (8
GRMS)
2
Shock
20g/11 mS
30g/11 mS
Humidity
1. ft3/min
to 95% RH (non-condensing)
to 100% RH (non-condensing)
2. Flat 15-1000Hz, -6db/octave 1000Hz - 2000Hz [MIL-STD 810F Figure 514.5C-17]
27
MVME2500 Installation and Use (6806800L01H)
Hardware Preparation and Installation
Product Damage
High humidity and condensation on the board surface causes short circuits.
Do not operate the board outside the specified environmental limits.
Make sure the board is completely dry and there is no moisture on any surface before
applying power.
2.3.2
Power Requirements
The board uses +5.0 V from the VMEbus backplane. On board power supply generates the
required voltages for the various ICs. The MVME2500 connects the +12 V and -12 V supplies
from the backplane to the PMC sites, while the +3.3 V power supplied to the PMC sites comes
from the +5.0 V backplane power. A maximum of 10 A of +3.3 V power is available to the PMC
sites, however the 90 W +5.0 V limit must be observed as well as any cooling limitations.
The following table provides an estimate of the typical and maximum power required.
Table 2-2 Power Requirements
Board Variant
Maximum (Calculated)
Typical (Measured Operating)
MVME2500-0163
MVME2500-0161
MVME2500-0173
MVME2500-0171
MVME2500ET-0173
MVME2500ET-0171
18.5 W
18.5 W
24 W
14.8 W
14.8 W
16.6 W
16.6 W
16.6 W
16.6 W
24 W
24 W
24 W
The power is measured when the board is in standby (Linux prompt). Power will significantly
increase when adding hard drives or a XMC/PMC card.
28
MVME2500 Installation and Use (6806800L01H)
Hardware Preparation and Installation
The following table shows the power available when the MVME2500 is installed in either a
three row or five row chassis and when PMCs are present.
Chassis Type
Three Row
Five Row
Available Power
70 W maximum
90 W maximum
Power With PMCs
below 70 W
below 90 W
Keep below power limit. Cooling limitations must be considered.
2.3.3
Equipment Requirements
The following are recommended to complete a MVME2500 system:
VMEbus system enclosure
System console terminal
Operating system (and/or application software)
Transition module and connecting cables
2.4
Configuring the Board
The board provides software control over most options. Settings can be modified to fit the
user's specifications. To configure, set the bits in the control register after installing the board
in a system. Make sure that all user-defined switches are properly set before installing a
29
MVME2500 Installation and Use (6806800L01H)
Hardware Preparation and Installation
2.5
Installing Accessories
2.5.1
Rear Transition Module
The MVME2500 does not support hot swap. Remove power to the rear slot or system before
installing the module. A PCMI/O Module (PIM) needs to be manually configured and installed
before placing the transition module.
Damage of Circuits
Electrostatic discharge and incorrect installation and removal can damage circuits or
shorten its life.
Before touching the board or electronic components, make sure that you are working
in an ESD-safe environment.
Product Damage
Only use injector handles for board insertion to avoid damage to the front panel and/or
PCB. Deformation of the front panel can cause an electrical short or other board
malfunction.
Board Malfunction
Switches marked as “reserved” might carry production-related functions and can cause
the board to malfunction if their setting is changed.
Do not change settings of switches marked as “reserved”. The setting of switches which
are not marked as “reserved” has to be checked and changed before board installation.
Installation and Removal Procedure
1. Turn OFF all equipment and disconnect the power cable from the AC power source.
2. Remove the chassis cover.
3. Remove the filler panel(s) from the appropriate card slot(s) at the rear of the chassis (if the
chassis has a rear card cage).
30
MVME2500 Installation and Use (6806800L01H)
Hardware Preparation and Installation
4. Install the top and bottom edge of the transition module into the rear guides of the chassis.
5. Ensure that the levers of the two injector/ejectors are in the outward position.
6. Slide the transition module into the chassis until resistance is felt.
7. Move the injector/ejector levers in an inward direction.
8. Verify that the transition module is properly seated and secure it to the chassis using the
two screws adjacent to the injector/ejector levers.
9. Connect the cables to the transition module.
To remove the transition module from the chassis, reverse the procedure and press the red
locking tabs (IEEE handles only) to extract the board.
2.5.2
PMC/XMC Support
Installation Procedure
Read all notices and follow these steps to install a PMC on the baseboard.
Damage of Circuits
Electrostatic discharge and incorrect installation and removal can damage circuits or
shorten its life.
Before touching the board or electronic components, make sure that you are working
in an ESD-safe environment.
Product Damage
Inserting or removing modules with power applied may result in damage to module
components.
Before installing or removing additional devices or modules, read the documentation
that came with the product.
31
MVME2500 Installation and Use (6806800L01H)
Hardware Preparation and Installation
1. Attach an ESD strap to your wrist. Attach the other end of the strap to the chassis as a
ground. Make sure that it is securely fastened throughout the procedure.
2. Remove the PMC/XMC filler plate from the front panel cut-out.
3. Slide the front bezel of the PMC/XMC into the cut-out from behind. The front bezel of the
PMC/XMC module will be flushed with the board when the connectors on the module align
with the mating connectors on the board.
4. Align the mating connectors properly and apply minimal pressure to the PMC/XMC until it
is seated to the board.
5. Insert the four PMC/XMC mounting screws through the mounting holes on the bottom side
of the board, and then thread the four mount points on the PMC/XMC. Tighten the screws.
6. Install the board into the appropriate card slot. Make sure that the board is well seated into
the backplane connectors. Do not damage or bend connector pins.
7. Replace the chassis or system cover.
8. Reconnect the system to the power source and then turn on the system.
When removing the PMC/XMC, hold it by its long side and exert minimal force when pulling
it from the baseboad to prevent pin damage.
2.6
Installing and Removing the Board
This section describes the recommended procedure for installing the board in a chassis. Read
all warnings and instructions before installing the board.
The MVME2500 does not support hot swap. Power off the slot or system and make sure that
the serial ports and switches are properly configured.
32
MVME2500 Installation and Use (6806800L01H)
Hardware Preparation and Installation
Damage of Circuits
Electrostatic discharge and incorrect installation and removal can damage circuits or
shorten its life.
Before touching the board or electronic components, make sure that you are working
in an ESD-safe environment.
Product Damage
Only use injector handles for board insertion to avoid damage to the front panel and/or
PCB. Deformation of the front panel can cause an electrical short or other board
malfunction.
1. Attach an ESD strap to your wrist. Attach the other end of the strap to an electrical ground.
Make sure that it is securely fastened throughout the procedure.
2. Remove VME filler panels from the VME enclosures, as appropriate.
3. Install the top and bottom edge of the board into the guides of the chassis.
4. Ensure that the levers of the two injector/ejectors are in the outward position.
5. Slide the board into the chassis until resistance is felt.
6. Simultaneously move the injector/ejector levers in an inward direction.
7. Verify that the board is properly seated and secure it to the chassis using the two screws
located adjacent to the injector/ejector levers.
8. Connect the appropriate cables to the board.
To remove the board from the chassis, reverse the procedure and press the red locking tabs
(IEEE handles only) to extract the board.
33
MVME2500 Installation and Use (6806800L01H)
Hardware Preparation and Installation
2.7
Completing the Installation
The board is designed to operate as an application-specific computer blade or an intelligent I/O
board/carrier. It can be used in any slot in a VME chassis. Once the board is installed, you are
ready to connect peripherals and apply power to the board.
Product Damage
RJ-45 connectors on modules are either twisted-pair Ethernet (TPE) or E1/T1/J1
network interfaces. Connecting an E1/T1/J1 line to an Ethernet connector may damage
your system.
Make sure that TPE connectors near your working area are clearly marked as network
connectors.
Verify that the length of an electric cable connected to a TPE bushing does not exceed
100 meters.
Make sure the TPE bushing of the system is connected only to safety extra low voltage
circuits (SELV circuits).
If in doubt, ask your system administrator.
The console settings for the MVME2500 are:
Eight bits per character
One stop bit per character
Parity disabled (no parity)
Baud rate of 9600 baud
Verify that hardware is installed and the power/peripheral cables connected are appropriate
for your system configuration.
Replace the chassis or system cover, reconnect the chassis to power source, and turn the
equipment power on.
34
MVME2500 Installation and Use (6806800L01H)
Controls, LEDs, and Connectors
3.2.1
Reset Switch
The MVME2500 has a single push button switch that has both the abort and reset functions.
Pressing the switch for less than three seconds generates an abort interrupt to the P20x0 QorIQ
PIC. Holding it down for more than three seconds will generate a hard reset. The VME SYSRESET
is generated if the MVME2500 is the VMEbus system controller.
3.3
LEDs
The MVME2500 utilizes light emitting diodes (LEDs) to provide a visible status indicator on the
front panel. These LEDs show power failures, power up states, Ethernet link/speed, ethernet
activity, SATA link and activity and PCI-E valid lane status. There are also a few user configurable
LEDs. Each LED description is necessary for troubleshooting and debugging.
3.3.1
Front Panel LEDs
The front panel LEDs are listed below.
Figure 3-3
Front Panel LEDs
37
MVME2500 Installation and Use (6806800L01H)
Controls, LEDs, and Connectors
Table 3-1 Front Panel LEDs
Label
Function
Location
Color
Description
By default
USER 1
User Defined
Front panel
Off
Yellow
User Software Controllable. Refer to
the "User LED Register."
User Software Controllable. Refer to
the "User LED Register."
Red
Off
FAIL
Board Fail
Front panel
Normal operation after successful
firmware boot.
One or more on-board power rails
has failed and the board has
Red
shutdown to protect the hardware.
Normal during power up, during
hardware reset (such as a front panel
reset). May be asserted by the BDFAIL
bit in the Tsi148 VSTAT register.
GENET1
SPEED
TSEC1
Link/Speed
Front panel
Integrated
RJ45 LED
Off
No link
Amber
Green
10/100BASE-T operation
1000 BASE-T operation
GENET1
ACT
TSEC1
Activity
Front panel
Integrated
RJ45 LED
Off
No activity
Blinking Green Activity proportional to bandwidth
utilization
GENET2
SPEED
TSEC2
Link/Speed
Front panel
Integrated
RJ45 LED
(Left)
Off
No link
Amber
Green
10/100BASE-T operation
1000BASE-T operation
GENET2
ACT
TSEC2
Activity
Front panel
Integrated
RJ45 LED
Off
No activity
Blinking Green Activity proportional to bandwidth
utilization
38
MVME2500 Installation and Use (6806800L01H)
Controls, LEDs, and Connectors
3.3.2
Onboard LEDs
Figure 3-4 Onboard LEDs
Table 3-2 Onboard LEDs Status
Label
D9
Function
Color
Red
Description
Power Fail
This indicator is illuminated when one or more of the on-
board voltage rails fails.
D33
D34
D35
User Defined
User Defined
User Defined
Amber
Amber
Amber
Controlled by the FPGA. Used for boot-up sequence
indicator.
Controlled by the FPGA. Used for boot-up sequence
indicator.
Controlled by the FPGA. Used for boot-up sequence
indicator.
D36
D37
D38
Early Power Fail Amber
This indicator is lit when the early 3.3V power supply fails.
Controlled by the FPGA
User Defined
User Defined
Amber
Amber
Controlled by the FPGA
3.4
Connectors
This section describes the pin assignments and signals for the connectors on the MVME2500.
39
MVME2500 Installation and Use (6806800L01H)
Controls, LEDs, and Connectors
3.4.1
Front Panel Connectors
The following connectors are found on the outside of the MVME2500. These connectors are
divided between the front panel connectors and the backplane connectors. The front panel
connectors include the J1 and J5 connectors. The backplane connectors include the P1 and P2
connectors.
3.4.1.1 RJ45 with Integrated Magnetics (J1)
The MVME2500 uses an X2 RJ45.
Table 3-3 Front Panel Tri-Speed Ethernet Connector (J1)
Pin Name
1A
Signal Description
GND
2A
NC
3A
Port A TRD3 -
4A
Port A TRD3 +
5A
Port A TRD2 -
6A
Port A TRD2 +
7A
Port A TRD1 -
8A
Port A TRD1 +
9A
Port A TRD0 -
10A
D1A
D2A
D3A
D4A
1B
Port A TRD0 +
Port A Green LED1 Anode/ Yellow LED1 Cathode
Port A Yellow LED1 Anode/ Green LED1 Cathode
Port A Green LED2 Anode/ Yellow LED2 Cathode
Port A Yellow LED2 Anode/ Green LED2 Cathode
GND
2B
NC
3B
Port B TRD3 -
Port B TRD3 +
Port B TRD2 -
4B
5B
40
MVME2500 Installation and Use (6806800L01H)
Controls, LEDs, and Connectors
Table 3-3 Front Panel Tri-Speed Ethernet Connector (J1) (continued)
Pin Name
6B
Signal Description
Port B TRD2 +
Port B TRD1 -
Port B TRD1 +
Port B TRD0 -
Port B TRD0 +
7B
8B
9B
10B
D1B
D2B
D3B
D4B
Port B Green LED1Anode/ Yellow LED1 Cathode
Port B Yellow LED1 Anode/ Green LED1 Cathode
Port B Green LED2Anode/ Yellow LED2 Cathode
Port B Yellow LED2 Anode/ Green LED2 Cathode
3.4.1.2 Front Panel Serial Port (J4)
There is one front access asynchronous serial port interface that is routed to the micro mini DB-
9 front panel connector. A male-to-male micro-mini DB9 adapter cable is available under
Emerson part number SERIAL-MINI-D (30-W2400E01A). The pin assignments for these
connectors are as follows:
Table 3-4 Front Panel Serial Port (J4)
Pin
1
Signal Description
NC
2
RX
3
TX
4
NC
5
GND
NC
6
7
RTS
CTS
NC
8
9
41
MVME2500 Installation and Use (6806800L01H)
Controls, LEDs, and Connectors
3.4.1.3 USB Connector (J5)
The MVME2500 uses upright USB receptable mounted in the front panel.
Table 3-5 USB Connector (J5)
Pin Name
Signal Description
+5 V
1
2
Data -
3
Data +
4
GND
MTG
MTG
MTG
MTG
Mounting Ground
Mounting Ground
Mounting Ground
Mounting Ground
3.4.1.4 VMEBus P1 Connector
The VME P1 connector is a 160-pin DIN. The P1 connector provides power and VME signals for
24-bit address and 16-bit data. The pin assignments for the P1 connector is as follows:
Table 3-6 VMEbus P1 Connector
Pin
1
Row A
DATA 0
DATA 1
DATA 2
DATA 3
DATA 4
DATA 5
DATA 6
DATA 7
GND
Row B
Row C
Row D
+5V
GND
NC
Row Z
NC
BBSY
DATA 8
DATA 9
DATA 10
DATA 11
DATA 12
DATA 13
DATA 14
DATA 15
GND
2
BCLR
GND
NC
3
ACFAIL
BGIN0
BGOUT0
BGIN1
BGOUT1
BGIN2
BGOUT2
4
NC
GND
NC
5
NC
6
NC
GND
NC
7
NC
8
NC
GND
NC
9
GAP
42
MVME2500 Installation and Use (6806800L01H)
Controls, LEDs, and Connectors
Table 3-6 VMEbus P1 Connector (continued)
Pin
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Row A
SYSCLK
GND
Row B
BGIN3
BGOUT3
BR0
Row C
Row D
GA0
Row Z
GND
NC
SYSFAIL
BERR
GA1
DS1
SYSRESET
LWORD
AM 5
+3.3V (not used) GND
GA2 NC
+3.3V (not used) GND
GA3 NC
+3.3V (not used) GND
GA4 NC
+3.3V (not used) GND
NC NC
+3.3V (not used) GND
NC NC
+3.3V (not used) GND
NC NC
+3.3V (not used) GND
NC NC
+3.3V (not used) GND
NC NC
+3.3V (not used) GND
NC NC
DS0
BR1
WRITE
GND
BR2
BR3
ADD 23
ADD 24
ADD 25
ADD 26
ADD 27
ADD 28
ADD 29
ADD 30
ADD 31
ADD 32
ADD 33
ADD 34
ADD 35
ADD 36
ADD 37
ADD 38
+12V
DTACK
GND
AM 0
AM 1
AM 2
AM 3
GND
NC
AS
GND
IACK
IACKIN
IACKOUT
AM 4
NC
GND
IRQ7
IRQ6
IRQ5
IRQ4
IRQ3
IRQ2
IRQ1
NC
ADD 7
ADD 6
ADD 5
ADD 4
ADD 3
ADD 2
ADD 1
-12V
+3.3V (not used) GND
+12V
+5V
+5V
+5V
+5V
43
MVME2500 Installation and Use (6806800L01H)
Controls, LEDs, and Connectors
3.4.1.5 VMEBus P2 Connector
The VME P2 connector is a 160-pin DIN. Row B of the P2 connector provides power to the
MVME2500 and to the upper eight VMEbus address lines and additional 16 VMEbus data lines.
The Z, A, C, and D pin assignments for the P2 connector are the same for both the MVME2500
and MVME7216E/ MVME721E, and are as follows:
Table 3-7 VMEbus P2 Connector
Pin
1
Row A
Row B
Row C
Row D
Row Z
PMC IO 2
PMC IO 4
PMC IO 6
PMC IO 8
PMC IO 10
PMC IO 12
PMC IO 14
PMC IO 16
PMC IO 18
PMC IO 20
PMC IO 22
PMC IO 24
PMC IO 26
PMC IO 28
PMC IO 30
PMC IO 32
PMC IO 34
PMC IO 36
PMC IO 38
PMC IO 40
PMC IO 42
PMC IO 44
+5V
PMC IO 1
PMC IO 3
PMC IO 5
PMC IO 7
PMC IO 9
PMC IO 11
PMC IO 13
PMC IO 15
PMC IO 17
PMC IO 19
PMC IO 21
PMC IO 23
PMC IO 25
PMC IO 27
PMC IO 29
PMC IO 31
PMC IO 33
PMC IO 35
PMC IO 37
PMC IO 39
PMC IO 41
PMC IO 43
GE3_0 +
GE3_0 -
GND
Serial 1 RX
GND
2
GND
3
RETRY
Serial 1 TX
GND
4
ADDRESS 24
ADDRESS 25
ADDRESS 26
ADDRESS 27
ADDRESS 28
ADDRESS 29
ADDRESS 30
ADDRESS 31
GND
GE3_1 +
GE3_1 -
GND
5
Serial 1 CTS
GND
6
7
GE3_2 +
GE3_2 -
GND
Serial 1 RTS
GND
8
9
Serial 2 RX
GND
10
11
12
13
14
15
16
17
18
19
20
21
22
GE3_3 +
GE3_3 -
GND
Serial 2 TX
GND
+5V
I2C DATA
I2C CLK
Serial 2 CTS
GND
DATA 16
DATA 17
DATA 18
DATA 19
DATA 20
DATA 21
DATA 22
DATA 23
GND
GE3_LINK_ LED Serial 2 RTS
GE3_ACT_LED
GE4_LINK_LED
GE4_A_LED
GND
GND
Serial 3 RX
GND
Serial 3 TX
GND
GE4_3 -
GE4_3 +
Serial 3 CTS
GND
GND
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MVME2500 Installation and Use (6806800L01H)
Controls, LEDs, and Connectors
Table 3-7 VMEbus P2 Connector (continued)
Pin
23
24
25
26
27
28
29
30
31
32
Row A
Row B
Row C
Row D
GE4_2 -
GE4_2+
GND
Row Z
PMC IO 46
PMC IO 48
PMC IO 50
PMC IO 52
PMC IO 54
PMC IO 56
PMC IO 58
PMC IO 60
PMC IO 62
PMC IO 64
DATA 24
DATA 25
DATA 26
DATA 27
DATA 28
DATA 29
DATA 30
DATA 31
GND
PMC IO 45
PMC IO 47
PMC IO 49
PMC IO 51
PMC IO 53
PMC IO 55
PMC IO 57
PMC IO 59
PMC IO 61
PMC IO 63
Serial 3 RTS
GND
Serial 4 RX
GND
GE4_1 -
GE4_1 +
GND
Serial 4 TX
GND
GE4_0 -
GE4_0 +
GND
Serial 4 CTS
GND
Serial 4 RTS
GND
+5V
+5V
3.4.2
Onboard Connectors
3.4.2.1 Flash Program Connector (P7)
The Flash Program Connector is depopulated in the production version of the MVME2500.
However, each pin is exposed for the 60-pin header connector for the JTAG boundary scan.
Table 3-8 Flash Programming Header (P7)
Pin
1
Signal Description
HOLD 1
2
Chip Select 1
Chip Select 0
Programmer's VCC
Master In Slave OUT (MISO)
HOLD 0
3
4
5
6
7
Keying
8
CLOCK
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MVME2500 Installation and Use (6806800L01H)
Controls, LEDs, and Connectors
Table 3-8 Flash Programming Header (P7) (continued)
Pin
Signal Description
GND
10
Master OUT Slave IN (MOSI)
3.4.2.2 SATA Connector (J3)
The onboard customized SATA connector is compatible with the Emerson SATA kit, namely
VME-64GBSSDKIT and IVME7210-MNTKIT.
Table 3-9 Custom SATA Connector (J3)
Pin
1
Signal Description
GND
Pin
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
Signal Description
GND
2
GND
SATA POWER ENABLE
3
NC
NC
4
SATA TX +
NC
SATA DETECT
NC
5
6
SATA TX -
GND
GND
NC
7
8
GND
GND
GND
GND
+3.3V
+5V
9
GND
10
11
12
13
14
15
16
17
18
GND
NC
SATA RX -
NC
+3.3V
+5V
SATA RX +
GND
+3.3V
+5V
GND
NC
+3.3V
+5V
GND
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MVME2500 Installation and Use (6806800L01H)
Controls, LEDs, and Connectors
Table 3-9 Custom SATA Connector (J3) (continued)
Pin
19
20
Signal Description
Pin
39
40
Signal Description
NC
+3.3V
+5V
GND
3.4.2.3 PMC Connectors
The MVME2500 supports only one PMC site. It utilizes J14 to support PMC I/O that goes to the
the location of the PMC connectors.
Table 3-10 PMC J11 Connector
Pin
1
Signal Description
JTAG TCK
-12V
Pin
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
Signal Description
FRAME
GND
2
3
GND
GND
4
INT A
IRDY
5
INT B
DEVSEL
+5V
6
INT C
7
PRESENT SIGNAL
+5V
PCIXCAP
LOCK
8
9
INT D
NC
10
11
12
13
14
15
16
17
NC
NC
GND
PAR
NC
GND
PCI CLK
GND
+3.3V
AD 15
AD 12
AD 11
AD 9
GND
GNT A
REQ A
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MVME2500 Installation and Use (6806800L01H)
Controls, LEDs, and Connectors
Table 3-10 PMC J11 Connector (continued)
Pin
18
Signal Description
+5V
Pin
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
Signal Description
+5V
19
20
21
22
23
24
25
26
27
28
29
30
31
32
+3.3V
AD 31
AD 28
AD 27
AD 25
GND
GND
CBE0
AD 6
AD 5
AD 4
GND
GND
+3.3V
AD 3
CBE3
AD 22
AD 21
AD 19
+5V
AD 2
AD 1
AD 0
+5V
+3.3V
AD 17
GND
REQ64
Table 3-11 PMC J12 Connector
Pin
1
Signal Description
+12V
Pin
33
34
35
36
37
38
39
40
41
Signal Description
GND
2
JTAG TRST
JTAG TMS
JTAG TDO
JTAG TDI
GND
IDSELB
TRDY
3
4
+3.3V
5
GND
6
STOP
7
GND
PERR
8
NC
GND
9
NC
+3.3V
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MVME2500 Installation and Use (6806800L01H)
Controls, LEDs, and Connectors
Table 3-11 PMC J12 Connector (continued)
Pin
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Signal Description
Pin
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
Signal Description
SERR
NC
BUSMODE2 (Pulled UP)
CBE1
+3.3V
GND
PCI RESET
AD 14
AD 13
M66EN
AD 10
AD 8
BUSMODE3 (PULLED DWN)
+3.3V
BUSMODE4 (PULLED DWN)
NC
GND
+3.3V
AD 7
AD 30
AD 29
GND
REQB
+3.3V
GNTB
NC
AD 26
AD 24
+3.3V
IDSEL
AD 23
+3.3V
AD 28
AD 18
GND
GND
NC
EREADY
GND
RSTOUT
ACK64
+3.3V
GND
AD 16
CBE2
NC
Table 3-12 PMC J13 Connector
Pin
1
Signal Description
NC
Pin
33
Signal Description
GND
49
MVME2500 Installation and Use (6806800L01H)
Controls, LEDs, and Connectors
Table 3-12 PMC J13 Connector (continued)
Pin
Signal Description
GND
Pin
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
Signal Description
AD48
AD 47
AD 52
AD 45
GND
2
3
GND
4
CBE7
CBE6
CBE5
CBE4
GND
5
6
7
+3.3V
AD 40
AD 43
AD 42
AD 41
GND
8
9
+3.3V
PAR64
+3.3V
AD 62
AD 61
GND
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
GND
AD 40
AD 39
AD 38
AD 37
GND
GND
AD 60
AD 59
AD 58
AD 57
GND
GND
AD 36
AD 35
AD 34
AD 33
GND
+3.3V
AD 56
AD 55
AD 54
AD 53
GND
+3.3V
AD 32
NC
GND
GND
NC
50
MVME2500 Installation and Use (6806800L01H)
Controls, LEDs, and Connectors
Table 3-12 PMC J13 Connector (continued)
Pin
29
30
31
32
Signal Description
AD 51
Pin
61
62
63
64
Signal Description
NC
AD 50
GND
GND
NC
AD 49
GND
Table 3-13 PMC J14 Connector
Pin
1
Signal Description
PMC IO 1
Pin
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
Signal Description
PMC IO 33
PMC IO 34
PMC IO 35
PMC IO 36
PMC IO 37
PMC IO 38
PMC IO 39
PMC IO 40
PMC IO 41
PMC IO 42
PMC IO 43
PMC IO 44
PMC IO 45
PMC IO 46
PMC IO 47
PMC IO 48
PMC IO 49
PMC IO 50
PMC IO 51
PMC IO 52
2
PMC IO 2
3
PMC IO 3
4
PMC IO 4
5
PMC IO 5
6
PMC IO 6
7
PMC IO 7
8
PMC IO 8
9
PMC IO 9
10
11
12
13
14
15
16
17
18
19
20
PMC IO 10
PMC IO 11
PMC IO 12
PMC IO 13
PMC IO 14
PMC IO 15
PMC IO 16
PMC IO 17
PMC IO 18
PMC IO 19
PMC IO 20
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MVME2500 Installation and Use (6806800L01H)
Controls, LEDs, and Connectors
Table 3-13 PMC J14 Connector (continued)
Pin
21
Signal Description
PMC IO 21
Pin
53
54
55
56
57
58
59
60
61
62
63
64
Signal Description
PMC IO 53
PMC IO 54
PMC IO 55
PMC IO 56
PMC IO 57
PMC IO 58
PMC IO 59
PMC IO 60
PMC IO 61
PMC IO 62
PMC IO 63
PMC IO 64
22
23
24
25
26
27
28
29
30
31
32
PMC IO 22
PMC IO 23
PMC IO 24
PMC IO 25
PMC IO 26
PMC IO 27
PMC IO 28
PMC IO 29
PMC IO 30
PMC IO 31
PMC IO 32
3.4.2.4 JTAG Connector (P6)
The JTAG Connector can be used in conjunction with the JTAG board and ASSET hardware.
Table 3-14 JTAG Connector (P6)
Pin
1
Signal Description
NC
Pin
2
Signal Description
+3.3V FROM +5V
SPI CS 0
3
SPI HOLD 0
SPI CLK
4
5
6
SPI CS 1
7
SPI HOLD 1
SPI MISO
8
SPI MOSI
9
10
12
14
16
18
GND
11
13
15
17
SPI VCC
SCAN 1 TCK
GND
SCAN 1 TDI
SCAN 1 TRST
SCAN 1 TMS
SCAN 1 TDO
+3.3V
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MVME2500 Installation and Use (6806800L01H)
Controls, LEDs, and Connectors
Table 3-14 JTAG Connector (P6) (continued)
Pin
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
Signal Description
GPO0
Pin
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
Signal Description
NC
NC
SCAN 2 TMS
SCAN 2 TDO
+3.3V FROM +5V
SCAN 2 TDI
NC
NC
SCAN 2 TCK
GND
NC
SCAN 3 TMS
SCAN 3 TDO
+2.5V
SCAN 3 TCK1
SCAN 3 TCK 2
SCAN 3 TCK 3
GND
SCAN 3 TDI
SCAN 3 TRST
SCAN 4 TCK 1
GND
SCAN 3 TCK3
SCAN 4 TMS
SCAN 4 TDO
+3.3V
SCAN 4 TCK 2
GND
SCAN 4 TDI
SCAN 4 TRST
SCAN 5
SCAN 4 TCK 3
SCAN 5 TMS
SCAN 5 TDO
+3.3V
GND
SCAN5 TCK2
GND
SCAN 5 TDI
SCAN 5 TRST
NC
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MVME2500 Installation and Use (6806800L01H)
Controls, LEDs, and Connectors
3.4.2.5 COP Connector (P6)
The COP header is used for the CPU debug. The pin assignment is dictated by Freescale and is
compatible with the processor’s debugging tool.
Table 3-15 COP Header (P10)
Pin
1
Signal Description
JTAG TDI
2
COP QACK
3
JTAG TDO
4
COP TRST
5
COP RUNSTOP (Pulled UP)
COP VDD SENSE
JTAG TCK
6
7
8
COP CHECK STOP IN
JTAG TMS
9
10
11
12
13
14
15
16
NC
P2020 SW RESET
COP PRESENT
COP HARD RESET
KEYING
COP CHECK STOP OUT
GND
3.4.2.6 SD Connector (J2)
Table 3-16 SD Connector (J2)
Pin
1
Signal Description
DATA 3
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MVME2500 Installation and Use (6806800L01H)
Controls, LEDs, and Connectors
Table 3-16 SD Connector (J2) (continued)
Pin
2
Signal Description
COMMAND
GND
3
4
VCC (+3.3V)
CLOCK
5
6
GND
7
DATA 0
8
DATA 1
9
DATA 2
10
11
12
WRITE PROTECT
CARD DETECT
GND
3.4.2.7 XMC Connector (XJ2)
The MVME2500 has one XMC connector (XJ2) that supports XMC cards with J15 connector. It
can also support XMC cards with J16 connector without encountering any mechanical
interference.
Table 3-17 XMC Connector (XJ2) Pinout
Pin
1
Row A
RX0 +
GND
NC
Row B
RX0 -
GND
NC
Row C
Row D
RX1+
GND
NC
Row E
RX1 -
GND
NC
Row F
+3.3V
HRESET
+3.3V
+3.3V
2
JTAG TRST
+3.3V
3
4
GND
GND
JTAG TCK
GND
GND
MRSTO
(PULLED UP)
5
6
7
8
NC
NC
+3.3V
NC
NC
+3.3V
+12V
+3.3V
-12V
GND
NC
GND
NC
JTAG TMS
+3.3V
GND
NC
GND
NC
GND
GND
JTAG TMS
GND
GND
55
MVME2500 Installation and Use (6806800L01H)
Controls, LEDs, and Connectors
Table 3-17 XMC Connector (XJ2) Pinout (continued)
Pin
9
Row A
NC
Row B
NC
Row C
NC
Row D
NC
Row E
NC
Row F
+3.3V
GA 0
10
11
GND
TX0
GND
TX0 -
JTAG TDO
GND
TX1 +
GND
TX1 -
BIST (PULLED
UP)
+3.3V
12
13
14
15
16
GND
NC
GND
NC
GA 1
NC
GND
NC
GND
NC
PRESENT
+3.3V
GND
NC
GND
NC
GA 2
NC
GND
NC
GND
NC
I2C DATA
+3.3V
GND
GND
MVMRO
(PULLED
DOWN)
GND
GND
I2C CLOCK
17
18
19
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
GND
CLK +
GND
CLK -
GND
NC
GND
ROOT0
(PULLED UP)
3.4.2.8 Miscellaneous P2020 Debug Connectors
Table 3-18 P20x0 Debug Header
Pin
1
Signal Description
MSRCDI0
GND
2
3
MSRCDI1
MDVAL
4
5
MSRCDI2
TRIG_OUT
MSRCDI3
6
7
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MVME2500 Installation and Use (6806800L01H)
Controls, LEDs, and Connectors
Table 3-18 P20x0 Debug Header (continued)
Pin
8
Signal Description
TRIG_IN
9
MSRCID4
GND
10
3.5
Switches
These switches control the configuration of the MVME2500.
Board Malfunction
Switches marked as “reserved” might carry production-related functions and can cause
the board to malfunction if their settings are changed.
Do not change settings of switches marked as “reserved”. The setting of switches which
are not marked as “reserved” has to be checked and changed before board installation.
3.5.1
Geographical Address Switch (S1)
The Tsi148 VMEbus Status Register provides the VMEbus geographical address of the
MVM2500. The switch reflects the inverted states of the geographical address signals.
Applications not using the five row backplane can use the geographical address switch to
assign a geographical address based on the following diagram.
57
MVME2500 Installation and Use (6806800L01H)
Controls, LEDs, and Connectors
Note that this switch is wired in parallel with the geographical address pins on the 5-row
connector. These switches must be in the "OFF" position when installed in a 5-row chassis in
order to get the correct address from the P1 connector. This switch also includes the SCON
control switches.
Figure 3-5
Geographical Address Switch
Table 3-19 Geographical Address Switch
Position
S1-1
S1-2
S1-3
S1-4
S1-5
S1-6
S1-7
S1-8
Function
Default
1
VME SCON Auto
Auto-SCON
2
VME SCON SEL
Non-SCON
GAP
1
1
1
1
1
1
GAP4
GAP3
GAP2
GAP1
GAP0
1. The VME SCON MAN switch is "OFF" to select Auto-SCON mode. The switch is "ON" to select
manual SCON mode whichworks in conjunction with the VME SCON SEL switch.
2. The VME SCON SEL switch is OFF to select non-SCON mode. The switch is ON to select always
SCON mode. This switch is only effective when the VME SCON MAN switch is "ON".
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MVME2500 Installation and Use (6806800L01H)
Controls, LEDs, and Connectors
3.5.2
SMT Configuration Switch (S2)
This eight position SMT configuration switch controls the flash bank write-protect, selects the
flash boot image, and controls the safe start ENV settings. The default setting on all switch
Figure 3-6
SMT Configuration Switch Position
Table 3-20 Geographical Address Switch Settings
SW2
1
DEFAULT
Signal Name
Description
Notes
OFF (Normal Env)
NORMAL_ENV
Safe Start ("ON"= Use
normal ENV, "OFF"= Use
safe ENV)
2
3
4
OFF (Flash Block A)
OFF (WP Disabled)
OFF (PMC)
BOOT_BLOCK_A
FLASH_WP_N
PMC_XMC_SEL
Boot Block B Select
SPI Flash Write-Protect
XMC or PMC selection
switch
Will select if XMC card or
PMC card is used
5
OFF (133 MHz)
PMC_133
PCI frequency selection
59
MVME2500 Installation and Use (6806800L01H)
Controls, LEDs, and Connectors
Table 3-20 Geographical Address Switch Settings (continued)
SW2
6
DEFAULT
Signal Name
Description
Notes
OFF (WP Enabled)
MASTER_WP_DISA Write-Protect Disable
For I2C write-protect only.
BLED
switch
7
OFF (Front)
GBE_MUX_SEL
User Defined switch that
will select if the GBE PHY
will function on the front
panel or on the Back
PLANE
8
OFF (CPU Reset
Deasserted)
Reserved
Should be "OFF" for normal
operation.
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MVME2500 Installation and Use (6806800L01H)
Chapter 4
Functional Description
4.1
Block Diagram
access to one serial port via a micro-mini DB-9 connector, two 10/100/1000 Ethernet port
(one is configurable to be routed on the front panel or to the rear panel) through a ganged RJ45
connector and one Type A USB Port. It includes Board Fail LED indicator, user-defined LED
indicator and a ABORT/RESET switch.
Figure 4-1
Block Diagram
4.2
Chipset
The MVME2500 utilizes the QorIQ P20x0 integrated processor. It offers an excellent
combination of protocol and interface support including dual high performance CPU cores, a
large L2 cache, a DDR2/DDR3 memory controller, three enhanced three-speed Ethernet
controllers, two Serial RapidIO interfaces with a messaging unit, a secure digital interface, a
USB 2.0 interface and three PCI express controllers.
61
MVME2500 Installation and Use (6806800L01H)
Functional Description
This section describes the protocol and interfaces provided in the QorIQ P20x0 integrated and
is utilized by the MVME2500.
4.2.1
4.2.2
e500 Processor Core
The QorIQ integrated processors offer dual high performance e500v2 core (P2020) and a
single e500v2 core (P2010). It operates from 800 MHz up to 1.2GHz core frequency. The e500
processor core is a low-power implementation of the family of reduced instruction set
computing (RISC) embedded processor that implement the Book E definition of the PowerPC
architecture. The e500 is a 32-bit implementation of the Book E architecture using the lower
words of 64-bit general-purpose registers (GPRs) while E500v2 uses 36 bit physical addressing
and some improvement from the previous version.
Integrated Memory Controller
A fully programmable DDR SDRAM controller supports most JEDEC standard DDR2 and DDR3
memories available. Unbuffered registered DIMMs are also supported. A built-in error checking
and correction (ECC) ensures very low bit-error rates for reliable high-frequency operation.
Though ECC is not implemented on MVME2500, the board includes a place holder for
additional chips for ECC whenever it is needed in the future.
The memory controller supports the following:
16 GB of memory
Asynchronous clocking from platform clock, with programmable settings that meets all
the SDRAM timing parameters.
Up to four physical banks; each bank can be independently addressed to 64 Mbit to 4 Gbit
memory devices (depending on the internal device configuration with x8/x16/x32 data
ports).
Chip set interleaving and partial array self-refresh.
Data mask signal and read-modify-write for sub-double-word writes when ECC is enabled.
Double-bit error detection and single-bit error correction ECC, 8-bit check work across 64-
bit data.
Address parity for registered DIMMs.
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MVME2500 Installation and Use (6806800L01H)
Functional Description
Automatic DRAM initialization sequence or software-controlled initialization sequence
and automatic DRAM data initialization.
Write leveling for DDR3 memories and supports up to eight posted refreshes.
4.2.3
4.2.4
PCI Express Interface
The PCI Express interface is compatible with the PCI Express Base Specification Rev. 1.0a. The
PCI Express controller connects the internal platform to a 2.5 GHz serial interface. The P20x0
has the options for up to three PCI-E interfaces with up to x4 link width. The PCI-E controller can
be configured to operate as either PCI-E root complex (RC) or as an endpoint (EP) device.
Local Bus Controller (LBC)
The main component of the enhanced LBC is the memory controller that provides a 16-bit
interface to various types of memory devices and peripherals. The memory controller is
responsible for controlling eight memory banks shared by the following: a general purpose
chip select machine (GPCM); a flash controller machine (FCM) and user programmable
machines (UPMs).
4.2.5
Secure Digital Hub Controller (SDHC)
The SDHC/eSDHC provides an interface between the host system and the memory cards such
as the MMC and SD. It is compatible with the SD Host Controller Standard Specification Ver. 2.0
and supports the following: SD, miniSD, SD Combo, MMC+ and RS-MMC card.
2
4.2.6
4.2.7
I C Interface
2
The MVME2500 uses only one of the two independent I C buses on the processor. For more
USB Interface
The P20x0 implements a USB 2.0 compliant serial interface engine. For more information, see
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MVME2500 Installation and Use (6806800L01H)
Functional Description
4.2.8
4.2.9
DUART
The chipset provides two universal asynchronous receiver/transmitter (UART), each of which
acts independently of the other. Each UART is clocked by the CCB clock and is compatible with
PC16522D. As a full-duplex interface, it provides a 16-byte FIFO for both transmitter and
receiver mode.
DMA Controller
The DMA controller transfers blocks of data between the various interfaces and functional
blocks of P20x0 that are independent of the e500 cores. The P20x0 DMA controller has three
high-speed DMA channels, all of which capable of complex data movement and advanced
transaction chaining.
4.2.10 Enhanced Three-Speed Ethernet Controller (eTSEC)
The eTSEC controller of the device communicates to the 10 Mbps, 100 Mbps, and 1 Gbps
Ethernet/IEE 802.3 networks, as well as to devices with generic 8 to 16-bit FIFO ports. The
MVME2500 uses the eTSEC using the RGMII interface.
4.2.11 General Purpose I/O (GPIO)
The P20x0 has a total of sixteen I/O ports. Four of these ports are used alternately used as
external input interrupt. All sixteen ports have open drain capabitilies.
The P20x0 processor provides a Serial Rapid I/O interface. However, this interface is not
utilized by the MVME2500.
4.2.12 Security Engine (SEC) 3.1
The integrated security engine of the P20x0 is designed to off-load intensive security functions
like key generation and exchange, authenticaion and bulk encryption from the processor core.
It includes eight different execution units where data flows in and out of an EU.
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MVME2500 Installation and Use (6806800L01H)
Functional Description
4.2.13 Common On-Chip Processor (COP)
The COP is the debug interface of the QorIQ P20x0 Processor. It allows a remote computer
system to access and control the internal operation of the processor. The COP interface
connects primarily through the JTAG and has additional status monitoring signals. The COP has
additional features like breakpoints, watch points, register and memory
examination/modification and other standard debugging features.
4.2.14 P20x0 Hardware Configuration Pins
A series of strapping pins are required to initialize the P20x0. These pins are samples during the
assertion of HRESET and return to their assigned function after HRESET is deasserted.
4.3
System Memory
The processor integrated memory controller supports both DDR2 and DDR3 memory devices.
It has one channel and can be configured for up to four memory banks with x8, x16 and x32
devices. Using 4 GB devices allows support of up to 16 GB of memory. ECC is not supported.
The MVME2500 has a total of eight board variants, half of which has soldered 2 GB memory,
while the remaining half has 16 GB memeory. The x8 or 1 Gbit device forms 2 GB and 1 GB
memory capacity. A total of 16 devices for 2 GB and eight devices are used to form 16 GB.
MVME2500 supports ENP1 and ENP2 operating environment. The ENP1 environment uses
Samsung for all variants including the commercial grade devices, while the ENP2 variants use
Micron.
4.4
Timers
There are various timer functions implemented in the MVME2500 platform:
4.4.1
Real Time Clock
This operates on a 3.3 V supply monitoring and battery control function (MAX6364PUT29), a
32.768 KHz clock generator (DS32KHZS) and an RTC with alarm (DS1375T).
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MVME2500 Installation and Use (6806800L01H)
Functional Description
battery.
4.4.2
4.4.3
Internal Timer
The processor's internal timer is composed of eight global timers divided into two groups of
four timers each. Each time has four individual configuration registers and they cannot be
cascaded together.
Watchdog Timer
The onboard FPGA provides programmable 16-bit watchdog timers. It has a 1 ms resolution
and generates a board reset when the counter expires. Interrupt is generated to the processor
when this occurs. Default value is 60 seconds.
4.4.4
FPGA Tick Timer
The MVME2500 supports three independent 32-bit timers that are implemented on the FPGA
to provide fully programmable registers for the timers.
4.5
Ethernet Interfaces
The MVME2500 has three eTSEC controllers. Each one supports RGII, GMII, and SGMII interface
to the external PHY. All controllers can only be untilized when using the RGMII interface. Using
the GMII allows only up to two usable controllers.
MVME2500 provides two 10/100/1000 Ethernet interfaces on the front panel and another two
are routed to the RTM through the backplane connector. Due to controller limitations, one
controller is designed to be routed to the front panel or to the RTM. This setting is possible by
using a third party gigabit Ethernet LAN switch with a single enable switch such as PERICOM’s
P13L301D. The routing direction can be configured through the on-board dip switch.
Each Ethernet controller has a single dedicated Broadcom BCM54616S with integrated MAC
and PHY. The registers of the PHY can be accessed through the processor’s two-wire Ethernet
management interface.The front panel RJ45 connector has integrated speed and and activity
status indicator LEDs. Isolation transformers are provided onboard for each port.
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MVME2500 Installation and Use (6806800L01H)
Functional Description
4.6
SPI Bus Interface
The enhanced serial peripheral interface (eSPI) allows the device to exchange data with
peripheral devices such as EEPROMs, RTC, Flash and the like. The eSPI is a full-duplex
synchronous, character-oriented channel that supports a simple interface such as receive,
transmit, clock and chip selects. The eSPI receiver and transmitter each have a FIFO of 32 Bytes.
P20x0 supports up to four chip selects and RapidS full clock cycle operation. It can operate both
full-duplex and half duplex. It works with a range of 4-bit to 16-bit data characters and is a
single-master environment. MVME2500 is configured such that the eSPI can operate up to 200
MHz clock rate and can support booting process.The firmware boot flash resides in the P20x0
eSPI bus interface.
4.6.1
4.6.2
SPI Flash Memory
The MVME2500 has two 8 MB onboard serial flash. Both contain the ENV variables and the U-
Boot firmware image, which is about 513 KB in size. Both SPI flash contain the same
programming for firmware redundancy and crisis recovery. The SPI flash can be programmed
through the JTAG interface or through an onboard SPI flash programming header.
SPI Flash Programming
The MVME2500 has three headers: a 10-pin header for SPI Flash programming, an 80-pin
header for the JTAG connectivity and a 20-pin JTAG header for ASSET hardware connectivity.
The following options are used to program the onboard flash:
Using onboard SPI header - The MVME2500 uses the 10-pin header with a Dual SPI Flash in-
circuit programming configuration. The pin connection is compatible with DediProg SPI
Unversal Pin Header.
Using 60-pin external JTAG header - An external JTAG board with a JTAG multiplexer is
compatible with the MVME2500 and can be attached using an external cable. It can be
used to update the boot loader in the field. Using this method, programming can be done
through the JTAG interface or by using the dedicated SPI Flash programming header on the
JTAG board.
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MVME2500 Installation and Use (6806800L01H)
Functional Description
Factory Pre-Programming - Programming the SPI Flash usually takes a while. Ideally, the
SPI Flash should be pre-programmed in the factory before shipment.
ICT Programming - This programming is done on exposed test points using a bed of nails
tester.
The board power should be switched on before programming. The switch S2-8 should also be
powered on to successfully detect the SPI Flash chip.
4.6.3
Firmware Redundancy
The MVME2500 uses two physically separate boot devices to provide boot firmware
redundancy. Although the P20x0 provides four SPI Bus chip-selects, the P20x0 is only capable
of booting from the SPI Device controlled by Chip Select 0. External SPI multiplexing logic is
implemented on the MVME2500 to accomodate this chipset limitation.
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MVME2500 Installation and Use (6806800L01H)
Functional Description
The MVME2500 FPGA controls the chip select to SPI devices A and B. The FPGA chip select
control is based on the Switch Bank (S2-2).
Figure 4-2
SPI Device Multiplexing Logic
At power-up, the selection of the SPI boot device is strictly based upon the Switch Bank (S2-2)
setting. Depending on the S2-2 setting, SPI_SEL0 is routed to one of two SPI devices. The
selected SPI device must contain a boot image. Once the boot image is copied into memory
and executed, the FPGA will wait and once the P20x0 will write on one bit of the FPGA
watchdog register, the FPGA will then pass through the SPI chip select from the P20x0 to SPI
device chip selects. The software can now perform read/write processes on any SPI device,
including copying from one SPI device to another.
With this flexible approach to firmware redundancy, one should always be able to recover from
a corrupt active firmware image, as long as a healthy firmware image is maintained in single
bootable SPI Device.
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MVME2500 Installation and Use (6806800L01H)
Functional Description
The MVME2500 supports automatic switch over. If booting one device is not successful, the
watchdog will trigger the board reset and it will automatically boot on the other device.
4.6.4
Crisis Recovery
The MVME2500 provides an independent boot firmware recovery mechanism for the
operating system. The firmware recovery can be performed without leaving the firmware
environment.
During crisis recovery, the healthy boot image contained in SPI Device B is copied to SPI Device
A, replacing the corrupt boot image contained in SPI Device A.
Crisis recovery is performed as follows:
1. Power off the board.
2. Set Switch S2-2 to "ON" to point to SPI Device B (crisis image).
3. Power on the board.
4. Press "h" on the keyboard to go to the U-Boot prompt.
5. Type "moninit fru" to copy the crisis image to SPI Device A.
6. Once the U-Boot prompt is visible, power off the board.
7. Set the S2-3 back to "OFF" to point to the SPI Device A.
8. Power on the board to boot from the newly recovered image on the SPI Device A.
The board will automatically switch over if one of the devices is corrupted.
4.7
Front UART Control
The MVME2500 utilizes one of the two UART functions provided in the male micro-mini DB-9
front panel. A male-to-male micro-mini DB-9 to DB9 adapter cable is available under Emerson
Part Number SERIAL-MINI-D (30-W2400E01A) and is approximately 12 inches in length.
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MVME2500 Installation and Use (6806800L01H)
Functional Description
Only 115200 bps and 9600 bps are supported. The default baud rate on the front panel serial
is 9600 kbps.
4.8
4.9
Rear UART Control
The MVME2500 utilizes the Exar ST16C554 quad UART (QUART) to provide four additional
ports to the RTM. These devices feature 16 bytes of transmit and receive first-in first-out (FIFO)
with selectable receive FIFO trigger levels and data rates of up to 1.5 Mbps. Each UART has a set
of registers that provide the user with operating status and control. The QUART are 8-bit
devices connected to the processor through the local bus controller using LBC chipset CS1,
CS2, CS3 and CS4.
These four serial interfaces are routed to P2 I/O for RTM accessibility. There are a total of five
serial ports available on the MVME2500.
PMC/XMC Sites
The MVME2500 hosts only one PMC/XMC site and accepts either a PMC or an XMC add-on
card. Only an XMC or a PMC may be populated at any given time as both occupy the same
physical space on the PCB. Combination PMC/XM cards are not supported by the MVME2500.
The site provides a rear PMC I/O.
The PMC site is fully compliant with the following:
1. VITA 39 –PCI-X for PMC
2. VITA 35-2000 for PMC P4 to VME P2 Connection
3. PCI Rev 2.2 for PCI Local Bus Specification.
4. PCI-X PT 2.0 for PCI-X Protocol Addendum to the PCI Local Bus Specs.
5. IEEE Standard P1386-2001 for Standard for Common Mezzanine Card Family
6. IEEE Standard P1386.1-2001 for Standard Physical and Environmental Layer for PCI
Mezzanine Card.
7. VITA 42 for XMC
8. VITA 42.3 , PCIe for XMC
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MVME2500 Installation and Use (6806800L01H)
Functional Description
PMC/XMC sites are keyed for 3.3V PMC signaling. PMC and XMC add-on cards must have a hole
in the 3.3 V PMC keying position in order to be populated on the MVME2500. The XMC
specification accommodates this since it is expected that carrier cards will host both XMC and
PMC capable add-on cards.
MVME2500 utilizes the P20x0 x2 link PCI Express interface. It is designed such that the same
PCI-E interface is used for either PMC or XMC through Pericom’s PI2PCIE2412. It is PCI-E Gen2
compliant with four differential channel input and 2:1 MUX switch with single enable. The
enable pin is controlled by FPGA through onboard switch.
The onboard switch S2-4 determines the direction of the PCI-E MUX switch. The default setting
"OFF" routes the differential lines to the PMC. Otherwise, it is routed to the XMC connector.
4.9.1
4.9.2
PMC Add-on Card
The MVME2500 PMC interface utilizes IDT’s TSI384 as the PCie/PCI-X bridge. It can support up
to 8.5 Gbps (64 bits x 133 Mhz). The onboard switch S2-7 configures the TSI384 to run on
either 100 Mhz or 133 Mhz, with 133 Mhz as default.
The MVME2500 supports multi-function PMCs and processor PMCs (PrPMCs). The PMC site
has two IDSELs, two REQ/GNT pairs, and EREADY to support PrPMC as defined by VITA39.
XMC Add-on Card
The x2 links the PCI-E Gen 1 and is directly routed to the P15 XM connector through Pericom
MUX Switch. The onboard switch S2-4 should be set to "ON".
XMC add-on cards are required to operate at +5V or +12V (from carrier to XMC). The
MVME2500 provides +5V to the XMC VPWR (Variable Power) pins. The MVME2500 does not
provide +12V to the XMC VPWR pins. Voltage tolerances for VPWR and all carrier supplied
voltage (+3.3 V, +12 V, -12 V) are defined by the base XMC standard.
4.10 SATA Interface
The MVME2500 supports an optional 2.5" SATA HDD. The connector interface is compatible
with the Emerson SATAMNKIT, which contains the following: one SSD/HDD, one SATA board,
screws and a mounting guide. The SATA connector can support a horizontal mounted
SSD/HDD.
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MVME2500 Installation and Use (6806800L01H)
Functional Description
The MVME2500 uses Marvell's 88SE6121B2-NAA2C000 SATA controller and supports up to 1.5
Gbps (SATA Gen 1). For status indicators, it has an onboard green LED, D12 and D13 for SATA
link and SATA activity status respectively.
4.11 VME Support
The MVME2500 can operate in either System Controller (SCON) mode or non-SCON mode, as
determined by the the switch setting of S1-1 and S1-2.
The P20x0 x1 link is used for the VME backplane connectivity through the Tsi384 (PCI-E/PCI-X)
and Tsi148 (PCI-X/VMEBus) bridges.
information.
4.11.1 Tsi148 VME Controller
The VMEbus interface for the MVME2500 is provided by the Tsi148 VMEbus controller. The
Tsi148 provides the required VME, VME extensions, and 2eSST functions. TI
SN74VMEH22501transceivers are used to buffer the VME signals between the Tsi148 and the
VME backplane. Refer to the Tsi148 user's manual for additional details and/or programming
information.
4.12 USB
The MVME2500 processor implements a dual-role (DR) USB 2.0 compliant serial interface
engine. DC power to the front panel USB port is supplied using a USB power switch which
provides soft-start, current limiting, over current detection, and power enable for port 1.
2
4.13 I C Devices
2
The MVME2500 utilizes one of the two I2C ports provided by the board's processor. The I C bus
is a two-wire , serial data (SDA) and serial clock (SCL), synchronous, multi-master bi-directional
serial bus that allows data exchance between this device and other devices such as VPD, SPD,
EEPROM, RTC, temperature sensor, RTM, XMC and IDT clocking.
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MVME2500 Installation and Use (6806800L01H)
Functional Description
The RTM I2C address can be configured by the user and should not contain duplicate addresses
4.14 Reset/Control FPGA
The FPGA provides the following functions:
Power control and fault detection
Reset sequence and reset management
Status and control registers
Miscellaneous control logic
Watchdog timer
32-bit Tick Timer
Clock generator
Switch decoder and LED controller
4.15 Power Management
The MVME2500 backplane is utilized to derive +3.3V, +2.5V, +1.8V, +1.5V, +1.2V, +1.05V
voltage rail. Each voltage rail is controlled by the FPGA through an enable pin of the regulator,
while the output is monitored through power good signal. If a voltage rail fails. the FPGA will
disable each supply. To restart the system, the chassis power switch must be powercycled.
4.15.1 Onboard Voltage Supply Requirement
The onboard power supply is considered to be out of regulation if the output voltage level is
below the minimum required power or goes beyond the maximum.
Table 4-1 Voltage Supply Requirement
Voltage Rail Requirement
Voltage Rail
+3.3 V
Minimum
3.15 V
Maximum
3.45 V
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MVME2500 Installation and Use (6806800L01H)
Functional Description
Table 4-1 Voltage Supply Requirement
Voltage Rail Requirement
Minimum
Voltage Rail
+2.5 V
Maximum
2.625 V
1.9 V
2.375 V
1.7 V
+1.8 V
+1.5 V
1.425 V
1.14 V
1.14 V
1.0 V
1.575 V
1.26 V
1.26 V
1.1 V
+1.2 V
+1.2 V_SW
+1.05 V
4.15.2 Power Up Sequencing Requirements
The power up sequence describes the voltage rail power up timing, which is designed to
support all the chip supply voltage sequencing requirement.
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MVME2500 Installation and Use (6806800L01H)
Functional Description
4.16 Clock Structure
A total of three IDT chips, a discrete oscillator and crystal to support all the clock requirements
of MVME2500.
Figure 4-3
Clock Distribution Diagram
4.17 Reset Structure
MVME2500 reset will initiate after the power up sequence if the 1.5 V power supply is "GOOD".
When the board is at "ready" state, the reset logic will monitor the reset sources and implement
the necessary reset function.
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MVME2500 Installation and Use (6806800L01H)
Functional Description
4.17.1 Reset Sequence
The timing of the reset sequence supports each chip reset requirements with respect to the
power supply.
4.18 Thermal Management
The MVME2500 utilizes two on-board temperature sensors: one for the board and the other for
the CPU temperature sensor. The board temperature sensor is located near the dual RJ45
connector near the front panel. The CPU temperature sensor is located near the P2020 CPU.
The MVME2500 thermal management support will interrupt the process only to show the
current board and CPU temperature. This interrupt is routed directly to one of the processor’s
IRQ4.
The table below shows the low and high threshold temperature in order for the interrupt to be
asserted.
Table 4-2 Thermal Interrupt Threshold
Board
CPU Temperature
Temperature Limit Limit
Board Variant
Board Temperature Limit
0°C to +55°C
Low
0°C
High
70°C
90°C
Low
0°C
High
90°C
100°C
Standard Variant
Extended Temperature
Variant
-55°C to +71°C
-40°C
-40°C
4.19 Real-Time Clock Battery
A back-up battery based on the CR2325 specification is provided. It helps support the RTC
hold-up requirements that maintain the correct date and time for at least two hours after the
backplane power is switched off.
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MVME2500 Installation and Use (6806800L01H)
Functional Description
4.20 Debugging Support
The following information shows the details of Emerson debugging support as applied to the
MVME2500.
4.20.1 POST Code Indicator
The following table shows the LED status of the POST Codes. For the location of the POST Code
Logic 1 means LED is "ON", Logic 2 means LED is "OFF"
Table 4-3 POST Code Indicator on the LED
Sequence
D33
0
D32
0
D35
0
Description
1
2
U-boot has been copied from SPI flash to CPU cache.
0
1
0
Serial console has been initialized, some text is visible
on the terminal.
3
0
1
1
DDR has been initialized using SPD parameters,
Execution is still in the cache.
4
5
6
7
8
1
1
1
1
0
0
0
1
1
0
0
1
0
1
0
Execution has been relocated to RAM.
PCI has been initialized.
POST routines are finished.
Additional SW routines are finished.
U-boot prompt is visible on the terminal, can start
loading OS image from USB, Ethernet, SATA SSD, SD.
4.20.2 JTAG Chain and Board
The MVME2500 is designed to work with separate JTAG board rather than with an onboard
JTAG multiplexer. The chip can support up to a 6-scan port and the board’s boundary scan
requires the following to function: ASSET hardware, JTAG board and JTAG cable. The
MVME2500 provides a 60-pin header that can connect to the JTAG board using a custom cable.
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MVME2500 Installation and Use (6806800L01H)
Functional Description
The JTAG board provides three different connectors for the ASSET hardware, flash
programming and the MVME2500 JTAG connector. The board is equipped with TTL buffers to
help improve the signal quality as it traverses over the wires.
4.20.3 Custom Debugging
Custom debugging makes use of the common on-chip processor. Refer to Common On-Chip
Processor (COP), on page 65 for details.
4.21 Rear Transition Module (RTM)
The MVME2500 is compatible with the MVME721x RTM.
The MVME721X RTM is for I/O routing through the rear of a compact VMEbus chassis. It
connects directly to the VME backplane in chassis with an 80 mm deep rear transition area. The
MVME721X RTM is designed for use with the MVME7100, MVME2500, iVME7210, and MVME
4100. It has the following features:
Table 4-4 Transition Module Features
Function
I/O
Features
One five-row P2 backplane connector for serial and Ethernet I/O passed from the
SBC
Four RJ-45 connectors for rear panel I/O: four asynchronous serial channels
Two RJ-45 connectors with integrated LEDs for rear panel I/O: two 10/100/1000
Ethernet channels
One PIM site with rear panel I/O
For more information, refer to the MVME721x RTM Installation and Use. See Appendix B,
Related Documentation, on page 129 for details on how to obtain and download the document.
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MVME2500 Installation and Use (6806800L01H)
Functional Description
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MVME2500 Installation and Use (6806800L01H)
Chapter 5
Memory Maps and Registers
5.1
5.2
Overview
System resources including system control and status registers, external timers, and the
QUART are mapped into 16 MB address range accessible from the MVME2500 local bus
through the P20x0 QorIQ LBC.
Memory Map
The following table shows the physical address map of the MVME2500.
Table 5-1 Physical Address Map
Device Name
DDR
Start Address
0x0000_0000
0x8000_0000
0xa000_0000
0xc000_0000
0xffc0_0000
0xffc1_0000
0xffc2_0000
0xffc4_0000
0xffc5_0000
0xffc6_0000
0xffc7_0000
0xffc8_0000
0xffdf_0000
0xffe0_0000
0xfff0_0000
End Address
0x7fff_ffff
0x9fff_ffff
0xbfff_ffff
0xdfff_ffff
0xffc0_ffff
0xffc1_ffff
0xffc2_ffff
0xffc4_ffff
0xffc5_ffff
0xffc6_ffff
0xffc7_ffff
0xffc8_ffff
0xffdf_0fff
0xffef_ffff
0xfff7_ffff
Size
2 GB
PCIE 3 Mem
PCIE 2 Mem
PCIE 1 Mem
PCIE 3 IO
PCIE 2 IO
PCIE 1 IO
UART0
512 MB
512 MB
512 MB
64 KB
64 KB
64 KB
64 KB
64 KB
64 KB
64 KB
64 KB
4 KB
UART1
UART2
UART3
Timer
FPGA
CCSR
1 MB
MRAM
512 KB
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MVME2500 Installation and Use (6806800L01H)
Memory Maps and Registers
5.3
5.4
Flash Memory Map
The table below lists the memory range designated to U-boot and ENV variables.
Table 5-2 Flash Memory Map
Description
U-boot
Memory Area
0x00000000 0x0008ffff
0x00090000 0x0009ffff
0x00100000 0x0011ffff
0x00120000 0x007fffff
Reserved
ENV Variables
Available Flash
Linux Devices Memory Map
The table below lists the memory ranges designated to different devices in Linux.
Table 5-3 Linux Devices Memory Map
Device Memory Range
Ram Mem
PCIE3 Mem
PCIE2 Mem
PCIE1 Mem
MRAM
Memory Area
Size
0x00000000 0x7fffffff
0x80000000 0x9fffffff
0xa0000000 0xbfffffff
0xc0000000 0xdfffffff
0xfff00000 0xfff7ffff
0xffc00000 0xffc0fff
0xffc10000 0xffc1ffff
0xffc20000 0xffc2ffff
0xffc40000 0xffc4ffff
0xffc50000 0xffc5ffff
0xffc60000 0xffc6ffff
0xffc70000 0xffc7ffff
0xffc80000 0xffc8ffff
2 GB
512 MB
512 MB
512 MB
512 KB
64 KB
64 KB
64 KB
64 KB
64 KB
64 KB
64 KB
64 KB
PCIE3 IO
PCIE2 IO
PCIE1 IO
QUART0
QUART1
QUART2
QUART3
Timer
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MVME2500 Installation and Use (6806800L01H)
Memory Maps and Registers
Table 5-3 Linux Devices Memory Map
Device Memory Range
FPGA
Memory Area
Size
0xffdf0000 0xffdf0fff
0xffe00000 0xffe00ffff
0xffe01000 0xffe01fff
0xffe02000 0xffe02fff
0xffe03000 0xffe030ff
0xffe03100 0xffe031ff
0xffe04500 0xffe045ff
0xffe04600 0xffe046ff
0xffe05000 0xffe05fff
0xffe07000 0xffe07fff
0xffe08000 0xffe08fff
0xffe09000 0xffe09fff
0xffe0a000 0xffe0afff
0xffe0c100 0xffe0c303
0xffe0fc00 0xffe0fcff
0xffe20000 0xffe20fff
0xffe21100 0xffe21303
0xffe22000 0xffe22fff
0xffe24000 0xffe24fff
0xffe25000 0xffe25fff
0xffe26000 0xffe26fff
0xffe2e000 0xffe2efff
0xffe30000 0xffe3ffff
0xffe41600 0xffe4167f
0xffe40000 0xffe7ffff
0xffee0000 0xffee0fff
0xf0f80000 0xf0ffffff
4 KB
ecm local access window CCSR
ecm (Error Correction Module) CCSR
Memory Controller CCSR
I2C1 CCSR
4 KB
4 KB
4 KB
256 B
256 B
256 B
256 B
4 KB
I2C2 CCSR
UART0 CCSR
UART1CCSR
ELBC CCSR
SPI CCSR
4 KB
PCIE3 CCSR
4 KB
PCIE2 CCSR
4 KB
PCIE1CCSR
4 KB
DMA2 CCSR
516 B
256 B
4 KB
GPIO CCSR
L2 Cache CCSR
DMA1 CCSR
516 B
4 KB
USB CCSR
ETSEC1 CCSR
ETSEC2 CCSR
ETSEC3 CCSR
SDHCI CCSR
4 KB
4 KB
4 KB
4 KB
Crypto CCSR
64 KB
128 B
256 KB
4 KB
msi CCSR
mpic CCSR
Global Utilities CCSR
L2 Cache Mem
512 KB
83
MVME2500 Installation and Use (6806800L01H)
Memory Maps and Registers
5.5
Programmable Logic Device (PLD) Registers
5.5.1
PLD Revision Register
The MVME2500 provides a PLD revision register that can be read by the system software to
determine the current version of the timers/registers PLD.
Table 5-4 PLD Revision Register
REG
PLD Revision Register - 0xFFDF0000
Bit
7
6
5
4
3
2
1
0
Field
OPER
RESET
PLD Rev
R
03
Field Description
PLD_REV
8-bit field containing the current timer/register PLD revision. The
revision number starts at 01.
5.5.2
PLD Year Register
The MVME2500 PLD provides an 8-bit register which contains the build year of the
timers/registers PLD.
Table 5-5 PLD Year Register
REG
PLD Year Register - 0xFFDF0004
Bit
7
6
5
4
3
2
1
0
Field
OPER
RESET
PLD Rev
R
0A
84
MVME2500 Installation and Use (6806800L01H)
Memory Maps and Registers
5.5.3
5.5.4
5.5.5
PLD Month Register
The MVME2500 PLD provides an 8-bit register which contains the build month of the
timers/registers PLD.
Table 5-6 PLD Month Register
REG
PLD Year Register - 0xFFDF0005
Bit
7
6
5
4
3
2
1
0
Field
OPER
RESET
PLD Rev
R
0A
PLD Day Register
MVME2500 PLD provides an 8-bit register which contains the build day of the timers/registers
PLD.
Table 5-7 PLD Day Register
REG
PLD Revision Register - 0xFFDF0006
Bit
7
6
5
4
3
2
1
0
Field
OPER
RESET
PLD Rev
R
0E
PLD Sequence Register
The MVME2500 PLD provides an 8-bit register which contains the sequence of the PLD which
is in synchrony with the PCB version.
Table 5-8 PLD Sequence Register
REG
Bit
PLD Revision Register - 0xFFDF0007
7
6
5
4
3
2
1
0
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MVME2500 Installation and Use (6806800L01H)
Memory Maps and Registers
Table 5-8 PLD Sequence Register
REG
PLD Revision Register - 0xFFDF0007
Bit
7
6
5
4
3
2
1
0
Field
OPER
RESET
PLD Rev
R
02
5.5.6
PLD Power Good Monitor Register
The MVME2500 PLD provides an 8-bit register which indicates the instantaneous status of the
supply’s power good signals.
Table 5-9 PLD Power Good Monitor Register
REG
Bit
PLD PWRDG_MNTR - 0xFFDF0012
7
6
5
4
3
2
1
0
Field
RSVD
PWR_V
1P05_P
WRGD
PWR_V
PWR_V
PWR_V
PWR_V
PWR_V
PWR_V
1P2_PW 1P8_PW 3P3_PW 2P5_PW 1P2_SW 1P5_PW
RGD
RGD
RGD
RGD
_PWRG
D
RGD
OPER
R
0
RESET
0
0
0
0
0
0
0
Field Description
PWR_V1P05_PWRGD
PWR_V1P2_PWRGD
PWR_V1P8_PWRGD
1.05V Core supply power good indicator
1.2V Supply power good indicator
1.8V Supply power good indicator
86
MVME2500 Installation and Use (6806800L01H)
Memory Maps and Registers
PWR_V3P3_PWRGD
PWR_V2P5_PWRGD
3.3V Supply power good indicator
2.5V Supply power good indicator
PWR_V1P2_SW_PWRG
D
1.2V SW Supply power good indicator
PWR_V1P5_PWRGD
1.5V Supply power good indicator
1 - Supply Good and Stable
0 - Otherwise
5.5.7
PLD LED Control Register
The MVME2500 PLD provides an 8-bit register which controls the eight LEDs.
Table 5-10 PLD LED Control Register
REG
Bit
PLD LED_CTRL - 0xFFDF001C
7
6
5
4
3
2
1
0
Field
D1
D35
D34
D33
D38
D37
D2 Red
D2
Yellow
OPER
R/W
1
RESET
0
0
0
0
0
0
0
1 - LED on
0 - LED off
87
MVME2500 Installation and Use (6806800L01H)
Memory Maps and Registers
5.5.8
PLD PCI/PMC/XMC Monitor Register
The MVME2500 PLD provides an 8-bit register which indicates the status of the PCI/PMC/XMC
interface signals.
Table 5-11 PLD PCI/PMC/XMC Monitor Register
REG
Bit
PLD PCI_PMC_XMC_MNTR - 0xFFDF001D
7
6
5
4
3
2
1
0
Field
RSVD
RSVD
RSVD
PMC_X
PMC1_E PMC1P_ XMCP1_ PCI1_PC
MC_SEL READY
N
N
IXCAP
OPER
R
0
RESET
0
0
X
X
X
X
X
Field Description
PMC_XMC_SEL
XMC or PMC Selection Switch
1 - XMC
0 - PMC
PMC1_EREADY
Indicates that the PrPMC module is installed in PMC
site.
1 - PrPMC is ready for enumeration or no PrPMC is
installed.
0 - PrPMC is not ready for enumeration.
PMC1P_N
PMC Presence Indicator
1 - PMC is not present
0 - PMC is present
XMCP1_N
XMC Presence Indicator
1 - XMC is not present
0 - XMC is present
PCI1_PCIXCAP
PCI Capability Indicator
1 - PCI-X capable
0 - PCI capable
88
MVME2500 Installation and Use (6806800L01H)
Memory Maps and Registers
5.5.9
PLD U-Boot and TSI Monitor Register
The MVME2500 PLD provides an 8-bit register which indicates the status of the U-Boot's
normal environment switch and TSI interface signals.
Table 5-12 PLD U-Boot and TSI Monitor Register
REG
PLD PCI_PMC_XMC_MNTR - 0xFFDF001F
Bit
7
6
5
4
3
2
1
0
Field
OPER
RESET
RSVD
RSVD
RSVD
RSVD
RSVD
BDFAIL_N
NORMAL_ENV
SCON
R
0
0
0
0
0
X
X
X
Field Description
BDFAIL_N
TSI148 BDFAIL_N Pin out
1 - No TSI Fail
0 - TSI Fail
NORMAL_ENV
SCON
Normal Environment Switch Indicator
1 - Use safe ENV
0 - Use normal ENV
System Controller Indicator
1 - System Controller
0 - Non-system Controller
5.5.10 PLD Boot Bank Register
The MVME2500 PLD provides an 8-bit register which is used to declare successful U-Boot
loading, indicating the SPI boot bank priority and actual SPI bank it booted from.
Table 5-13 PLD Boot Bank Register
REG
Bit
PLD Boot Bank - 0xFFDF0050
7
6
5
4
3
2
1
0
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MVME2500 Installation and Use (6806800L01H)
Memory Maps and Registers
Table 5-13 PLD Boot Bank Register
REG
PLD Boot Bank - 0xFFDF0050
SPI_GOODReg
Field
BOOT_B BOOT_S
LOCK_A PI
(write 0xA4 into this reg to indicate successful loading of the U-
Boot.
OPER
R/W
R
X
R
0
RESET
0
0
0
0
0
0
Field Description
BOOT_BLOCK_A
Boot Block Manual Selector Switch
1 - SPI0
0 - SPI1
BOOT_SPI
Actual Boot Bank
1 - SP1
0 - SPI0
90
MVME2500 Installation and Use (6806800L01H)
Memory Maps and Registers
5.5.11 PLD Write Protect and I2C Debug Register
The MVME2500 PLD provides an 8-bit register which is used to indicate the status of I2C and
SPI write-protect manual switches and is used to control the SPI write-enable. I2C debug ports
are also provided in this register which can be used in controlling the bus’ status.
Table 5-14 PLD Write Protect and I2C Debug Register
REG
Bit
PLD Write Protect I2C Debug- 0xFFDF0054
7
6
5
4
3
2
1
0
Field
RSVD
MASTER FLASH_
_WP_DI WP_N
SABLED
I2C_DEB SERIAL_ RSVD
I2C_1_
D
I2C_1_C
UG_EN
FLASH_
WP
OPER
R
0
R
1
R
0
R/W
0
R/W
1
R
0
R/W
1
R/W
1
RESET
Field Description
MASTER_WP_DISABLED
I2C devices manual switch write-protect status
1 - Write-protect enabled
0 - Write-protect disabled
FLASH_WP_N
SPI devices manual switch write-protect status
1 - Write-protect disabled
0 - Write-protect enabled
91
MVME2500 Installation and Use (6806800L01H)
Memory Maps and Registers
I2C_DEBUG_EN
SERIAL_FLASH_WP
I2C_1_D
I2C debug ports (I2C_1_D and I2C_1_C) enable
1 - Drive Enabled
0 - Drive Disabled
SPI devices write-protect register
1 - Write-protect enabled
0 - Write-protect disabled
I2C debug port-Data
I2C_DEBUG_EN=0
HiZ - Tri-Stated
I2C_DEBUG_EN-1
1 - Driven High
0 - Driven Low
I2C_1_C
I2C debug port-Clock
I2C_DEBUG_EN=0
HiZ - Tri-Stated
I2C_DEBUG_EN-1
1 - Driven High
0 - Driven Low
When SERIAL_FLASH_WP is set to "Low", this port will automatically read as low due to "AND"
connection between the two ports.
92
MVME2500 Installation and Use (6806800L01H)
Memory Maps and Registers
5.5.12 PLD Test Register 1
The MVME2500 PLD provides an 8-bit general purpose read/write register which can be used
by the software for PLD testing or general status bit storage.
Table 5-15 PLD Test Register 1
PLD Test Register 1- 0xFFDF0080
REG
Bit
7
6
5
4
3
2
1
0
Field
OPER
RESET
TEST_REG1
R/W
00
Field Description
TEST_REG1
General purpose 8-bit R/W field
5.5.13 PLD Test Register 2
The MVME2500 PLD provides an 8-bit general purpose read/write register which can be used
by the software for PLD testing or general status bit storage.
Table 5-16 PLD Test Register 2
PLD Test Register 2- 0xFFDF0081
REG
Bit
7
6
5
4
3
2
1
0
Field
OPER
RESET
TEST_REG2
R/W
00
Field Description
TEST_REG2
General purpose 8-bit R/W field
93
MVME2500 Installation and Use (6806800L01H)
Memory Maps and Registers
5.5.14 PLD GPIO2 Interrupt Register
The Abort switch, Tick Timer 0, 1 and 2 interrupts are ORed together. The MVME2500 provides
an interrupt register that the system software reads to determine which device the interrupt
originated from. GPIO2 will be driven "low" if any of the interrupts asserts.
Table 5-17 PLD GPIO2 Interrupt Register
REG
PLD Write Protect I2C Debug- 0xFFDF0095
Bit
7
6
5
4
3
2
1
0
Field
OPER
RESET
RSVD
RSVD
RSVD
RSVD
NMI
TICK0_INT
TICK1_INT
TICK2_INT
R
0
0
0
0
0
0
0
0
Field Description
NMI
Abort switch interrupt if pressed less than three seconds.
1 - Interrupt enabled
0 - No Interrupt
TICK0_INT
TICK1_INT
TICK2_INT
Tick Timer 0 interrupt
1 - Interrupt enabled
0 - No Interrupt
Tick Timer 1 interrupt
1 - Interrupt enabled
0 - No Interrupt
Tick Timer 2 interrupt
1 - Interrupt enabled
0 - No Interrupt
94
MVME2500 Installation and Use (6806800L01H)
Memory Maps and Registers
5.5.15 PLD Shutdown and Reset Control and Reset Reason Register
The MVME2500 provides an 8-bit register to execute the shutdown and reset commands. The
board's reset reason is also included in this register.
Table 5-18 PLD Shutdown and Reset Control and Reset Reason Register
REG
Bit
PLD Shutdown and Reset Reason- 0xFFDF00FF
7
6
5
4
3
2
1
0
Field
AUTO_SH Shutdown Soft_RST
DN_MASK
Clear_Cause
CPU_RESET
WD_TIME LRSTO
OUT
Sft_RST
OPER
R/W
0
W
0
W
0
W
0
R
X
RESET
X
X
X
Field Description
AUTO_SHDN_MASK
Automatic Shutdown Mask
1 - Auto Shutdown Mask Enable
0 - Auto Shutdown Mask Disable
Note: Automatic shutdown is generated after 1 second whenever a power good signal de-
asserts.
Shutdown
Board Shutdown Register
1 - Shutdown Enable
0 - Shutdown Disable
Note: If a board entered the shutdown state (by writing a '1' in this register), the chassis' power
needs to be cycled to power up the board again.
Soft_RST
Board Soft Reset (self clearing)
1 - Execute soft reset
0 - No reset
Clear_Cause
Clear Reset Reason (self clearing)
1 - Clear Reason
0 - None
95
MVME2500 Installation and Use (6806800L01H)
Memory Maps and Registers
CPU_RESET
WD_TIMEOUT
LRSTO
CPU_HRESET_REQ_L Reset Reason
1 - Reset is due to CPU_HRESET_REQ_L signal
0 -None
Watchdog Timeout Reset Reason
1 - Reset is due to watchdog timing out
0 - None
TSI LRSTO Reset Reason
1 - Reset is due to LRSTO signal
0 - None
Sft_RST
Soft Reset - Reset Reason
1 - Reset is due to Soft_RST register being set, or the front
panel switch being pressed more than three
0 - None
5.5.16 PLD Watchdog Timer Refresh Register
The MVME2500 provides a watchdog timer refresh register.
Table 5-19 PLD Watchdog Timer Refresh Register
REG
Bit
PLD Watch Dog Timer Load - 0xFFC80600
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Field
OPER
RSVD
R
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
Refresh
RESET 0000
Field Description
Refresh
Counter Refresh. When the pattern 0x00DB is written, the watchdog counter
will be reset to zero.
96
MVME2500 Installation and Use (6806800L01H)
Memory Maps and Registers
5.5.17 PLD Watchdog Control Register
The MVME2500 provides a watchdog control register.
Table 5-20 PLD Watchdog Control Register
REG
Bit
PLD Watch Dog Timer Load - 0xFFC80604
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
Watchdog_EN RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD
Field
OPER R/W
RESET 0000
R
Field Description
EN
Enable. If cleared, the watchdog timer is disabled. If set, the watchdog timer is
enabled.
5.5.18 PLD Watchdog Timer Count Register
The MVME2500 provides a watchdog timer count register.
Table 5-21 PLD Watchdog Timer Count Register
REG
PLD Watchdog Timer Count - 0xffc80606
Bit
15:0
Field
OPER
RESET
Count
R/W
0xEA60 (60secs)
97
MVME2500 Installation and Use (6806800L01H)
Memory Maps and Registers
Field Description
Count
Count. These bits define the watchdog timer count value. When the
watchdog counter is enabled, it will count up from zero (reset value) with a 1
ms resolution until it reaches the COUNT value set by this register. Watchdog
will generate a soft reset signal if it bites.
Setting this register to 0xEA60 or 60,000 counts will provide a watchdog
timeout of 60 seconds.
5.6
External Timer Registers
The MVME2500 provides a set of tick timer registers to access the three external timers
implemented in the timers/registers PLD. These registers are 32-bit and are word writable. The
following sections describe the timer prescaler and control registers.
5.6.1
Prescaler Register
The prescaler adjust value is determined by this formula:
Prescaler Adjust = 256-(CLKIN/CLKOUT)
CLKIN is the input clock source in MHz, and CLKOUT is the desired output clock reference in
MHz.
Table 5-22 Prescaler Register
REG
Bit
Prescaler Register - 0xFFC80100
15 14 13 12
11
10
9
8
7
6
5
4
3
2
1
0
Field
OPER
RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD Prescaler Register (8-bits)
R/W
RESET 0x00e7
The prescaler provides the clock required by each of the three times. The tick timers require a
1 MHz clock input. The input clock to the prescaler is 25 MHz. The default value is set for
0x00E7, which gives a 1 MHz reference clock for a 25 MHz input clock source.
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MVME2500 Installation and Use (6806800L01H)
Memory Maps and Registers
5.6.2
Control Registers
Table 5-23 Control Registers
Tick Timer 0 Control Register - 0xFFC80202
Tick Timer 1 Control Register - 0xFFC80302
Tick Timer 2 Control Register - 0xFFC80402
REG
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RSVD
RSVD
RSVD
RSVD
RSVD
ENINT
RSVD
COVF
Field
OPER
INTS CINT
OVF
COC ENC
R/W
RESET 0x0000
Field Description
ENC
Enable counter. When the bit is set, the counter increments. When the bit is
cleared, the counter does not increment.
COC
Clear Counter on Compare. When the bit is set, the counter is reset to 0 when
it compares with the compare register. When the bit is cleared the counter is
not reset.
COVF
OVF
Clear Overflow Bits. The overflow counter is cleared when a 1 is written to this
bit.
Overflow Bits are the output of the overflow counter. It increments each time
the tick timer sends an interrupt to the local bus interrupter. The overflow
counter can be cleared by writing a 1 to the COVF bit.
ENINT
Enable Interrupt. When the bit is set, the interrupt is enabled. When the bit is
cleared, the interrupt is not enabled.
CINT
INTS
RSVD
Clear Interrupt.
Interrupt Status.
Reserved for future implementation.
99
MVME2500 Installation and Use (6806800L01H)
Memory Maps and Registers
5.6.3
Compare High and Low Word Registers
The tick timer counter is compared to the Compare Register. When the values are equal, the
tick timer interrupt is asserted and the overflow counter increments. If the clear-on-compare
mode is enable, the counter is also cleared. For periodic interrupts, this equation should be
used to calculate the compare value for a specific period (T):
Compare register value=T (us)
When programming the tick timer for periodic interrupt, the counter should be cleared to zero
by software and then enabled. If the counter does not initially start at zero, the time to the first
interrupt may be longer or shorter than expected. Note that the rollover time for the counter
is 71.6 minutes.
Since the processor is 16-bits and the tick timer is 32-bits, the compare register was split in half.
Accessing the whole register will require two transactions.
Table 5-24 Compare High Word Registers
Tick Timer 0 Compare Value High Word - 0xFFC80204
Tick Timer 1 Compare Value High Word - 0xFFC80304
REG
Bit
Tick Timer 2 Compare Value High Word - 0xFFC80404
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
Field
OPER
TickTimer Compare Value High Word (16-bits)
R/W
RESET 0x0000
Table 5-25 Compare Low Word Registers
Tick Timer 0 Compare Value Low Word - 0xFFC80206
Tick Timer 1 Compare Value Low Word - 0xFFC80306
Tick Timer 2 Compare Value Low Word - 0xFFC80406
REG
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Field
OPER
TickTimer Compare Value Low Word (16-bits)
R/W
RESET 0x0000
100
MVME2500 Installation and Use (6806800L01H)
Memory Maps and Registers
5.6.4
Counter High and Low Word Registers
When enabled, the tick timer counter register increments every microsecond. Software may
read or write the counter at any time.
Table 5-26 Counter High Word Registers
Tick Timer 0 Counter Value High Word - 0xFFC80208
Tick Timer 1 Counter Value High Word - 0xFFC80308
Tick Timer 2 Counter Value High Word - 0xFFC80408
REG
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Field
OPER
TickTimer Counter Value High Word (16-bits)
R/W
RESET 0x0000
Table 5-27 Counter Low Word Registers
Tick Timer 0 Counter Value Low Word - 0xFFC8020A
Tick Timer 1 Counter Value Low Word - 0xFFC8030A
Tick Timer 2 Counter Value Low Word - 0xFFC8040A
REG
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Field
OPER
TickTimer Counter Value Low Word (16-bits)
R/W
RESET 0x0000
101
MVME2500 Installation and Use (6806800L01H)
Memory Maps and Registers
102
MVME2500 Installation and Use (6806800L01H)
Chapter 6
Boot System
6.1
Overview
The MVME2500 uses Das U-Boot, a boot loader software based on the GNU Public License. It
boots the blade and is the first software to be executed after the system is powered on.
Its main functions are:
Initialize the hardware
Pass boot parameters to the Linux kernel
Start the Linux kernel
Update Linux kernel and U-Boot images
This section describes U-Boot features and procedures that are specific to the MVME2500. For
general information on U-Boot, see http://www.denx.de/wiki/UBoot/WebHome.
6.2
Accessing U-Boot
1. Connect the board to a computer with a serial interface connector and a terminal emulation
software running on it. The serial connector of the board is found on the face plate.
2. Configure the terminal software to use the access parameters that are specified in U-Boot.
By default, the access parameters are as follows:
Baud rate: 9600
PC ANSI
8 data bits
No parity
1 stop bit
These serial access parameters are the default values. These can be changed from within the
U-Boot. For details, refer to the U-Boot documentation.
3. Boot the MVME2500.
4. When prompted, press the "h" key.
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MVME2500 Installation and Use (6806800L01H)
Boot System
U-Boot aborts the boot sequence and enters into a command line interface mode.
Enter the command setenv bootdelay -1; saveenvto disable the U-Boot auto-boot
feature and let the U-Boot directly enter the command line interface after the next
reboot/power up.
6.3
Boot Options
6.3.1
Booting from a Network
In this mode, U-Boot downloads and boots the Linux kernel from an external TFTP server and
mounts a root file system located on a network server.
1. Make sure that the kernel, dtb,and ramdiskare accessible to the board from the
TFTP server.
2. Configure U-Boot environment variables:
setenv ipaddr <IP address of MVME2500>
setenv serverip <IP address of TFTP server>
setenv gatewayip <gateway IP>
setenv netmask <netmask>
setenv bootargs 'root=/dev/ram rw console=ttyS0,9600n8
ramdisk_size=700000 cache-sram-size=0x10000'
saveenv
3. Transfer the files through the TFTP from the server to the local memory.
tftp 1000000 <kernel_image>
tftp 2000000 <ramdisk>
tftp C00000 <kernel dtb>
4. Boot the Linux from the memory.
bootm 1000000 2000000 c00000
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MVME2500 Installation and Use (6806800L01H)
Boot System
6.3.2
Booting from an Optional SATA Drive
1. Make sure that the kernel, dtb, and ramdiskare saved in the SATA drive with ext2
partition.
2. Configure U-Boot environment variable:
setenv File_uImage <kernel_image>
setenv File_dtp <kernel dtb>
setenv File_ramdisk <ramdisk>
saveenv
3. Copy the files from the SATA drive to the memory:
# option: scsi - interface, 0:1 - device 0 partition 1
ext2load scsi 0:1 1000000 $File_uImage
ext2load scsi 0:1 2000000 $File_ramdisk
ext2load scsi 0:1 c00000 $File_dtp
4. Boot the Linux in memory.
bootm 1000000 2000000 c00000
6.3.3
Booting from a USB Drive
1. Make sure that the kernel, dtb, and ramdiskare saved in the USB drive with FAT
partition.
2. Configure the U-Boot environment variable:
setenv File_uImage <kernel_image>
setenv File_dtp <kernel dtb>
setenv File_ramdisk <ramdisk>
saveenv
3. Initialize USB drive:
usb start
4. Load the files from the USB drive to the memory:
# option: usb - interface, 0:1 - device 0 partition 1
fatload usb 0:1 1000000 $File_uImage
fatload usb 0:1 2000000 $File_ramdisk
fatload usb 0:1 c00000 $File_dtb
5. Boot the Linux in memory:
bootm 1000000 2000000 c00000
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MVME2500 Installation and Use (6806800L01H)
Boot System
6.3.4
Booting from an SD Card
1. Make sure that the kernel, dtb, and ramdiskare saved in the SD card with FAT
partition.
2. Configure the U-Boot environment variable:
setenv File_uImage <kernel_image>
setenv File_dtp <kernel dtb>
setenv File_ramdisk <ramdisk>
saveenv
3. Initialize SD card:
mmcinfo
4. Load the files from the SD card to the memory:
# option: mmc - interface, 0:1 - device 0 partition 1
fatload mmc 0:1 1000000 $File_uImage
fatload mmc 0:1 2000000 $File_ramdisk
fatload mmc 0:1 c00000 $File_dtp
5. Boot the Linux in memory:
bootm 1000000 2000000 c00000
6.3.5
Booting VxWorks Through the Network
In this mode, the U-Boot downloads and boots VxWorks from an external TFTP server.
1. Make sure that the VxWorks image is accessible by the board from the TFTP server.
2. Configure U-Boot environment variables:
setenv ipaddr <IP address of MVME2500>
setenv serverip <IP address of TFTP server>
setenv gatewayip <gateway IP>
setenv netmask <netmask>
setenv vxboot 'tftpboot $vxbootfile && setenv bootargs
$vxbootargs && bootvx'
setenv vxbootfile <VxWorks_image>
setenv vxbootargs 'motetsec(0,0)<IP address of TFTP
server>:VxWorks h=<IP address of TFTP server> e=<IP address of
MVME2500>:ffffff00 b=<unused IP> u=vxworks pw=vxworks f=0x80'
saveenv
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Boot System
3. TFTP the files from the server to local memory, then boot:
run vxboot
6.4
Using the Persistent Memory Feature
Persistent memory means that the RAM's memory is not deleted during a reset. Power cycling,
or by temporarily removing the power and then powering up the blade again, will delete the
memory content. Persistent memory feature is enabled by default.
This feature can be useful in many situations, including:
Analyzing kernel logs after a Linux kernel panic
Defining a particular memory region for the persistent storage of application specific data
Analyzing Kernel Log Files after a Kernel Panic
When a board that is running the Linux OS indicates a kernel panic, issue a reset (through the
face plate button, for example) to analyze the cause, then subsequently analyze kernel log files.
The persistent memory feature keeps the log files available in the memory.
To analyze the kernel log files:
1. Issue a reset.
3. Enter the following command to obtain memory addresses of the kernel log
files:.locate_kernel_log (1)
The memory addresses of any found kernel log files will be displayed.
4. Enter the following command to display the kernel logfile at any of these memory
addresses: .printf (<memory address>)
The persistent memory is useful in application-specific data storage. The standard U-Boot
variable pram can be used to reserve a memory region at the end of the physical memory to
prevent it from being overwritten. U-Boot reports less memory to the Linux kernel through the
memparameter, indicating that the operating system should not use it either.
For more information, see the U-Boot documentation.
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6.5
MVME2500 Specific U-Boot Commands
Table 6-1 MVME2500 Specific U-Boot Commands
Command
base
Description
Print or set address offset
bdinfo
boot
Print board info structure
Boot default, i.e., run 'bootcmd'
Boot default, i.e., run 'bootcmd'
Boot from an ELF image in memory
Boot application image from memory
Boot image through network using BOOTP/TFTP protocol
Boot VxWorks from an ELF image
Memory compare
bootd
bootelf
bootm
bootp
bootvx
cmp
coninfo
cp
Print console devices and information
Memory copy
cpu
Multiprocessor CPU boot manipulation and release
Checksum calculation
crc32
date
Get/set/reset date & time
diags
echo
Runs POST diags
Echo args to console
exit
Exit script
ext2load
ext2ls
fatinfo
fatload
fatls
Load binary file from a Ext2 file system
List files in a directory (default /)
Print information about file system
Load binary file from a DOS file system
List files in a directory (default /)
Flattened device tree utility commands
Start application at address 'addr'
fdt
go
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Table 6-1 MVME2500 Specific U-Boot Commands (continued)
Command
help
Description
Print online help
i2c
I2C sub-system
iminfo
imxtract
interrupts
itest
Print header information for application image
Extract a part of a multi-image
Enable or disable interrupts
Return true/false on integer compare
Load binary file over serial line (kermit mode)
Load S-Record file over serial line
Load binary file over serial line (ymodem mode)
Infinite loop on address range
Memory display
loadb
loads
loady
loop
md
memmap
mii
Displays memory map
MII utility commands
mm
Memory modify (auto-incrementing address)
MMC sub system
mmc
mmcinfo
moninit
mtest
mw
Display MMC info
Reset nvram, serial#, and write monitor to SPI flash
Simple RAM read/write test
Memory write (fill)
nfs
Boot image through network using NFS protocol
Memory modify (constant address)
List and access PCI Configuration Space
Show information about devices on PCI bus
Send ICMP ECHO_REQUEST to network host
Print environment variables
nm
pci
pci_info
ping
printenv
rarpboot
reset
Boot image through network using RARP/TFTP protocol
Perform RESET of the CPU
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Table 6-1 MVME2500 Specific U-Boot Commands (continued)
Command
Description
run
Run commands in an environment variable
Save environment variables to persistent storage
Run a ';' delimited, ';;' terminated list of commands
SCSI sub-system
saveenv
script
scsi
scsiboot
setenv
setexpr
sf
Boot from SCSI device
Set environment variables
Set environment variable as the result of eval expression
SPI flash sub-system
showvar
sleep
Print local hushshell variables
Delay execution for some time
Soft reset the board
soft_reset
source
test
Run script from memory
Minimal test like /bin/sh
tftpboot
tsi148
usb
Boot image through network using TFTP protocol
Initialize and configure Tundra Tsi148
USB sub-system
usbboot
version
Boot from USB device
Print monitor version
6.6
Updating U-Boot
To update the U-Boot, place the image in the RAM (address 0x1000000 in this example) before
copying it to the SPI flash.
The following procedure will replace the image in SPI bank 0:
2. Ensure FLASH_WP_N in SMT Configuration Switch (S2) is in the "OFF" position.
3. Select SPI flash # 0:
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MVME2500 Installation and Use (6806800L01H)
Boot System
sf probe 0
4. Erase 0x90000 bytes starting at SPI address 0:
sf erase 0 0x90000
5. Write 0x90000 bytes from RAM address 0x1000000 starting at SPI address 0:
sf write 0x1000000 0 0x90000
To replace the image in SPI bank 1, replace step 2 with Select SPI flash # 1:
sf probe 1
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MVME2500 Installation and Use (6806800L01H)
Boot System
112
MVME2500 Installation and Use (6806800L01H)
Chapter 7
Programming Model
7.1
7.2
Overview
This chapter includes additional programming information for the MVME2500.
Reset Configuration
The MVME2500 supports the power-on reset (POR) pin sampling method for processor reset
configuration. Each option and the corresponding default setting are described in the
following table.
Table 7-1 POR Configuration Settings
CONFIG
CONFIG PINS
LA[29:31]
CONFIG
000
SELECTION
REMARKS
1
2
CCB Config
41: CCB CLOCK-400 MHz
8:1 DDR PLL-800 MHz
DDR PLL Config TSEC_1588_CLK_O
UT
001
DDR rate is twice the
value of the DDR
controller frequency,
which is then divided by
two through the
software.
TSEC_1588_PULSE_
OUT1
TSEC_1588_PULSE_
OUT2
3
4
5
Core 0 PLL
Core 1 PLL
LBCTL, LALE
110
100
3:1 CORE CLOCK PLL
(1200 MHz)
For 1200 MHz board
configuration
LGPL2/LOE/LFRE
2:1 CORE CLOCK PLL (800 For 800 MHz board
MHz)
configuration
LWE0, UART_SOUT1 110
100
3:1 CORE CLOCK PLL
(1200 MHz)
For 1200 MHz board
configuration
2:1 CORE CLOCK PLL (800 For 800 MHz board
MHz)
configuration
CPU Boot
Config
LA27, LA16
10
e500 core 0 is allowed to
boot without waiting for
configuration by an
external master, while
e500 core 1 is prevented
from booting until
configured by an external
master or the other core.
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Programming Model
Table 7-1 POR Configuration Settings (continued)
CONFIG
CONFIG PINS
CONFIG
11
SELECTION
REMARKS
6
7
Boot Sequence
LGPL3/LFWP, LGPL5
CFG_BOOT_SEQ[1:0] =
BOOT SEQUENCE
DISABLED
Memory Debug DMA2_DACK0
Config
1
1
Debug information from
the DDR SDRAM
controller is driven on the
MSPCID and MDVAL signs
(default)
8
DDR Debug
Config
DMA2_DDONE0
Debug information is not
driven on ECC pins. ECC
function in their normal
mode (default).
9
ELBCECC Enable MSRCID0
Config
0
1
1
0
1
0
1
Default operation: eLBC
ECC checking is disabled
10
11
12
13
14
15
16
Platform Speed LA23
CFG_PLAT_SPEED:1=CCB
CLOCK > = 333 MHz
CORE 0 Speed
CORE 1 Speed
LA24
LA26
LA26
CFG_CORE0_SPEED:1=C
ORE FREQ>= 1000 MHz
For 1200 MHz board
configuration
CFG_CORE0_SPEED:0=C
ORE FREQ<=1000 MHz
For 800 MHz board
configuration
CFG_CORE1_SPEED:1=C
ORE FREQ>=1000 MHz
For 1200 MHz board
configuration
CFG_CORE1_SPEED:0=C
ORE FREQ<=1000 MHz
For 800 MHz board
configuration
DDR Controller
Speed
CFG_DDR_SPEED:1=DDR
FREQ>= 500 MHz
Engineering use LA[22:20]
UART_SOUT[0],
111111
11
Default (for future use)
TRIG_OUT,
MSRCID[1],
MSRCID[4],
DMA1_DDONE_B[0]
17
SerDes Ref
Clock Config
TSEC_1588_ALARM
_OUT1
1
SerDes expects a 100
MHz reference clock
frequency (default).
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MVME2500 Installation and Use (6806800L01H)
Programming Model
Table 7-1 POR Configuration Settings (continued)
CONFIG
CONFIG PINS
LGPL1
CONFIG
1
SELECTION
REMARKS
18
ETSEC2 SGMII
Mode
eTSEC2 Ethernet
interface operates in
standard parallel
interface mode and uses
the TSEC_2’pins
(default).
19
ETSEC3 SGMMI
Mode
TSEC_1588_ALARM
_OUT2
1
eTSEC3 Ethernet
interface operates in
standard parallel
interface mode and uses
the TSEC_3’pins
(default).
20
21
ETSEC1 and
ETSEC2 Width
EC_MDC
0
eTSEC1 and eTSEC2
Ethernet interfaces
operate in reduced pin
mode (either RTBI, RGMI,
RMII or 8-bit FIFO mode).
ETSEC1
Protocol
TSEC1_TXD0,
TSEC1_TXD7
10
The eTSEC2 controller
operates using the GMII
protocol (or RGMII, if
configured in reduced
mode) if its not
configured to operate in
SGMII mode.
22
23
ETSEC2
Protocol
TSEC2_TXD0,
TSEC2_TXD7
10
10
The eTSEC2 controller
operates using the GMII
protocol (or RGMII, if
configured in reduced
mode) if its not
configured to operate in
SGMII mode.
ETSEC3
Protocol
UART_RTS0,
UART_RTS1
The eTSEC3 controller
operates using the RGMII
protocol if not configured
to operate in SGMII
mode.
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MVME2500 Installation and Use (6806800L01H)
Programming Model
Table 7-1 POR Configuration Settings (continued)
CONFIG
CONFIG PINS
CONFIG
011X
SELECTION
REMARKS
24
25
BOOT ROM
Location
TSEC1_TXD[6:4],
TSEC1_TX_ER
On-chip boot ROM-SPI
configuration (x=0),
SDHC (x=1)
Host/Agent
Config
LWE1/LBS1,
LA[18:19]
111
The processor acts as the
host/root complex for all
PCI-E/Serial Rapid IO
interfaces (default).
26
I/O Port Select
TSEC1_TXD[3:1],
TSEC2_TX_ER
0010
PCI-E 1 (x1) (2.5 Gbps) -
SerDes lane 0
PCI-E 2 (x1) (2.5 Gbps) -
SerDes lane 2
PCI-E 3 (x2) (2.5 Gbps) -
SerDes lane 2-3
27
28
DDR SDRAM
TYPE
TSEC2_TXD1
1
1
DDR31.5 V. CKE low at
reset (default)
SerDesPLLTime TRIG_OUT
Out Enable
Disable PLL lock time-out
counter. The power-on-
reset sequence waits
indefinitely for the SerDes
PLL to lock (default).
29
30
31
System Speed
LA[28]
1
1
SYSCLOCK is above 66
MHz
SDHC Card
Detect Polarity
TSEC2_TXD_5
Not Inverted
RAPID System
Size
Default
RapidIO is not used
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Programming Model
7.3
Interrupt Controller
The MVME2500 uses the MPC8548E integrated programmable interrupt controller (PIC) to
manage locally generated interrupts. Currently defined external interrupting devices and
interrupt assignments, along with corresponding edge/levels and polarities, are shown in the
following table.
Table 7-2 MVME2500 Interrupt List
Interrupt Usage
Interrupt Line
IRQ0
(Schematic)
Interface to CPU
Description
None
Reserved for VME interrupt
RTB Quart Interrupt
RTB Quart Interrupt
RTB Quart Interrupt
IRQ1
QUART_IRQ1
QUART_IRQ2
QUART_IRQ3
LBC
LBC
LBC
I2C
IRQ2
IRQ3
IRQ4
Temperature
Interrupt
Two onboard Thermal Sensors:
one is for CPU temp and the
other is for board temp
IRQ5
Ethernet 1
Ethernet 3
Ethernet 2
Management I2C
Management I2C
Management I2C
12C
Ethernet interrupt is handled by
PHY/ Connected for flexibility
IRQ6
Ethernet interrupt is handled by
PHY/ Connected for flexibility
IRQ7/ GPIO0
IRQ8/ GPIO1
Ethernet interrupt is handled by
PHY/ Connected for flexibility
RTC (Real Time
Clock)
IRQ9/ GPIO2
FPGA Interrupt
FPGA Interrupt
QUART_IRQ0
LBC
LBC
LBC
NMI and 3 Tick Timer Interrupts
Power Interruption
IRQ10// GPIO3
IRQ11// GPIO4
RTB Quart Interrupt
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MVME2500 Installation and Use (6806800L01H)
Programming Model
7.4
I2C Bus Device Addressing
The following table contains the I2C devices used for the MVME2500 and its assigned device
address.
Table 7-3 I2C Bus Device Addressing
I2C Bus Address
0x50
Device Function
SPD
Size
Notes
256 x 8
N/A
0x4C
ADT 7461 Temperature Sensor
DS 1375 real-time clock
VPD
0x68
N/A
0x54
8192 x 8
65536 x 8
65536 x 8
8192 X 8
N/A
1
0x52
User configuration
User configuration
RTM EEPROM
1
0x53
1
0x55
1, 2
3
0x56
XMC EEPROM
1. This is a dual address serial EEPROM.
2. The RTM Bus address can be manually changed through the S1 Switch on RTM. The default
switch configuration will set the address to 0x55. Make sure that the address is unique to
the RTM Bus address when setting the switch.
3. The address of the XMC EEPROM is configured through Geographic Address resistor on
board.
7.5
Ethernet PHY Address
The assigned Ethernet PHY on the MII management bus is shown in the following table.
Table 7-4 PHY Types and MII Management Bus Address
PHY MIIM
Ethernet Port Function / Location
TSEC1 Gigabit Ethernet port routed to front panel
PHY Types
BCM54616
Address
1
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MVME2500 Installation and Use (6806800L01H)
Programming Model
Table 7-4 PHY Types and MII Management Bus Address
PHY MIIM
Ethernet Port Function / Location
PHY Types
Address
TSEC2
Gigabit Ethernet port routed to front or back panel, BCM54616
set by GBE_MUX_SEL in S2
7
TSEC3
Gigabit Ethernet port routed to back panel
BCM54616
3
7.6
Other Software Considerations
This section provides programming information in relation to various board components.
7.6.1
MRAM
The MVME2500 provides 512 K bytes of fast, non-volatile storage in the form of
Magnetoresistive Random Access Memory (MRAM). The MRAM is directly accessible by
software using processor load and store instructions similar to the DRAM. The difference is that
the MRAM retains its contents even if the board is power cycled. The MRAM is accessed through
the LBC.
7.6.2
7.6.3
Real Time Clock
The MVME2500 provides a battery backed-up DS1375 Real Time Clock (RTC) chip. The RTC
chip provides time keeping and alarm interrupts. It is an I2C device and is accessed through the
I2C bus address at 0x68.
Quad UART
The MVME2500 console RS232 port is driven by the UART built into the P20x0 QorIQ chip.
Additionally, the MVME2500 has a Quad UART chip which provides four additional 16550
compatible UART. These additional UART are internally accessed through the LBC bus. The
Quad UART chip clock input (which is internally divided to generate the baud rate) is 1.8432
MHz. The four UART physically connect to RS232 DB9 serial ports through the RTM.
119
MVME2500 Installation and Use (6806800L01H)
Programming Model
7.6.4
LBC Timing Parameters
The following table defines the timing parameters for the devices on the local bus.
Table 7-5 LBC Timing Parameters
0
1
2
3
4
5
6
MRAM
UART 0
UART 1
UART 2
UART 3
FPGA
Timers
BCTLD
CSNT
ACS
0
0
0
0
0
0
0
1
1
1
1
1
1
1
10
10
10
10
10
10
10
XACS
SCY
0
0
0
0
0
0
0
0011
0011
0011
0011
0011
0011
0011
SETA
TRLX
EHTR
EAD
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Field Description
BCTLD
Buffer control disable.
0 - LBCTL is asserted upon access to the current memory bank.
CSNT
ACS
Chip Select negation time.
1 - LCSn and LWE are negated one quarter of the bus clock cycle earlier
Address to chip-select setup.
10 - LCSn is outputted one quarter bus clock cycle after the address lines.
XACS
SCY
Extra Address to chip-select setup
0 - Address to chip-select setup is determined by ORx[ACS]
Cycle length in bus clocks
0011 - Three bus clock cycle wait state
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MVME2500 Installation and Use (6806800L01H)
Programming Model
SETA
External address termination
0 - Access is terminated internally by the memory controller unless the
external device asserts LGTA earlier to terminate the access.
TRLX
EHTR
Timing Relaxed
0 - Normal timing is generated by the GPCM.
Extended hold time on read accesses.
0 - The memory controller generates normal timing. No additional cycles
are inserted
EAD
External address latch delay
0 - No additional bus clock cycles (LALE asserted for one bus clock cycle
only)
7.7
Clock Distribution
The clock function generates and distributes all of the clocks required for system operation.
The ICS9FG108 is used to generate all the required PCI-E clocks. The 25 MHz clocks for the
Ethernet PHY and SATA bridge are supplied by ICS83905. Most of the QorIQ P2020 clocks are
generated by ICS840S07I chip. Additional clocks required by individual devices are generated
near the devices using individual oscillators. The following table lists the clocks required on the
MVME2500 along with the frequency and source.
Table 7-6 Clock Distribution
Device
Clock Signal
Frequency
100MHz
100MHz
133Mhz
125Mhz
25Mhz
Clock Tree Source
ICS840S07I
VIO
QorIQ P20x0
QorIQ P20x0
QorIQ P20x0
QorIQ P20x0
ICS840S07I
88SE6121
CPU_SYSCLK
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
CPU_DDR_CLK
ICS840S07I
CLK_PCI_BR3
ICS840S07I
EC_GTX_CLK125
ICS840S07I
CLK_25MHZ_ICS840S07
CLK_88SE6121_25MHZ
CLK_25MHZ_ICS9FG108
BP_PHY_25MHZ_CLK
FP_PHY_25MHZ_CLK
ICS83905AGILF
ICS83905AGILF
ICS83905AGILF
ICS83905AGILF
ICS83905AGILF
25Mhz
ICS9FG108
BCM54616S
BCM54616S
25Mhz
25Mhz
25Mhz
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MVME2500 Installation and Use (6806800L01H)
Programming Model
Table 7-6 Clock Distribution (continued)
Device
Clock Signal
SW_25MHZ_CLK
CLK_XMC1
Frequency
25Mhz
Clock Tree Source
ICS83905AGILF
ICS9FG108
VIO
BCM54616S
XMC
+3.3V
DIFF
DIFF
DIFF
DIFF
DIFF
100MHz
100MHz
100MHz
100MHz
QorIQ P20x0
TSI384
SD_REF_CLK
CLK_PCIEC1
CLK_PCIEC3
ICS9FG109
ICS9FG110
TSI384
ICS9FG111
88SE6121
CLK_88SE6121_PCIE_100MH 100MHz
Z
ICS9FG112
FPGA
CLK_CPLD
1.8432MHz
Oscillator
Oscillator
FPGA
+3.3V
+3.3V
+3.3V
+3.3V
USB
CLK_USB_1_24MHZ
CPU_RTC
24MHz
1MHz
QorIQ P20x0
PMC
CLK_PMC1
33/66/100/133M
hz
TSI384
TSI148
RTC
CLK_PCI_BR3
CLK_32K
133Mhz
ICS840S07I
DS32KHz
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
32.768KHz
25MHz
FPGA
CPU_LCK0
QorIQ P20x0
FPGA
QUART
ICS83905
CLK_QUART
1.8432MHz
25Mhz
CLK_25MHZ_ICS9FG108
ICS83905AGILF
7.7.1
System Clock
The system and DDR clock is driven by ICS840S07I. The following table defines the clock
frequency.
Table 7-7 System Clock
SYSCLK
CORE
CCB Clock (Platform)
400 MHz
DDR3
LBC
100MHz
800/1200 MHz
400MHz
25MHz
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MVME2500 Installation and Use (6806800L01H)
Programming Model
7.7.2
7.7.3
Real Time Clock Input
The RTC clock input is driven by a 1 MHz clock generated by the FPGA. This provides a fixed
clock reference for the QorIQ P20x0 PIC timers which the software can use as a known time
reference.
Local Bus Controller Clock Divisor
The local bus controller (LBC) clock output is connected to the FPGA for LBC bus transaction. It
is also the source of 1 MHz (CPU_RTC) and FPGA tick timers.
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MVME2500 Installation and Use (6806800L01H)
Programming Model
124
MVME2500 Installation and Use (6806800L01H)
Replacing the Battery
The battery provides seven years of data retention, summing up all periods of actual data use.
Emerson therefore assumes that there is usually no need to replace the battery except, for
example, in case of long-term spare part handling.
Board/System Damage
Incorrect replacement of lithium batteries can result in a hazardous explosion.
When replacing the on-board lithium battery, make sure that the new and the old
battery are exactly the same battery models.
If the respective battery model is not available, contact your local Emerson sales
representative for the availability of alternative, officially approved battery models.
Data Loss
Replacing the battery can result in loss of time settings. Backup power prevents the loss
of data during replacement.
Quickly replacing the battery may save time settings.
Data Loss
If the battery has low or insufficient power the RTC is initialized.
Replace the battery before seven years of actual battery use have elapsed.
PCB and Battery Holder Damage
Removing the battery with a screw driver may damage the PCB or the battery holder. To
prevent damage, do not use a screw driver to remove the battery from its holder.
126
MVME2500 Installation and Use (6806800L01H)
Replacing the Battery
Replacement Procedure
To replace the battery, proceed as follows:
1. Remove the old battery.
2. Install the new battery with the plus sign (+) facing up.
3. Dispose of the old battery according to your country’s legislation and in an environmentally
safe way.
127
MVME2500 Installation and Use (6806800L01H)
Replacing the Battery
128
MVME2500 Installation and Use (6806800L01H)
Appendix B
B
Related Documentation
B.1
Emerson Network Power - Embedded
Computing Documents
The publications listed below are referenced in this manual. You can obtain electronic copies of
Emerson Network Power - Embedded Computing publications by contacting your local
Emerson sales office. For released products, you can also visit our Web site for the latest copies
of our product documentation.
website opens.
2. Click on Technical Documentation link.
3. Click on Search Our Technical Documentation Archive link.
4. In the Search box, type the publication number of the manual you are looking for.
Table B-1 Emerson Network Power - Embedded Computing Publications
Document Title
Publication Number
6806800L02B
6806800L03A
6806800L13A
6806800M42C
6806800M53A
6806800M54A
MVME2500 Release Notes
MVME2500 Quick Start Guide
MVME2500 Safety Notes
MVME7216 RTM Installation and Use
MVME7216 RTM Quick Start Guide
MVME7216 RTM Safety Notes
129
MVME2500 Installation and Use (6806800L01H)
Related Documentation
B.2
Manufacturers’ Documents
For additional information, refer to the following table for manufacturers’ data sheets or user
manuals. As an additional help, a source for the listed document is provided. Please note that
while these sources have been verified, the information is subject to change without notice.
Table B-2 Manufacturers’ Publications
Company
Freescale
Document
Freescale Semiconductor, QorIQ™ P2020 Integrated Processor Reference
Manual, Rev. 0
Tundra
Tsi148™ PCI/X-to-VME Bus Bridge User Manual, March 2009
Semiconductor
Corporation
B.3
Related Specifications
For additional information, refer to the following table for related specifications. As an
additional help, a source for the listed document is provided. Please note that, while these
sources have been verified, the information is subject to change without notice.
Table B-3 Related Specifications
Organization
Document
American National
Standards Institute
ANSI/VITA 1.0-1994 (R2002), VME64 Standard
ANSI/VITA 1.1-1997 (R2003), VME64x Extensions
ANSI/VITA 1.5-2003, VME 2eSST
(ANSI)
VITA Standards
Organization
ANSI/VITA 35-2000, Pin Assignments for PMC P4 Connector
ANSI/VITA 39-2003, PCI-X for PMC and Processor PMC
VITA Standards
Organization
XMC - High Speed, Switched Interconnect Protocols on PMC VITA 42.0 -
2005
XMC General Purpose I/O Standard VITA 42.10
XMC PCI Express Protocol Layer Standard VITA 42.3 - 2006
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Related Documentation
Table B-3 Related Specifications
Organization
IEEE
Document
IEEE 802.3 LAN/MAN CSMA/CD Access Method IEEE 802.3-2005
IEEE Standard for a Common Mezzanine Card (CMC) Family IEEE Std
1386-2001
IEEE Standard Physical and Environmental Layers for PCI Mezzanine Cards
(PMC) IEEE Std 1386.1-2001
IEEE Standard Test Access Port and Boundary-Scan Architecture IEEE Std
1149.1-2001
Low Pin Count Interface Specification (LPC) Revision 1.1
PCI Express Base Specification Revision 2.0
PCI Local Bus Specification PCI Rev 3.0
Peripheral Component
Interconnect Special
Interest Group
PCI-X Electrical and Mechanical Addendum to the PCI Local Bus
Specification (PCI-X EM) Revision 2.0a
(PCI-SIG)
PCI-X Protocol Addendum to the PCI Local Bus Specification (PCI-X PT)
Revision 2.0a
Serial ATA International
Organization
Serial ATA (SATA) Specification Revision 2.6
Serial ATA II: Extensions to Serial ATA 1.0 Revision 1.0
(SATA-IO)
Trusted Computing
Group (TCG)
TPM Specification 1.2, Level 2 Revision 103 Version 1.2
Universal Serial Bus Specification (USB) Revision 2.0
USB Implementers
Forum (USB-IF)
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Related Documentation
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MVME2500 Installation and Use (6806800L01H)
Safety Notes
This section provides warnings that precede potentially dangerous procedures throughout
this manual. Instructions contained in the warnings must be followed during all phases of
operation, service, and repair of this equipment. You should also employ all other safety
precautions necessary for the operation of the equipment in your operating environment.
Failure to comply with these precautions or with specific warnings elsewhere in this manual
could result in personal injury or damage to the equipment.
Emerson intends to provide all necessary information to install and handle the product in this
manual. Because of the complexity of this product and its various uses, we do not guarantee
that the given information is complete. If you need additional information, ask your Emerson
representative.
This product is a Safety Extra Low Voltage (SELV) device designed to meet the EN60950-1
requirements for Information Technology Equipment. The use of the product in any other
application may require safety evaluation specific to that application.
Only personnel trained by Emerson or persons qualified in electronics or electrical engineering
are authorized to install, remove or maintain the product.
The information given in this manual is meant to complete the knowledge of a specialist and
must not be used as replacement for qualified personnel.
Keep away from live circuits inside the equipment. Operating personnel must not remove
equipment covers. Only Factory Authorized Service Personnel or other qualified service
personnel may remove equipment covers for internal subassembly or component replacement
or any internal adjustment.
Do not install substitute parts or perform any unauthorized modification of the equipment or
the warranty may be voided. Contact your local Emerson representative for service and repair
to make sure that all safety features are maintained.
EMC (Results pending testing)
This equipment has been tested and found to comply with the limits for a Class A digital device,
pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable
protection against harmful interference when the equipment is operated in a commercial
environment. This equipment generates, uses, and can radiate radio frequency energy and, if
not installed and used in accordance with the instruction manual, may cause harmful
interference to radio communications.
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MVME2500 Installation and Use (6806800L01H)
Safety Notes
Operation of this equipment in a residential area is likely to cause harmful interference in which
case the user will be required to correct the interference at his own expense. Changes or
modifications not expressly approved by Emerson Network Power could void the user's
authority to operate the equipment. Board products are tested in a representative system to
show compliance with the above mentioned requirements. A proper installation in a
compliant system will maintain the required performance. Use only shielded cables when
connecting peripherals to assure that appropriate radio frequency emissions compliance is
maintained.
Operation
Product Damage
High humidity and condensation on the board surface causes short circuits.
Do not operate the board outside the specified environmental limits.
Make sure the board is completely dry and there is no moisture on any surface before applying
power.
Damage of Circuits
Electrostatic discharge and incorrect installation and removal can damage circuits or shorten
its life.
Before touching the board or electronic components, make sure that you are working in an
ESD-safe environment.
Board Malfunction
Switches marked as “reserved” might carry production-related functions and can cause the
board to malfunction if their setting is changed.
Do not change settings of switches marked as “reserved”. The setting of switches which are
not marked as “reserved” has to be checked and changed before board installation.
Installation
Data Loss
Powering down or removing a board before the operating system or other software running
on the board has been properly shut down may cause corruption of data or file systems.
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MVME2500 Installation and Use (6806800L01H)
Safety Notes
Make sure all software is completely shut down before removing power from the board or
removing the board from the chassis.
Product Damage
Only use injector handles for board insertion to avoid damage to the front panel and/or PCB.
Deformation of the front panel can cause an electrical short or other board malfunction.
Product Damage
Inserting or removing modules with power applied may result in damage to module
components.
Before installing or removing additional devices or modules, read the documentation that
came with the product.
Cabling and Connectors
Product Damage
RJ-45 connectors on modules are either twisted-pair Ethernet (TPE) or E1/T1/J1 network
interfaces. Connecting an E1/T1/J1 line to an Ethernet connector may damage your system.
Make sure that TPE connectors near your working area are clearly marked as network
connectors.
Verify that the length of an electric cable connected to a TPE bushing does not exceed 100
meters.
Make sure the TPE bushing of the system is connected only to safety extra low voltage
circuits (SELV circuits).
If in doubt, ask your system administrator.
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MVME2500 Installation and Use (6806800L01H)
Safety Notes
Battery
Board/System Damage
Incorrect exchange of lithium batteries can result in a hazardous explosion.
When exchanging the on-board lithium battery, make sure that the new and the old
battery are exactly the same battery models.
If the respective battery model is not available, contact your local Emerson sales
representative for the availability of alternative, officially approved battery models.
Data Loss
Exchanging the battery can result in loss of time settings. Backup power prevents the loss of
data during exchange.
Quickly replacing the battery may save time settings.
Data Loss
If the battery has low or insufficient power the RTC is initialized.
Exchange the battery before seven years of actual battery use have elapsed.
PCB and Battery Holder Damage
Removing the battery with a screw driver may damage the PCB or the battery holder. To
prevent damage, do not use a screw driver to remove the battery from its holder.
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MVME2500 Installation and Use (6806800L01H)
Sicherheitshinweise
Dieses Kapitel enthält Hinweise, die potentiell gefährlichen Prozeduren innerhalb dieses
Handbuchs vorrangestellt sind. Beachten Sie unbedingt in allen Phasen des Betriebs, der
Wartung und der Reparatur des Systems die Anweisungen, die diesen Hinweisen enthalten
sind. Sie sollten außerdem alle anderen Vorsichtsmaßnahmen treffen, die für den Betrieb des
Produktes innerhalb Ihrer Betriebsumgebung notwendig sind. Wenn Sie diese
Vorsichtsmaßnahmen oder Sicherheitshinweise, die an anderer Stelle diese Handbuchs
enthalten sind, nicht beachten, kann das Verletzungen oder Schäden am Produkt zur Folge
haben.
Emerson ist darauf bedacht, alle notwendigen Informationen zum Einbau und zum Umgang
mit dem Produkt in diesem Handbuch bereit zu stellen. Da es sich jedoch um ein komplexes
Produkt mit vielfältigen Einsatzmöglichkeiten handelt, können wir die Vollständigkeit der im
Handbuch enthaltenen Informationen nicht garantieren. Falls Sie weitere Informationen
benötigen sollten, wenden Sie sich bitte an die für Sie zuständige Geschäftsstelle von Emerson.
Das Produkt wurde entwickelt, um die Sicherheitsanforderungen für SELV Geräte nach der
Norm EN 60950-1 für informationstechnische Einrichtungen zu erfüllen. Die Verwendung des
Produkts in einer anderen Anwendung erfordert eine Sicherheitsüberprüfung für diese
spezifische Anwendung.
Einbau, Wartung und Betrieb dürfen nur von durch Emerson ausgebildetem oder im Bereich
Elektronik oder Elektrotechnik qualifiziertem Personal durchgeführt werden. Die in diesem
Handbuch enthaltenen Informationen dienen ausschließlich dazu, das Wissen von
Fachpersonal zu ergänzen, können dieses jedoch nicht ersetzen.
Halten Sie sich von stromführenden Leitungen innerhalb des Produktes fern. Entfernen Sie auf
keinen Fall Abdeckungen am Produkt. Nur werksseitig zugelassenes Wartungspersonal oder
anderweitig qualifiziertes Wartungspersonal darf Abdeckungen entfernen, um Komponenten
zu ersetzen oder andere Anpassungen vorzunehmen.
Installieren Sie keine Ersatzteile oder führen Sie keine unerlaubten Veränderungen am Produkt
durch, sonst verfällt die Garantie. Wenden Sie sich für Wartung oder Reparatur bitte an die für
Sie zuständige Geschäftsstelle von Emerson. So stellen Sie sicher, dass alle
sicherheitsrelevanten Aspekte beachtet werden.
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Sicherheitshinweise
EMV
Das Produkt wurde in einem Emerson Standardsystem getestet. Es erfüllt die für digitale
Geräte der Klasse A gültigen Grenzwerte in einem solchen System gemäß den FCC-Richtlinien
Abschnitt 15 bzw. EN 55022 Klasse A. Diese Grenzwerte sollen einen angemessenen Schutz
vor Störstrahlung beim Betrieb des Produktes in Gewerbe- sowie Industriegebieten
gewährleisten.
Das Produkt arbeitet im Hochfrequenzbereich und erzeugt Störstrahlung. Bei
unsachgemäßem Einbau und anderem als in diesem Handbuch beschriebenen Betrieb können
Störungen im Hochfrequenzbereich auftreten.
Wird das Produkt in einem Wohngebiet betrieben, so kann dies mit grosser Wahrscheinlichkeit
zu starken Störungen führen, welche dann auf Kosten des Produktanwenders beseitigt werden
müssen. Änderungen oder Modifikationen am Produkt, welche ohne ausdrückliche
Genehmigung von Emerson Network Power durchgeführt werden, können dazu führen, dass
der Anwender die Genehmigung zum Betrieb des Produktes verliert. Boardprodukte werden
in einem repräsentativen System getestet, um zu zeigen, dass das Board den oben
aufgeführten EMV-Richtlinien entspricht. Eine ordnungsgemässe Installation in einem System,
welches die EMV-Richtlinien erfüllt, stellt sicher, dass das Produkt gemäss den EMV-Richtlinien
betrieben wird. Verwenden Sie nur abgeschirmte Kabel zum Anschluss von Zusatzmodulen. So
ist sichergestellt, dass sich die Aussendung von Hochfrequenzstrahlung im Rahmen der
erlaubten Grenzwerte bewegt.
Warnung! Dies ist eine Einrichtung der Klasse A. Diese Einrichtung kann im Wohnbereich
Funkstörungen verursachen. In diesem Fall kann vom Betreiber verlangt werden,
angemessene Maßnahmen durchzuführen.
Betrieb
1 Beschädigung des Produktes
Hohe Luftfeuchtigkeit und Kondensat auf der Oberfläche des Produktes können zu
Kurzschlüssen führen.
Betreiben Sie das Produkt nur innerhalb der angegebenen Grenzwerte für die
relative Luftfeuchtigkeit und Temperatur. Stellen Sie vor dem Einschalten des
Stroms sicher, dass sich auf dem Produkt kein Kondensat befindet.
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MVME2500 Installation and Use (6806800L01H)
Sicherheitshinweise
Beschädigung von Schaltkreisen
Elektrostatische Entladung und unsachgemäßer Ein- und Ausbau des Produktes kann
Schaltkreise beschädigen oder ihre Lebensdauer verkürzen.
Bevor Sie das Produkt oder elektronische Komponenten berühren, vergewissern Sie
sich, daß Sie in einem ESD-geschützten Bereich arbeiten.
Fehlfunktion des Produktes
Schalter, die mit 'Reserved' gekennzeichnet sind, können mit produktionsrelevanten
Funktionen belegt sein. Das Ändern dieser Schalter kann im normalen Betrieb Störungen
auslösen.
Verstellen Sie nur solche Schalter, die nicht mit 'Reserved' gekennzeichnet sind.
Prüfen und ggf. ändern Sie die Einstellungen der nicht mit 'Reserved'
gekennzeichneten Schalter, bevor Sie das Produkt installieren.
Installation
Datenverlust
Das Herunterfahren oder die Deinstallation eines Boards bevor das Betriebssystem oder
andere auf dem Board laufende Software ordnungsmemäss beendet wurde, kann zu
partiellem Datenverlust sowie zu Schäden am Filesystem führen.
Stellen Sie sicher, dass sämtliche Software auf dem Board ordnungsgemäss
beendet wurde, bevor Sie das Board herunterfahren oder das Board aus dem
Chassis entfernen.
Beschädigung des Produktes
Fehlerhafte Installation des Produktes kann zu einer Beschädigung des Produktes führen.
Verwenden Sie die Handles, um das Produkt zu installieren/deinstallieren. Auf diese
Weise vermeiden Sie, dass das Face Plate oder die Platine deformiert oder zerstört
wird.
Beschädigung des Produktes und von Zusatzmodulen
Fehlerhafte Installation von Zusatzmodulen, kann zur Beschädigung des Produktes und der
Zusatzmodule führen.
Lesen Sie daher vor der Installation von Zusatzmodulen die zugehörige
Dokumentation.
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MVME2500 Installation and Use (6806800L01H)
Sicherheitshinweise
Kabel und Stecker
Beschädigung des Produktes
Bei den RJ-45-Steckern, die sich an dem Produkt befinden, handelt es sich entweder um
Twisted-Pair-Ethernet (TPE) oder um E1/T1/J1-Stecker. Beachten Sie, dass ein versehentliches
Anschließen einer E1/T1/J1-Leitung an einen TPE-Stecker das Produkt zerstören kann.
Kennzeichnen Sie deshalb TPE-Anschlüsse in der Nähe Ihres Arbeitsplatzes deutlich als
Netzwerkanschlüsse.
Stellen Sie sicher, dass die Länge eines mit Ihrem Produkt verbundenen TPE-Kabels 100 m
nicht überschreitet.
Das Produkt darf über die TPE-Stecker nur mit einem Sicherheits-Kleinspannungs-
Stromkreis (SELV) verbunden werden.
Bei Fragen wenden Sie sich an Ihren Systemverwalter.
Batterie
Beschädigung des Blades
Ein unsachgemäßer Einbau der Batterie kann gefährliche Explosionen und
Beschädigungen des Blades zur Folge haben.
Verwenden Sie deshalb nur den Batterietyp, der auch bereits eingesetzt wurde und
befolgen Sie die Installationsanleitung.
Datenverlust
Wenn Sie die Batterie austauschen, können die Zeiteinstellungen verloren gehen. Eine
Backupversorgung verhindert den Datenverlust während des Austauschs.
Wenn Sie die Batterie schnell austauschen, bleiben die Zeiteinstellungen möglicherweise
erhalten.
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MVME2500 Installation and Use (6806800L01H)
Sicherheitshinweise
Datenverlust
Wenn die Batterie wenig oder unzureichend mit Spannung versorgt wird, wird der RTC
initialisiert.
Tauschen Sie die Batterie aus, bevor sieben Jahre tatsächlicher Nutzung vergangen sind.
Schäden an der Platine oder dem Batteriehalter
Wenn Sie die Batterie mit einem Schraubendreher entfernen, können die Platine oder der
Batteriehalter beschädigt werden.
Um Schäden zu vermeiden, sollten Sie keinen Schraubendreher zum Ausbau der Batterie
verwenden.
Umweltschutz
Entsorgen Sie alte Batterien und/oder Blades/Systemkomponenten/RTMs stets gemäß der in
Ihrem Land gültigen Gesetzgebung, wenn möglich immer umweltfreundlich.
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MVME2500 Installation and Use (6806800L01H)
Sicherheitshinweise
142
MVME2500 Installation and Use (6806800L01H)
Index
MVME2500 Installation and Use (6806800L01H)
144
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