FUJITSU SEMICONDUCTOR
DATA SHEET
DS04-27709-3E
ASSP For Power Supply Applications (Secondary battery)
DC/DC Converter IC
for Charging Li-ion battery
MB3887
■ DESCRIPTION
The MB3887 is a DC/DC converter IC suitable for down-conversion, using pulse-width (PWM) charging and
enabling output voltage to be set to any desired level from one cell to four cells.
These ICs can dynamically control the secondary battery’s charge current by detecting a voltage drop in an AC
adapter in order to keep its power constant (dynamically-controlled charging) .
The charging method enables quick charging, for example, with the AC adapter during operation of a notebook PC.
The MB3887 provides a broad power supply voltage range and low standby current as well as high efficiency,
making it ideal for use as a built-in charging device in products such as notebook PC.
This product is covered by US Patent Number 6,147,477.
■ FEATURES
• Detecting a voltage drop in the AC adapter and dynamically controlling the charge current
(Dynamically-controlled charging)
(Continued)
■ PACKAGE
24-pin plastic SSOP
(FPT-24P-M03)
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MB3887
■ PIN ASSIGNMENT
(TOP VIEW)
−INC2 :
OUTC2 :
+INE2 :
−INE2 :
FB2 :
1
2
3
4
5
6
7
8
9
24 : +INC2
23 : GND
22 : CS
21 : VCC (O)
20 : OUT
19 : VH
VREF :
FB1 :
18 : VCC
17 : RT
−INE1 :
+INE1 :
16 : −INE3
15 : FB3
14 : CTL
13 : +INC1
OUTC1 : 10
OUTD : 11
−INC1 : 12
(FPT-24P-M03)
3
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MB3887
■ PIN DESCRIPTION
Pin No.
Symbol
−INC2
OUTC2
+INE2
−INE2
FB2
I/O
I
Descriptions
1
2
Current detection amplifier (Current Amp2) input terminal.
Current detection amplifier (Current Amp2) output terminal.
Error amplifier (Error Amp2) non-inverted input terminal.
Error amplifier (Error Amp2) inverted input terminal.
Error amplifier (Error Amp2) output terminal.
O
I
3
4
I
5
O
O
O
I
6
VREF
FB1
Reference voltage output terminal.
7
Error amplifier (Error Amp1) output terminal.
8
−INE1
+INE1
OUTC1
Error amplifier (Error Amp1) inverted input terminal
Error amplifier (Error Amp1) non-inverted input terminal.
Current detection amplifier (Current Amp1) output terminal.
9
I
10
O
With IC in standby mode, this terminal is set to “Hi-Z” to prevent loss
of current through output voltage setting resistance.
Set CTL terminal to “H” level to output “L” level.
11
OUTD
O
12
13
−INC1
+INC1
I
I
Current detection amplifier (Current Amp1) input terminal.
Current detection amplifier (Current Amp1) input terminal.
Power supply control terminal.
14
CTL
I
Setting the CTL terminal at “L” level places the IC in the standby
mode.
15
16
FB3
O
I
Error amplifier (Error Amp3) output terminal.
−INE3
Error amplifier (Error Amp3) inverted input terminal.
Triangular-wave oscillation frequency setting resistor connection
terminal.
17
RT
18
19
20
21
22
23
24
VCC
VH
Power supply terminal for reference power supply and control circuit.
Power supply terminal for FET drive circuit (VH = VCC − 6 V) .
External FET gate drive terminal.
O
O
OUT
VCC (O)
CS
Output circuit power supply terminal.
Soft-start capacitor connection terminal.
GND
+INC2
Ground terminal.
I
Current detection amplifier (Current Amp2) input terminal.
4
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MB3887
■ BLOCK DIAGRAM
8
−INE1
OUTC1
+INC1
10
13
<Error Amp1>
VREF
<Current Amp1>
+
× 20
−
−
+
12
9
−INC1
+INE1
21 VCC (O)
<PWM Comp.>
<OUT>
+
+
+
−
7
4
FB1
20
19
Drive
OUT
VH
−INE2
<Error Amp2>
2
OUTC2
<Current Amp2>
VCC
VREF
24
+
× 20
−
+INC2
−
+
Bias
Voltage
<VH>
1
3
−INC2
+INE2
(VCC − 6 V)
2.5 V
1.5 V
<UVLO>
FB2 5
<Error Amp3>
VCC
VREF
(VCC UVLO)
215 kΩ
+
16
11
−
+
+
−INE3
35 kΩ
OUTD
−
4.2 V
0.91 V
(0.77 V)
FB3
CS
15
22
VREF
UVLO
<SOFT>
VREF
10
µA
VCC
4.2 V
18
14
VCC
CTL
<OSC>
<REF>
VREF
<CTL>
45 pF
5.0 V
bias
17
RT
6
23
GND
VREF
5
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MB3887
■ ABSOLUTE MAXIMUM RATINGS
Rating
Parameter
Symbol
Conditions
Unit
Min
Max
28
Power supply voltage
Output current
VCC
IOUT
VCC, VCC (O) terminal
V
60
mA
Duty ≤ 5 %
(t = 1 / fOSC × Duty)
Peak output current
IOUT
700
mA
Power dissipation
PD
Ta ≤ +25 °C
740*
mW
Storage temperature
TSTG
−55
+125
°C
* : The package is mounted on the dual-sided epoxy board (10 cm × 10 cm) .
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
6
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MB3887
■ RECOMMENDED OPERATING CONDITIONS
Value
Typ
Parameter
Symbol
Conditions
Unit
Min
Max
Power supply voltage
VCC
IREF
IVH
VCC, VCC (O) terminal
8
25
V
mA
mA
V
Reference voltage output
current
−1
0
0
30
VH terminal output current
−INE1 to −INE3, +INE1,
+INE2 terminal
VINE
0
VCC − 1.8
Input voltage
+INC1, +INC2, −INC1,
−INC2 terminal
VINC
VOUTD
IOUTD
0
0
0
VCC
17
2
V
V
OUTD terminal
output voltage
OUTD terminal
output current
mA
CTL terminal input voltage
Output current
VCTL
IOUT
0
25
V
−45
+45
mA
Duty ≤ 5 %
(t = 1 / fosc × Duty)
Peak output current
IOUT
−600
+600
mA
Oscillation frequency
Timing resistor
fOSC
RT
100
27
290
47
500
130
1.0
1.0
kHz
kΩ
µF
Soft-start capacitor
VH terminal capacitor
CS
0.022
0.1
CVH
µF
Reference voltage output
capacitor
CREF
0.1
1.0
µF
°C
Operating ambient
temperature
Ta
−30
+25
+85
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
7
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MB3887
■ ELECTRICAL CHARACTERISTICS
(Ta = +25 °C, VCC = 19 V, VCC (O) = 19 V, VREF = 0 mA)
Value
Sym- Pin
Parameter
Conditions
Unit
bol
No.
Min
4.967
4.95
Typ
5.000
5.00
3
Max
5.041
5.05
10
VREF1
VREF2
Line
6
6
6
6
Ta = +25 °C
V
V
Output voltage
Ta = −10 °C to +85 °C
VCC = 8 V to 25 V
1.
Reference
voltage block
[REF]
Input stability
Load stability
mV
mV
Load
VREF = 0 mA to −1 mA
1
10
Short-circuit output
current
Ios
VTLH
VTHL
6
VREF = 1 V
−50
6.2
5.2
−25
6.4
5.4
−12
6.6
5.6
mA
V
VCC = VCC (O) ,
VCC =
18
18
Threshold voltage
2.
VCC = VCC (O) ,
VCC =
V
Under voltage
lockout protec-
tion circuit
block
Hysteresis width
Threshold voltage
Hysteresis width
VH
VTLH
VTHL
VH
18 VCC = VCC (O)
1.0*
2.8
2.6
0.2
V
V
V
V
6
6
6
VREF =
VREF =
2.6
2.4
3.0
2.8
[UVLO]
3.
Soft-start block Charge current
[SOFT]
ICS
22
−14
−10
−6
µA
4.
Oscillation
frequency
fOSC
20 RT = 47 kΩ
260
290
320
kHz
Triangular
waveform os-
cillator circuit
block
Frequency
temperature
stability
∆f/fdt 20 Ta = −30 °C to +85 °C
1*
%
[OSC]
3, 4,
8, 9
Input offset voltage
Input bias current
VIO
FB1 = FB2 = 2 V
1
5
mV
nA
3, 4,
8, 9
IB
−100
−30
In-phase input
voltage range
3, 4,
8, 9
VCM
AV
0
VCC − 1.8
V
5-1.
Error amplifier
block
[Error Amp1,
Error Amp2]
Voltage gain
5, 7 DC
100*
2*
dB
Frequency
bandwidth
BW
5, 7 AV = 0 dB
MHz
VFBH
VFBL
5, 7
5, 7
4.7
4.9
20
V
Output voltage
200
mV
Output source
current
ISOURCE 5, 7 FB1 = FB2 = 2 V
ISINK 5, 7 FB1 = FB2 = 2 V
−2
−1
mA
Output sink current
150
300
µA
* : Standard design value.
(Continued)
8
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MB3887
(Ta = +25 °C, VCC = 19 V, VCC (O) = 19 V, VREF = 0 mA)
Value
Sym- Pin
Parameter
Conditions
Unit
bol
No.
Min
Typ
Max
VTH1
16 FB3 = 2 V, Ta = +25 °C 4.183
FB3 = 2 V,
4.200
4.225
V
V
Threshold voltage
VTH2
16
4.169
4.200
4.231
Ta = −10 °C to +85 °C
Input current
Voltage gain
IINE3
16 −INE3 = 0 V
−100
−30
nA
dB
AV
15 DC
100*
Frequency
bandwidth
BW
15 AV = 0 dB
2*
MHz
5-2.
Error amplifier
block
[Error Amp3]
VFBH
15
15
4.7
4.9
20
V
Output voltage
VFBL
200
mV
Output source
current
ISOURCE 15 FB3 = 2 V
−2
300
0
−1
mA
µA
µA
Output sink current
ISINK
ILEAK
15 FB3 = 2 V
150
OUTD terminal
output leak current
11 OUTD = 17 V
1
OUTD terminal
output ON resistor
RON
VIO
11 OUTD = 1 mA
35
50
Ω
1,
12, +INC1 = +INC2 = −INC1
13, = −INC2 = 3 V to VCC
24
Input offset voltage
−3
+3
mV
6.
+INC1 = +INC2 =
13,
Current detec-
tion amplifier
block
[Current
Amp1, Current
Amp2]
I+INCH
3 V to VCC,
24
20
30
µA
µA
∆VIN = −100 mV
+INC1 = +INC2 =
I−INCH 1, 12 3 V to VCC,
0.1
0.2
Input current
∆Vin = −100 mV
13, +INC1 = +INC2 = 0 V,
24 ∆Vin = −100 mV
I+INCL
−180
−195
−120
−130
µA
µA
+INC1 = +INC2 = 0 V,
I−INCL 1, 12
∆Vin = −100 mV
* : Standard design value
(Continued)
9
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MB3887
(Ta = +25 °C, VCC = 19 V, VCC (O) = 19 V, VREF = 0 mA)
Value
Sym- Pin
bol No.
Parameter
Conditions
Unit
Min
Typ
Max
+INC1 = +INC2 =
VOUTC1 2, 10 3 V to VCC,
1.9
2.0
2.1
V
∆Vin = −100 mV
+INC1 = +INC2 =
VOUTC2 2, 10 3 V to VCC,
0.34
1.8
0.40
2.0
0.46
2.2
V
V
V
∆Vin = −20 mV
Current detection
voltage
+INC1 = +INC2 =
VOUTC3 2, 10 0 V to 3 V,
∆Vin = −100 mV
+INC1 = +INC2 =
VOUTC4 2, 10 0 V to 3 V,
0.2
0.4
0.6
∆Vin = −20 mV
6.
Current
1,
detection
In-phase input
voltage range
12,
13,
24
VCM
0
VCC
21
V
amplifier block
[CurrentAmp1,
Current Amp2]
+INC1 = +INC2 =
Voltage gain
AV
2, 10 3 V to VCC,
19
20
2*
V/V
∆Vin = −100 mV
Frequency
bandwidth
BW 2, 10 AV = 0 dB
MHz
VOUTCH 2, 10
4.7
4.9
20
V
Output voltage
VOUTCL 2, 10
200
mV
Output source
current
ISOURCE 2, 10 OUTC1 = OUTC2 = 2 V
−2
300
1.5
−1
mA
µA
V
Output sink cur-
rent
ISINK
2, 10 OUTC1 = OUTC2 = 2 V
150
1.4
7.
PWM
5, 7,
15
VTL
Duty cycle = 0 %
comparator
block
[PWM Comp.]
Threshold voltage
5, 7,
15
VTH
Duty cycle = 100 %
2.5
2.6
V
* : Standard design value
(Continued)
10
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MB3887
(Continued)
(Ta = +25 °C, VCC = 19 V, VCC (O) = 19 V, VREF = 0 mA)
Value
Sym- Pin
Parameter
Output source
Conditions
Unit
bol
No.
Min
Typ
Max
OUT = 13 V, Duty ≤ 5 %
(t = 1 / fOSC × Duty)
ISOURCE
20
−400*
mA
mA
current
Output sink
current
OUT = 19 V, Duty ≤ 5 %
(t = 1 / fOSC × Duty)
ISINK
20
400*
8.
ROH
ROL
20 OUT = −45 mA
20 OUT = 45 mA
6.5
5.0
9.8
7.5
Ω
Ω
Output ON
resistor
Output block
[OUT]
OUT = 3300 pF
20
Rise time
Fall time
tr1
tf1
50*
50*
ns
ns
(Si4435 × 1)
OUT = 3300 pF
20
(Si4435 × 1)
VON
VOFF
ICTLH
ICTLL
14 IC Active mode
14 IC Standby mode
14 CTL = 5 V
2
0
25
0.8
150
1
V
V
CTL input voltage
Input current
9.
Control block
[CTL]
100
0
µA
µA
14 CTL = 0 V
10.
Bias voltage
block
VCC = VCC (O)
19 = 8 V to 25 V,
VH = 0 to 30 mA
Output voltage
Standby current
VH
VCC − 6.5 VCC − 6.0 VCC − 5.5
V
[VH]
VCC = VCC (O) ,
CTL = 0 V
ICCS
ICC
18
0
8
10
12
µA
11.
General
Power supply cur-
rent
VCC = VCC (O) ,
CTL = 5 V
18
mA
* : Standard design value
11
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MB3887
■ TYPICAL CHARACTERISTICS
Power supply current vs. Power supply voltage
Reference voltage vs. Power supply voltage
6
6
Ta = +25 °C
CTL = 5 V
5
4
3
2
1
0
5
4
3
2
Ta = +25 °C
CTL = 5 V
1
VREF = 0 mA
0
0
5
10
15
20
25
0
5
10
15
20
25
Power supply voltage VCC (V)
Power supply voltage VCC (V)
Reference voltage vs. IREF load current
Reference voltage vs. Ambient temperature
6
5
4
3
2
1
0
5.08
Ta = +25 °C
VCC = 19 V
CTL = 5 V
VCC = 19 V
5.06
CTL = 5 V
5.04
5.02
5.00
4.98
4.96
4.94
4.92
0
5
10
15
20
25
30
−40 −20
0
20
40
60
80
100
IREF load current IREF (mA)
Ambient temperature Ta ( °C)
CTL terminal current, Reference voltage
vs. CTL terminal voltage
1000
900
800
700
600
500
400
300
200
100
0
10
9
8
7
6
5
4
3
2
1
0
Ta = +25 °C
VCC = 19 V
VREF
ICTL
0
5
10
15
20
25
CTL terminal voltage VCTL (V)
(Continued)
12
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MB3887
Triangular wave oscillation frequency
vs. Timing resistor
Triangular wave oscillation frequency
vs. Power supply voltage
1 M
100 k
10 k
340
330
320
310
300
290
280
270
260
Ta = +25 °C
VCC = 19 V
CTL = 5 V
Ta = +25 °C
CTL = 5 V
RT = 47 kΩ
0
5
10
15
20
25
10
100
1000
Timing resistor RT (kΩ)
Power supply voltage VCC (V)
Triangular wave oscillation frequency
vs. Ambient temperature
Error amplifier threshold voltage
vs. Ambient temperature
320
315
310
305
300
295
290
285
280
275
270
265
260
4.25
2.24
4.23
2.22
4.21
4.20
4.19
4.18
4.17
4.16
4.15
VCC = 19 V
CTL = 5 V
VCC = 19 V
CTL = 5 V
RT = 47 kΩ
−40
−20
0
20
40
60
80
100
−40 −20
0
20
40
60
80
100
Ambient temperature Ta ( °C)
Ambient temperature Ta ( °C)
(Continued)
13
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MB3887
Error amplifier gain and phase vs. Frequency
Ta = +25 °C
40
20
180
90
VCC = 19 V
AV
4.2 V
φ
240 kΩ
10 kΩ
1 µF
10 kΩ
+
8
(4)
0
0
−
+
2.4 kΩ
IN
7
(5)
OUT
9
(3)
−20
−40
−90
−180
Error Amp1
(Error Amp2)
10 kΩ
10 kΩ
1 k
10 k
100 k
1 M
10 M
Frequency f (Hz)
Error amplifier gain and phase vs. Frequency
Ta = +25 °C
VCC = 19 V
4.2 V
40
20
180
90
AV
240 kΩ
10 kΩ
φ
10 kΩ
1 µF
+
16
22
−
+
+
0
0
2.4 kΩ
10 kΩ
IN
15
OUT
−20
−40
−90
−180
Error Amp3
4.2 V
10 kΩ
1 k
10 k
100 k
1 M
10 M
Frequency f (Hz)
Current detection amplifier gain and phase vs. Frequency
Ta = +25 °C
VCC = 19 V
40
20
180
90
AV
13
(24)
+
×20
−
10
(2)
φ
12
(1)
OUT
Current Amp1
(Current Amp2)
0
0
12.6 V
12.55 V
−20
−40
−90
−180
1 k
10 k
100 k
1 M
10 M
Frequency f (Hz)
(Continued)
14
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MB3887
(Continued)
Power dissipation vs. Ambient temperature
800
740
700
600
500
400
300
200
100
0
−40 −20
0
20
40
60
80
100
Ambient temperature Ta ( °C)
15
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MB3887
■ FUNCTIONAL DESCRIPTION
1. DC/DC Converter Unit
(1) Reference voltage block (Ref)
The reference voltage generator uses the voltage supplied from the VCC terminal (pin 18) to generate a tem-
perature-compensated, stable voltage (5.0 V Typ) used as the reference supply voltage for the IC’s internal
circuitry.
This terminal can also be used to obtain a load current to a maximum of 1mA from the reference voltage VREF
terminal (pin 6) .
(2) Triangular wave oscillator block (OSC)
The triangular wave oscillator builds the capacitor for frequency setting into, and generates the triangular wave
oscillation waveform by connecting the frequency setting resistor with the RT terminal (pin 17) .
The triangular wave is input to the PWM comparator on the IC.
(3) Error amplifier block (Error Amp1)
This amplifier detects the output signal from the current detection amplifier (Current amp1) , compares this to
the +INE1 terminal (pin 9) , and outputs a PWM control signal to be used in controlling the charging current.
In addition, an arbitrary loop gain can be set up by connecting a feedback resistor and capacitor between the
FB1 terminal (pin 7) and -INE1 terminal (pin 8) , providing stable phase compensation to the system.
(4) Error amplifier block (Error Amp2)
This amplifier (Error Amp2) detects voltage drop of the AC adapter and outputs a PWM control signal.
In addition, an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the FB2
terminal (pin 5) to the −INE2 terminal (pin 4) of the error amplifier, enabling stable phase compensation to the
system.
(5) Error amplifier block (Error Amp3)
This error amplifier (Error Amp3) detects the output voltage from the DC/DC converter and outputs the PWM
control signal. External output voltage setting resistors can be connected to the error amplifier inverted input
terminal to set the desired level of output voltage from 1 cell to 4 cells.
In addition, an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the FB3
terminal (pin 15) to the −INE3 terminal (pin 16) of the error amplifier, enabling stable phase compensation to
the system.
Connecting a soft-start capacitor to the CS terminal (pin 22) prevents rush currents when the IC is turned on.
Using an error amplifier for soft-start detection makes the soft-start time constant, independent of the output load.
(6) Current detection amplifier block (Current Amp1)
The current detection amplifier (Current Amp1) detects a voltage drop which occurs between both ends of the
output sense resistor (RS) due to the flow of the charge current, using the +INC1 terminal (pin 13) and −INC1
terminal (pin 12) . Then it outputs the signal amplified by 20 times to the error amplifier (Error Amp1) at the next
stage.
16
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MB3887
(7) PWM comparator block (PWM Comp.)
The PWM comparator circuit is a voltage-pulse width converter for controlling the output duty of the error
amplifiers (Error Amp1 to Error Amp3) depending on their output voltage.
The PWM comparator circuit compares the triangular wave generated by the triangular wave oscillator to the
error amplifier output voltage and turns on the external output transistor during the interval in which the triangular
wave voltage is lower than the error amplifier output voltage.
(8) Output block (OUT)
The output circuit uses a totem-pole configuration capable of driving an external P-channel MOS FET.
The output “L” level sets the output amplitude to 6 V (Typ) using the voltage generated by the bias voltage block
(VH) .
This results in increasing conversion efficiency and suppressing the withstand voltage of the connected external
transistor in a wide range of input voltages.
(9) Control block (CTL)
Setting the CTL terminal (pin 14) low places the IC in the standby mode. (The supply current is 10 µA at maximum
in the standby mode.)
CTL function table
CTL
L
Power
OUTD
Hi-Z
L
OFF (Standby)
ON (Active)
H
(10) Bias voltage block (VH)
The bias voltage circuit outputs VCC −6 V (Typ) as the minimum potential of the output circuit. In the standby
mode, this circuit outputs the potential equal to VCC.
2. Protection Functions
Under voltage lockout protection circuit (UVLO)
The transient state or a momentary decrease in supply voltage or internal reference voltage (VREF) , which
occurs when the power supply (VCC) is turned on, may cause malfunctions in the control IC, resulting in
breakdown or degradation of the system.
To prevent such malfunction, the under voltage lockout protection circuit detects a supply voltage or internal
reference voltage drop and fixes the OUT terminal (pin 20) to the “H” level. The system restores voltage supply
when the supply voltage or internal reference voltage reaches the threshold voltage of the under voltage lockout
protection circuit.
Protection circuit (UVLO) operation function table
When UVLO is operating (VCC or VREF voltage is lower than UVLO threshold voltage.)
OUTD
OUT
CS
Hi-Z
H
L
17
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MB3887
3. Soft-Start Function
Soft-start block (SOFT)
Connecting a capacitor to the CS terminal (pin 22) prevents rush currents when the IC is turned on. Using an
error amplifier for soft-start detection makes the soft-start time constant, being independent of the output load
of the DC/DC converter.
■ SETTING THE CHARGING VOLTAGE
The charging voltage (DC/DC output voltage) can be set by connecting external voltage setting resistors (R3,
R4) to the −INE3 terminal (pin 16) . Be sure to select a resistor value that allows you to ignore the on-resistor
(35 Ω, 1mA) of the internal FET connected to the OUTD terminal (pin 11) . In standby mode, the charging
voltage is applied to OUTD termial. Therefore, output voltage must be adjusted so that voltage applied to OUTD
terminal is 17 V or less.
Battery charging voltage : VO
VO (V) = (R3 + R4) / R4 × 4.2 (V)
VO
B
R3
R4
<Error Amp3>
−INE3
16
11
−
+
+
4.2 V
OUTD
22
CS
■ METHOD OF SETTING THE CHARGING CURRENT
The charge current (output limit current) value can be set with the voltage at the +INE1 terminal (pin 9) .
If a current exceeding the set value attempts to flow, the charge voltage drops according to the set current value.
Battery charge current setting voltage : +INE1
+INE1 (V) = 20 × I1 (A) × RS (Ω)
■ METHOD OF SETTING THE TRIANGULAR WAVE OSCILLATION FREQUENCY
Thetriangularwaveoscillationfrequencycanbesetbythetimingresistor(RT)connectedtheRTterminal(pin17).
Triangular wave oscillation frequency : fOSC
fOSC (kHz) =: 13630 / RT (kΩ)
18
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MB3887
■ METHOD OF SETTING THE SOFT-START TIME
For preventing rush current upon activation of IC, the IC allows soft-start using the capacitor (Cs) connected to
the CS terminal (pin 22) .
When CTL terminal (pin 14) is placed under “H” level and IC is activated (VCC ≥ UVLO threshold voltage) , Q2
is turned off and the external soft-start capacitor (Cs) connected to the CS terminal is charged at 10 µA.
Error Amp output (FB3 terminal (pin 15) ) is determined by comparison between the lower voltage of the two
non-reverse input terminals (4.2 V and CS terminal voltage) and reverse input terminal voltage (−INE3 terminal
(pin 16) voltage) . Within the soft-start period (CS terminal voltage < 4.2 V) , FB3 is determined by comparison
between −INE3 terminal voltage and CS terminal voltage, and DC/DC converter output voltage goes up propor-
tionately with the increase of CS terminal voltage caused by charging on the soft-start capacitor.Soft-start time
is found by the following formula :
Soft-start time : ts (time to output 100 %)
tS (s)=: 0.42 × CS (µF)
CS terminal voltage
= 4.9 V
= 4.2 V
Comparison with Error Amp block − INE3
voltage.
= 0 V
Soft-start time: ts
VREF
10 µA
10 µA
15
16
22
FB3
Error
Amp3
−
+
+
−INE3
CS
4.2 V
Q2
UVLO
CS
Soft-start circuit
19
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MB3887
■ AC ADAPTOR VOLTAGE DETECTION
• With an external resistor connected to the +INE2 terminal (pin 3) , the IC enters the dynamically-controlled
charging mode to reduce the charge current to keep AC adapter power constant when the partial potential
point A of the AC adapter voltage (VCC) becomes lower than the voltage at the −INE2 terminal.
AC adapter detection voltage setting : Vth
Vth (V) = (R1 + R2) / R2 × −INE2
<Error Amp2>
−INE2
4
3
−
+
A
VCC
+INE2
R1
R2
■ OPERATION TIMING DIAGRAM
Error Amp2 FB2
Error Amp1 FB1
2.5 V
1.5 V
Error Amp2 FB3
OUT
AC adapter dynamically-
controlled charging
Constant voltage control
Constant current control
20
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MB3887
■ PROCESSING WITHOUT USING THE CURRENT AMP
When Current Amp is not used, connect the +INC1 terminal (pin 13) , +INC2 terminal (pin 24) , −INC1 terminal
(pin 12) , and −INC2 terminal (pin 1) to VREF, and then leave OUTC1 terminal (pin 10) and OUTC2 terminal
(pin 2) open.
12
1
13
24
−INC1
−INC2
+INC1
+INC2
10
2
OUTC1
OUTC2
“Open”
6
VREF
Connection when Current Amp is not used
21
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MB3887
■ PROCESSING WITHOUT USING OF THE ERROR AMP
When Error Amp is not used, leave FB1 terminal (pin 7) , FB2 terminal (pin 5) open and connect the −INE1
terminal (pin 8) and −INE2 terminal (pin 4) to GND and connect +INE1 terminal (pin 9) , and +INE2 terminal (pin
3) , to VREF.
23
GND
9
3
+INE1
+INE2
8
4
−INE1
−INE2
7
5
FB1
FB2
“Open”
6
VREF
Connection when Error Amp is not used
22
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MB3887
■ PROCESSING WITHOUT USING OF THE CS TERMINAL
When soft-start function is not used, leave the CS terminal (pin 22) open.
“Open”
22
CS
Connection when soft-start time is not specified
■ NOTE ON AN EXTERNAL REVERSE-CURRENT PREVENTIVE DIODE
• Insert a reverse-current preventive diode at one of the three locations marked * to prevent reverse current from
the battery.
• When selecting the reverse current prevention diode, be sure to consider the reverse voltage (VR) and reverse
current (IR) of the diode.
VIN
VCC(O)
21
∗
A
B
OUT
20
19
I1
∗
BATT
RS
∗
VH
Battery
23
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MB3887
■ APPLICATION EXAMPLE
24
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MB3887
■ PARTS LIST
COMPONENT
ITEM
SPECIFICATION
VENDOR
PARTS No.
VDS = −30 V, ID = ±8 A (Max)
VDS = 60 V, ID = 0.115 A
(Max)
Q1
Q2
P-ch FET
N-ch FET
VISHAY SILICONIX
VISHAY SILICONIX
Si4435DY
2N7002E
D1
L1
Diode
Inductor
VF = 0.42 V (Max) , IF = 3 A
ROHM
TDK
RB053L-30
3.5 A, 31.6
SLF12565T-
220M3R5
22 µH
mΩ
C1
C2, C3
C4
C5
C6
C7
C8
C9
C10
OS-CONTM
22 µF
100 µF
0.022 µF
0.1 µF
25 V (10 %)
25 V (10 %)
50 V
SANYO
SANYO
TDK
KYOCERA
MURATA
MURATA
MURATA
KYOCERA
MURATA
25SL22M
25CV100AX
Electrolytic Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
C1608JB1H223K
CM21W5R104K16
GRM39B152K10
GRM39F104KZ25
GRM39B103K10
CM21W5R104K16
GRM39B562K10
16 V
10 V
25 V
10 V
16 V
10 V
1500 pF
0.1 µF
10000 pF
0.1 µF
5600 pF
R1
R2
R3
R4
R5
R6
R7
R8
R9
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
0.033 Ω
47 kΩ
330 kΩ
82 kΩ
330 kΩ
68 kΩ
22 kΩ
100 kΩ
10 kΩ
30 kΩ
20 kΩ
1 kΩ
1.0 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
1.0 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
SEIDEN TECHNO
KOA
RK73Z1J-0D
RK73G1J-473D
RK73G1J-334D
RK73G1J-823D
RK73G1J-334D
RK73G1J-683D
RK73G1J-223D
RK73G1J-104D
CR21-103-F
RK73G1J-303D
RK73G1J-203D
RK73G1J-102D
RR0816P121D
RK73G1J-204D
RK73G1J-104D
KOA
KOA
KOA
KOA
KOA
KOA
KYOCERA
KOA
R10 to R12
R13
R14
R15
R16, R18
R17, R19
KOA
KOA
ssm
KOA
120 Ω
200 kΩ
100 kΩ
KOA
Note : VISHAY SILICONIX : VISHAY Intertechnology, Inc.
ROHM : ROHM CO., LTD.
TDK : TDK Corporation
SANYO : SANYO Electric Co., Ltd.
KYOCERA : Kyocera Corporation
MURATA : Murata Manufacturing Co., Ltd.
SEIDEN TECHNO : SEIDEN TECHNO CO., LTD.
KOA : KOA Corporation
ssm : SUSUMU Co., Ltd.
OS-CON is a trademark of SANYO Electric Co., Ltd.
25
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MB3887
■ REFERENCE DATA
Conversion efficiency vs. Charge current
(Constant voltage mode)
Conversion efficiency vs. Charge current
(Constant current mode)
100
98
96
94
92
90
88
86
84
82
80
100
98
96
94
92
90
88
86
84
82
80
Ta = +25 °C
VIN = 19 V
Ta = +25 °C
VIN = 19 V
BATT charge voltage =
set at 12.6 V
BATT charge voltage =
set at 12.6 V
SW = ON
SW = ON
Efficiency η (%) =
(VBATT × IBATT)
/ (VIN × IIN) × 100
Efficiency η (%) =
(VBATT × IBATT)
/ (VIN × IIN)
× 100
10 m
100 m
1
10
0
2
4
6
8
10
12
14
16
BATT charge current IBATT (A)
BATT charge voltage VBATT (V)
Conversion efficiency vs. Charge current
(Constant voltage mode)
Conversion efficiency vs. Charge current
(Constant current mode)
100
98
96
94
92
90
88
86
84
82
80
100
98
96
94
92
90
88
86
84
82
80
Ta = +25 °C
VIN = 19 V
Ta = +25 °C
VIN = 19 V
BATT charge voltage =
set at 16.8 V
BATT charge voltage =
set at 16.8 V
SW = ON
Efficiency η (%) =
(VBATT × IBATT)
/ (VIN × IIN) × 100
SW = ON
Efficiency η (%) =
(VBATT × IBATT)
/ (VIN × IIN) × 100
0
2
4
6
8
10 12 14 16 18 20
10 m
100 m
1
10
BATT charge current IBATT (A)
BATT charge voltage VBATT (V)
(Continued)
26
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Conversion efficiency vs. Charge current
Conversion efficiency vs. Charge current
(Constant voltage mode)
(Constant current mode)
100
98
96
94
92
90
88
86
84
82
80
100
98
96
94
92
90
88
86
84
82
80
Ta = +25 °C
VIN = 19 V
Ta = +25 °C
VIN = 19 V
BATT charge voltage =
BATT charge voltage =
set at 16.8 V
SW = ON
Efficiency η (%) =
(VBATT × IBATT)
/ (VIN × IIN) × 100
set at 16.8 V
SW = ON
Efficiency η (%) =
(VBATT × IBATT)
/ (VIN × IIN) × 100
10 m
100 m
1
10
0
2
4
6
8
10 12 14 16 18 20
BATT charge current IBATT (A)
BATT charge voltage VBATT (V)
BATT voltage vs. BATT charge current
(set at 16.8 V)
BATT voltage vs. BATT charge current
(set at 12.6 V)
20
18
16
14
12
10
8
18
16
14
12
10
8
Ta = +25 °C VIN = 19 V
BATT : Electronic load,
BATT : Electronic load,
(Product of KIKUSUI PLZ-150W)
(Product of KIKUSUI PLZ-150W)
Ta = +25 °C
VIN = 19 V
Dead Battery MODE
DCC MODE
Dead Battery MODE
DCC MODE
6
6
4
4
2
2
DCC : Dynamically-Controlled
DCC : Dynamically-Controlled
2.5 3.5 4.5
0
0
0
0.5
1
1.5
2
3
4
5
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
BATT charge current IBATT (A)
BATT charge current IBATT (A)
(Continued)
27
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Switching waveform constant voltage mode
(set at 12.6 V)
Switching waveform constant current mode
(set at 12.6 V, with 10 V)
Ta = +25 °C
VBATT (mV)
100
Ta = +25 °C
VIN = 19 V
VBATT (mV)
100
VIN = 19 V
98 mVp-p
98 mVp-p
VBATT
BATT = 1.5 A
VBATT
VD
BATT = 3.0 A
0
0
VD
−100
VD (V)
15
−100
VD (V)
15
10
5
10
5
0
0
0
1
2
3
4
5
6
7
8
9
10
(µs)
0
1
2
3
4
5
6
7
8
9
10
(µs)
Switching waveform constant voltage mode
(set at 16.8 V)
Switching waveform constant current mode
(set at 16.8 V, with 10 V)
Ta = +25 °C
Ta = +25 °C
VBATT (mV)
VBATT (mV)
VIN = 19 V
58 mVp-p
VIN = 19 V
BATT = 3.0 A
100
100
BATT = 1.5 A
96 mVp-p
VBATT
VD
VBATT
VD
0
0
−100
VD (V)
15
−100
VD (V)
15
10
5
10
5
0
0
0
1
2
3
4
5
6
7
8
9
10
(µs)
0
1
2
3
4
5
6
7
8
9
10
(µs)
(Continued)
28
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MB3887
(Continued)
Soft-start operating waveform
constant voltage mode
(set at 12.6 V)
Discharge operating waveform
constant voltage mode
(set at 12.6 V)
VBATT (V)
VBATT (V)
20
20
10
0
VBATT
VCS
Ta = +25 °C, VIN = 19 V
BATT = 12 Ω
10
VBATT
VCS
0
VCS (V)
4
VCS (V)
4
ts = 10.4 ms
2
0
2
0
Ta = +25 °C
VIN = 19 V
BATT = 12 Ω
VCTL (V)
5
VCTL (V)
5
VCTL
VCTL
0
0
0
2
4
6
8
10 12 14 16 18 20
(ms)
0
2
4
6
8
10 12 14 16 18 20
(ms)
Discharge operating waveform
constant voltage mode
(set at 16.8 V)
Soft-start operating waveform
constant voltage mode
(set at 16.8 V)
VBATT (V)
20
VBATT (V)
20
Ta = +25 °C, VIN = 19 V
BATT = 12 Ω
VBATT
VCS
10
10
VBATT
0
VCS (V)
4
0
VCS (V)
4
ts = 10.4 ms
2
0
2
0
VCS
Ta = +25 °C
VIN = 19 V
BATT = 12 Ω
VCTL (V)
5
VCTL (V)
5
VCTL
VCTL
0
0
0
2
4
6
8
10 12 14 16 18 20
(ms)
0
2
4
6
8
10 12 14 16 18 20
(ms)
29
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MB3887
■ USAGE PRECAUTIONS
• Printed circuit board ground lines should be set up with consideration for common impedance.
• Take appropriate static electricity measures.
• Containers for semiconductor materials should have anti-static protection or be made of conductive material.
• After mounting, printed circuit boards should be stored and shipped in conductive bags or containers.
• Work platforms, tools, and instruments should be properly grounded.
• Working personnel should be grounded with resistance of 250 kΩ to 1 MΩ between body and ground.
• Do not apply negative voltages.
• The use of negative voltages below −0.3 V may create parasitic transistors on LSI lines, which can cause
malfunction.
■ ORDERING INFORMATION
Part number
MB3887PFV
Package
Remarks
24-pin plastic SSOP
(FPT-24P-M03)
30
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MB3887
■ PACKAGE DIMENSION
24-pin plastic SSOP
(FPT-24P-M03)
Note1: Pins width and pins thickness include plating thickness.
Note2: * This dimension does not include resin protrusion.
0.17±0.03
(.007±.001)
*
7.75±0.10(.305±.004)
24
13
5.60±0.10 7.60±0.20
(.220±.004) (.299±.008)
INDEX
Details of "A" part
1.25 +0.20
–0.10
(Mounting height)
.049 +.008
–.004
0.25(.010)
0~8°
"A"
1
12
0.24 +0.08
.009 +.003
–0.07
0.65(.026)
M
0.13(.005)
–.003
0.50±0.20
0.10±0.10
(.020±.008)
(.004±.004)
(Stand off)
0.60±0.15
(.024±.006)
0.10(.004)
C
2001 FUJITSU LIMITED F24018S-c-3-4
Dimensions in mm (inches) .
31
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MB3887
FUJITSU LIMITED
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with FUJITSU sales
representatives before ordering.
The information and circuit diagrams in this document are
presented as examples of semiconductor device applications, and
are not intended to be incorporated in devices for actual use. Also,
FUJITSU is unable to assume responsibility for infringement of
any patent rights or other rights of third parties arising from the use
of this information or circuit diagrams.
The products described in this document are designed, developed
and manufactured as contemplated for general use, including
without limitation, ordinary industrial use, general office use,
personal use, and household use, but are not designed, developed
and manufactured as contemplated (1) for use accompanying fatal
risks or dangers that, unless extremely high safety is secured, could
have a serious effect to the public, and could lead directly to death,
personal injury, severe physical damage or other loss (i.e., nuclear
reaction control in nuclear facility, aircraft flight control, air traffic
control, mass transport control, medical life support system, missile
launch control in weapon system), or (2) for use requiring
extremely high reliability (i.e., submersible repeater and artificial
satellite).
Please note that Fujitsu will not be liable against you and/or any
third party for any claims or damages arising in connection with
above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You
must protect against injury, damage or loss from such failures by
incorporating safety design measures into your facility and
equipment such as redundancy, fire protection, and prevention of
over-current levels and other abnormal operating conditions.
If any products described in this document represent goods or
technologies subject to certain restrictions on export under the
Foreign Exchange and Foreign Trade Law of Japan, the prior
authorization by Japanese government will be required for export
of those products from Japan.
F0211
FUJITSU LIMITED Printed in Japan
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