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MI920
Intel® Celeron® M 910GML
Intel® Pentium® M/915GM
Mini-ITX Motherboard
USER’S MANUAL
Version 1.0A
Table of Contents
MI920 User’s Manual
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MI920 User’s Manual
INTRODUCTION
Introduction
Product Description
The MI920 Mini ITX board incorporates the Mobile Intel® 910GML/915GM
Express Chipset for Embedded Computing, consisting of the Intel® 910GML/
915GM Graphic Memory Controller Hub (GMCH) and Intel® I/O Controller
Hub 6-M (ICH6-M), is an optimized integrated graphics solution with a
400/533MHz front-side bus.
The integrated 32-bit 3D graphics engine, based on Intel® Graphics Media
Accelerator 900 (Intel® GMA 900) architecture, operates at core speeds of up to
320 MHz. It features a low-power design, is validated with Intel® Pentium M/
Celeron® M processors on 130nm or 90nm process. With one DIMM socket on
board, the board supports up to 1GB of DDR2 system memory (400MHz for
910GML, 400/533MHz for 915GM chipset).
Intel® Graphics supports a unique intelligent memory management scheme
applications by providing the maximum availability of system memory for
general computer usage, while supplying additional graphics memory when a
3D-intensive application requests it. The Intel GMA 900 graphics architecture
also takes advantage of the high-performance Intel processor. Intel GMA 900
graphics supports Dual Independent Display technology.
The main features of the board are:
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ƒ
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Supports Celeron® M processors, 400MHz FSB (910GML chipset)
Supports Socket 479, 533/400MHz FSB (915GM chipset)
One DDRII SDRAM DIMM supports up to 1GB of DDR2 400MHz
(910GML chipset), DDR2 400/533MHz (915GM chipset)
Onboard 10/100 BaseT and Marvell PCI-Express Gigabit LAN
Intel® 915 Express VGA for CRT, SDVO port supports LVDS and
DVI / LVDS
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ƒ
ƒ
ƒ
2x SATA, 6x USB 2.0, 4x COM, Watchdog timer
1x PCI, 1x MiniPCIe, CF socket, DC-in for +12V input
Dimensions of the board are 170mm x 170mm.
Ordering Information:
MI920F: Socket 479, 915GM, ICH6M, supports DVI, LVDS, 1x 10/100 LAN,
1x Gigabit LAN, Mini PCI-E
MI920L-C6K: Celeron M 600M/512K , 910GML, ICH6M, supports DVI,
LVDS, 1x 10/100 LAN
MI920 User’s Manual
1
INTRODUCTION
MI920 Specifications
[
Form Factor
CPU Type
Mini ITX
Intel Celeron M / Pentium M (on Socket 479) processor (Banias or
Dothan core):
- Banias: ULV Celeron M 600MHz (512KB L2 Cache),
-
Dothan: Zero L2 cache Celeron M 1GHz or Celeron M 373
CPU Voltage
CPU FSB
CPU Socket
Chipset
0.700V ~ 1.708V
400MHz (910GML); 400/533MHz (915GM)
Socket 479 co-layout with micro-FCBGA
Intel 910GML/915GM chipset
ICH6M: 82801FBM
BIOS /APM
Memory
Award BIOS, support ACPI Function & APM1.2
DDRII 400/533 SDRAM DIMM socket x1 (w/o ECC function), Max.
1GB
VGA
DVI
910GML built-in, supports dual display with CRT, LVDS & TV-Out
Chrontel CH7307 x1 for DVI
LVDS
LAN
Chrontel CH7308 x1 for 18 or 24-bit single/dual channel LVDS
LAN1: ICH6M built-in 10/100BT MAC + Intel 82562ET PHY
Optional LAN2: Marvell 88E8053 PCI Express Gigabit LAN controller
ICH6M built-in USB 2.0 host controller, support 6 ports
ICH6M built-in SATA controller, supports 2 ports
ICH6M built-in one channel Ultra DMA 33/66/100 for IDE & CF
ICH6M built-in Audio controller + AC97 Codec ALC655 w/ 6 channels
(Line-out, Line-in & Mic.) + ADI SSM2304 4ohm 2W, class D, stereo
audio power amplifier (note: 1.4W for 8 ohm)
Winbond W83627EHG: PS/2 Keyboard/Mouse, 2x serial (RS232) &
Hardware monitor (3 thermal inputs, 4 voltage monitor inputs,
VID0-4 & 2 fan headers)
USB
Serial ATA
Parallel IDE
Audio
LPC I/O
2nd I/O
Fintek F81216DG x1 for COM3, 4 (RS-232)
Expansion Slots
PCI (33MHz/32-bit) slot x1
Optional Mini PCI-express (1 lane) socket x1 (for wireless module)
DC-in power connector (Jack type) x1
Edge
Connectors
PS/2 stack connector x1 for keyboard/mouse
DVI + DB9 stack connector x1 for DVI & COM 1
RJ45 (10/100) + dual USB stack connector x1 for LAN1 & USB1, 2
S-Video connector x1 for S-Video
RJ45 (GbE) + dual USB stack connector x1 for LAN2 & USB3, 4
*** Option with dual USB stack connector (LAN2 option)
3x1 phone jack stack connector x1 for Audio (Line-Out, Line-In & Mic)
Compact flash socket (vertical type) x1 @component side
SATA connector x2 for 2 SATA ports
Onboard
Headers /
Connectors
DF13-20 (20-pin) header x2 for LVDS
15 pins pin-header x1 for VGA
40 pins box-header x1 for IDE
30 pins pin-header x1 for COM2~4
8 pins pin-header x1 for USB 5~6
3 pins pin-header x1 for power LED
6 pins pin-header x1 for Reset, HDD LED & power button
Yes (256 segments, 0, 1, 2…255 sec/min)
+5V, +3.3V, +12V, -12V, 5VSB
Watchdog Timer
System Voltage
Other
LAN Wakeup
Digital I/O
4 in + 4 out (TTL level)
Power In / Out
Power Input: +12V DC power input
Power Output: 4-pin power connector x1 for HDD/CD-ROM/DVD
Board Size
170mm x 170mm
MI920 User’s Manual
3
INSTALLATIONS
Installing the CPU
The MI920 board supports a Socket 479 processor socket for Intel®
Pentium® M or Celeron® M processors.
The processor socket comes with a screw to secure the processor. As
shown in the left picture below, loosen the screw first before inserting
the processor. Place the processor into the socket by making sure the
notch on the corner of the CPU corresponds with the notch on the inside
of the socket. Once the processor has slide into the socket, fasten the
screw. Refer to the figures below.
NOTE: Ensure that the CPU heat sink and the CPU top surface are in
total contact to avoid CPU overheating problem that would
cause your system to hang or be unstable.
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MI920 User’s Manual
INSTALLATIONS
Installing the Memory
The MI920 board supports one DDR2 memory socket for a maximum
total memory of 1GB in DDR2 memory type.
Installing and Removing Memory Modules
To install the DDR2 modules, locate the memory slot on the board and
perform the following steps:
1. Hold the DDR2 module so that the key of the DDR2 module align
with those on the memory slot.
2. Gently push the DDR2 module in an upright position until the clips of
the slot close to hold the DDR2 module in place when the DDR2
module touches the bottom of the slot.
3. To remove the DDR2 module, press the clips with both hands.
DDR2 Module
Lock
Lock
Lock
Lock
MI920 User’s Manual
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INSTALLATIONS
Setting the Jumpers
Jumpers are used on MI920 to select various settings and features
according to your needs and applications. Contact your supplier if you
have doubts about the best configuration for your needs. The following
lists the connectors on MI920 and their respective functions.
[
JP6: CPU FSB Selection (915GM only)....................................... 11
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MI920 User’s Manual
INSTALLATIONS
JP1: LCD Panel Power Selection
JP1
LCD Panel Power
3.3V
5V
JP8: Clear CMOS Setting
JP8
Setting
Normal
Clear CMOS
JP7: CompactFlash Slave/Master Selection
JP7
CF Setting
Master
Slave
JP2: ATX/AT Mode Select
JP2
ATX / AT
ATX mode
AT mode
JP3: COM3 RS232 +5V / +12V Power Setting
Pin #
Pin #
Signal Name
JP3
Signal Name
+12V
1
3
5
RI
RI (Default)
RI
2
4
6
RI (Default)
+5V
COM3 Settings: Pin 1-2 short = +12V, Pin 5-6 short = +5V, Pin 3-4
Standard COM Port
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MI920 User’s Manual
INSTALLATIONS
JP4: COM4 RS232 +5V / +12V Power Setting
Pin #
Pin #
Signal Name
JP4
Signal Name
+12V
1
3
5
RI
RI (Default)
RI
2
4
6
RI (Default)
+5V
COM4 Settings: Pin 1-2 short = +12V, Pin 5-6 short = +5V, Pin 3-4
Standard COM Port
JP5: VGA/DVI DDCDATA and DDCCLK Signal Select
JP5
VGA/DVI Select
VGA
DVI
JP6: CPU FSB Selection (915GM only)
JP6 FSB
400MHz
533MHz
MI920 User’s Manual
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INSTALLATIONS
Connector Locations on MI920
Connector Locations on MI920 ...........................................................Page
IDE1: IDE Connector...............................................................................16
J14: Speaker Connector ...........................................................................19
J19: CD-In Pin Header.............................................................................20
MI920 User’s Manual
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INSTALLATIONS
FAN1: CPU Fan Power Connector
FAN1 is a 3-pin header for the CPU fan. The fan must be a 12V fan.
Pin #
Signal Name
Ground
+12V
Rotation detection
1
2
3
FAN2: System Fan Power Connector
FAN2 is a 3-pin header for system fans. The fan must be 12V (500mA).
Pin #
Signal Name
Ground
+12V
Rotation detection
1
2
3
CN1: DC Jack (DC in, 12V only)
CN2: PS/2 Keyboard and PS/2 Mouse Connectors
PS/2 Mouse
PS/2 Keyboard
Signal Name
Keyboard data
N.C.
GND
5V
Keyboard clock
N.C.
Keyboard Mouse Signal Name
1
2
3
4
5
6
1
2
3
4
5
6
Mouse data
N.C.
GND
5V
Mouse clock
N.C.
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MI920 User’s Manual
INSTALLATIONS
CN3: COM1 and DVI-I Connector
[
Signal Name Pin # Pin # Signal Name
DCD
RXD
TXD
DTR
GND
1
2
3
4
5
6
7
8
9
10
DSR
RTS
CTS
RI
Not Used
Signal Name
DATA 2-
DATA 2+
Shield 2/4
DATA 4-
Pin # Pin # Signal Name
1
2
16
17
18
19
20
21
22
23
24
C1
C2
C3
C4
C5
C6
HOT POWER
DATA 0-
3
4
5
DATA 0+
SHIELD 0/5
DATA 5-
DATA 4+
DDC CLOCK
DDC DATA
VSYNC
DATA 1-
DATA 1+
SHIELD 1/3
DATA 3-
DATA 3+
DDC POWER
A GROUND 1
6
7
8
DATA 5+
SHIELD CLK
CLOCK -
9
CLOCK +
A RED
A GREEN
A BLUE
HYNC
A GROUND2
A GROUND3
10
11
12
13
14
15
CN4: S-Video and RCA Connector for TV out
CN5: 10/100 RJ-45 and USB1/2 Ports
CN6: GbE RJ-45 and USB3/4 Ports
CN7: Audio Connector
MI920 User’s Manual
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INSTALLATIONS
J1: HDD Power Connector
Pin #
Signal Name
1
2
3
4
+12V
Ground
Ground
5V
Note: +12V power is provided with 2A maximum load.
J2: ATX_12V Connector
J2 can be used in situations where the 12V current from the ATX power
is insufficient to supply needed current.
Pin #
Signal Name
Ground
Ground
+12V
1
2
3
4
+12V
IDE1: IDE Connector
Signal Name
Reset IDE
Pin #
Pin #
Signal Name
1
2
Ground
Host data 8
Host data 9
Host data 10
Host data 11
Host data 12
Host data 13
Host data 14
Host data 15
Protect pin
Ground
Host data 7
Host data 6
Host data 5
Host data 4
Host data 3
Host data 2
Host data 1
Host data 0
Ground
3
4
5
6
7
8
9
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
DRQ0
Host IOW
Host IOR
IOCHRDY
DACK0
Ground
Ground
Host ALE
Ground
No connect
No connect
Address 2
Chip select 1
Ground
IRQ14
Address 1
Address 0
Chip select 0
Activity
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MI920 User’s Manual
INSTALLATIONS
J3, J5: LVDS Connectors (1st channel, 2nd channel)
The LVDS connectors on board consist of the first channel (J3) and
second channel (J5) and supports 18-bit or 24-bit.
Signal Name Pin # Pin # Signal Name
TX0-
Ground
TX1-
2
4
6
1
3
5
TX0+
Ground
TX1+
5V/3.3V
TX3-
TX2-
Ground
TXC-
5V/3.3V
+12V
8
7
9
Ground
TX3+
TX2+
Ground
TXC+
ENABKL
+12V
10
12
14
16
18
20
11
13
15
17
19
J6: LCD Backlight Connector
Pin #
Signal Name
+12V
Backlight Enable
Ground
1
2
3
J7: Digital I/O
Signal Name Pin Pin Signal Name
GND
OUT3
OUT2
IN3
1
3
5
7
9
2
4
6
8
10
VCC
OUT1
OUT0
IN1
IN2
IN0
MI920 User’s Manual
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INSTALLATIONS
J8: COM2, COM3, COM4 Serial Ports
Pin #
1
2
3
4
Signal Name (RS-232)
DCD, Data carrier detect
RXD, Receive data
TXD, Transmit data
DTR, Data terminal ready
Ground
5
6
7
8
9
DSR, Data set ready
RTS, Request to send
CTS, Clear to send
RI, Ring indicator
No Connect.
10
J9: VGA Connector
[[[[
Signal Name Pin # Pin # Signal Name
+5V
Ground
N.C.
2
4
6
1
3
5
RED
GREEN
BLUE
N.C.
SDA
8
7
HSYNC
VSYNC
SCL
10
12
14
16
9
Ground
Ground
Ground
Ground
11
13
15
N.C.
J10: Wake On LAN Connector
J10 is a 3-pin header for the Wake On LAN function. Wake On LAN
will function properly only with an ATX power supply with 5VSB that
has 200mA.
Pin #
Signal Name
+5VSB
1
2
3
Ground
-PME
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MI920 User’s Manual
INSTALLATIONS
J11: Power LED Connector
Pin #
Signal Name
1
2
3
Vcc
NC
PLED
J12: System Function Connector
Signal Name Pin Pin Signal Name
Ground
5V
Ground
1
3
5
2
4
7
PS_ON
HDD Active
Reset
ATX power on switch: Pins 1-2
HDD LED: Pins 3-4
Reset switch: Pins 5-6
J13: USB5/6 Port Pin Header
Signal Name Pin Pin Signal Name
Vcc
D-
D+
1
2
3
4
5
6
7
8
Ground
D+
D-
Vcc
Ground
J14: Speaker Connector
The J14 connector supports 2W/8ohm stereo audio power amplifier.
Pin # Signal Name
1
2
3
4
Audio L
Ground
Ground
Audio R
J15: Compact Flash Connector
J16, J17: Serial ATA Connectors
MI920 User’s Manual
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INSTALLATIONS
J18: Front Audio Connector
Signal Name Pin Pin Signal Name
Rear Audio R
Front Audio R
Mic In
1
2
3
4
5
6
7
8
Rear Audio L
Front Audio L
VREF Out
Ground
REMARKS: To use the front audio connector, the jumpers on pin 1-3
and pin 2-4 must be removed.
J19: CD-In Pin Header
Pin # Signal Name
1
2
3
4
CD Audio R
Ground
Ground
CD Audio L
PCI1: PCI Slot (supports 2 Master)
U38: Mini PCI- E(x1) Connector (bottom side)
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MI920 User’s Manual
BIOS SETUP
BIOS Introduction
The Award BIOS (Basic Input/Output System) installed in your
computer system’s ROM supports Intel processors. The BIOS provides
critical low-level support for a standard device such as disk drives, serial
ports and parallel ports. It also adds virus and password protection as
well as special support for detailed fine-tuning of the chipset controlling
the entire system.
BIOS Setup
The Award BIOS provides a Setup utility program for specifying the
system configurations and settings. The BIOS ROM of the system stores
the Setup utility. When you turn on the computer, the Award BIOS is
immediately activated. Pressing the <Del> key immediately allows you
to enter the Setup utility. If you are a little bit late pressing the <Del>
key, POST (Power On Self Test) will continue with its test routines, thus
preventing you from invoking the Setup. If you still wish to enter Setup,
restart the system by pressing the ”Reset” button or simultaneously
pressing the <Ctrl>, <Alt> and <Delete> keys. You can also restart by
turning the system Off and back On again. The following message will
appear on the screen:
Press <DEL> to Enter Setup
In general, you press the arrow keys to highlight items, <Enter> to
select, the <PgUp> and <PgDn> keys to change entries, <F1> for help
and <Esc> to quit.
When you enter the Setup utility, the Main Menu screen will appear on
the screen. The Main Menu allows you to select from various setup
functions and exit choices.
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MI920 User’s Manual
BIOS SETUP
Phoenix - AwardBIOS CMOS Setup Utility
Standard CMOS Features
Frequency/Voltage Control
Advanced BIOS Features
Advanced Chipset Features
Integrated Peripherals
Power Management Setup
PnP/PCI Configurations
PC Health Status
Load Fail-Safe Defaults
Load Optimized Defaults
Set Supervisor Password
Set User Password
Save & Exit Setup
Exit Without Saving
ESC : Quit
Ç È Æ Å : Select Item
F10 : Save & Exit Setup
Time, Date, Hard Disk Type…
The section below the setup items of the Main Menu displays the control
keys for this menu. At the bottom of the Main Menu just below the
control keys section, there is another section, which displays information
on the currently highlighted item in the list.
Note:
If the system cannot boot after making and saving system
changes with Setup, the Award BIOS supports an override to
the CMOS settings that resets your system to its default.
Warning: It is strongly recommended that you avoid making any
changes to the chipset defaults. These defaults have been
carefully chosen by both Award and your system
manufacturer to provide the absolute maximum performance
and reliability. Changing the defaults could cause the system
to become unstable and crash in some cases.
MI920 User’s Manual
23
BIOS SETUP
Standard CMOS Setup
“Standard CMOS Setup” choice allows you to record some basic
hardware configurations in your computer system and set the system
clock and error handling. If the motherboard is already installed in a
working system, you will not need to select this option. You will need to
run the Standard CMOS option, however, if you change your system
hardware configurations, the onboard battery fails, or the configuration
stored in the CMOS memory was lost or damaged.
Phoenix - AwardBIOS CMOS Setup Utility
Standard CMOS Features
Date (mm:dd:yy)
Time (hh:mm:ss)
Fri, Mar 23, 2007
00 : 00 : 00
Item Help
Menu Level >
IDE Channel 0 Master
IDE Channel 0 Slave
IDE Channel 1 Master
IDE Channel 1 Slave
None
None
None
None
Change the day, month,
Year and century
Video
EGA/VGA
Halt On
All , But Keyboard
Base Memory
640K
Extended Memory
Total Memory
514048K
515072K
At the bottom of the menu are the control keys for use on this menu. If
you need any help in each item field, you can press the <F1> key. It will
display the relevant information to help you. The memory display at the
lower right-hand side of the menu is read-only. It will adjust
automatically according to the memory changed. The following
describes each item of this menu.
Date
The date format is:
Day :
Sun to Sat
1 to 12
1 to 31
Month :
Date :
Year :
1999 to 2099
To set the date, highlight the “Date” field and use the PageUp/
PageDown or +/- keys to set the current time.
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MI920 User’s Manual
BIOS SETUP
Time
The time format is: Hour : 00 to 23
Minute : 00 to 59
Second : 00 to 59
To set the time, highlight the “Time” field and use the <PgUp>/ <PgDn>
or +/- keys to set the current time.
IDE Channel Master/Slave
The onboard PCI IDE connector provides Primary and Secondary
channels for connecting up to two IDE hard disks or other IDE devices.
Press <Enter> to configure the hard disk. The selections include Auto,
Manual, and None. Select ‘Manual’ to define the drive information
manually. You will be asked to enter the following items.
Capacity :
CYLS :
Capacity/size of the hard disk drive
Number of cylinders
HEAD :
Number of read/write heads
Write precompensation
Landing zone
PRECOMP :
LANDING ZONE :
SECTOR :
Number of sectors
The Access Mode selections are as follows:
CHS (HD < 528MB)
LBA (HD > 528MB and supports
Logical Block Addressing)
Large (for MS-DOS only)
Auto
Remarks: The main board supports two serial ATA ports and are
represented in this setting as IDE Channel 0.
Video
This field selects the type of video display card installed in your system.
You can choose the following video display cards:
EGA/VGA
For EGA, VGA, SEGA, SVGA
or PGA monitor adapters. (default)
Power up in 40 column mode.
Power up in 80 column mode.
For Hercules or MDA adapters.
CGA 40
CGA 80
MONO
MI920 User’s Manual
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BIOS SETUP
Halt On
This field determines whether or not the system will halt if an error is
detected during power up.
No errors
The system boot will not be halted for any error
that may be detected.
All errors
Whenever the BIOS detects a non-fatal error,
the system will stop and you will be prompted.
The system boot will not be halted for a
keyboard error; it will stop for all other errors
The system boot will not be halted for a disk
error; it will stop for all other errors.
All, But Keyboard
All, But Diskette
All, But Disk/Key
The system boot will not be halted for a key-
board or disk error; it will stop for all others.
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MI920 User’s Manual
BIOS SETUP
Advanced BIOS Features
This section allows you to configure and improve your system and
allows you to set up some system features according to your preference.
Phoenix - AwardBIOS CMOS Setup Utility
Advanced BIOS Features
CPU Feature
Press Enter
Press Enter
Disabled
Enabled
Enabled
Hard Disk
CDROM
USB-FDD
Enabled
On
ITEM HELP
Hard Disk Boot Priority
Virus Warning
CPU L1 and L2 Cache
Quick Power On Self Test
First Boot Device
Second Boot Device
Third Boot Device
Boot Other Device
Menu Level >
Boot Up NumLock Status
Gate A20 Option
Fast
Typematic Rate Setting
Typematic Rate (Chars/Sec)
Typematic Delay (Msec)
Security Option
Disabled
6
250
Setup
APIC Mode
Enabled
1.4
Non-OS2
Disabled
MPS Version Control for OS
OS Select For DRAM>64MB
Small Logo (EPA) Show
CPU Feature
Press Enter to configure the settings relevant to CPU Feature.
Hard Disk Boot Priority
With the field, there is the option to choose, aside from the hard disks connected,
“Bootable add-in Cards” which refers to other external devices.
Virus Warning
If this option is enabled, an alarm message will be displayed when trying to write
on the boot sector or on the partition table on the disk, which is typical of the
virus.
CPU L1 and L2 Cache
Cache memory is additional memory that is much faster than conventional
DRAM (system memory). CPUs from 486-type on up contain internal cache
memory, and most, but not all, modern PCs have additional (external) cache
memory. When the CPU requests data, the system transfers the requested data
from the main DRAM into cache memory, for even faster access by the CPU.
These items allow you to enable (speed up memory access) or disable the cache
function. By default, these items are Enabled.
MI920 User’s Manual
27
BIOS SETUP
Quick Power On Self Test
When enabled, this field speeds up the Power On Self Test (POST) after
the system is turned on. If it is set to Enabled, BIOS will skip some
items.
First/Second/Third Boot Device
These fields determine the drive that the system searches first for an
operating system. The options available include LS120, Hard Disk,
CDROM, ZIP100, USB-FDD, USB-ZIP, USB-CDROM, LAN and
Disable.
Boot Other Device
These fields allow the system to search for an OS from other devices
other than the ones selected in the First/Second/Third Boot Device.
Boot Up NumLock Status
This allows you to activate the NumLock function after you power up
the system.
Gate A20 Option
This field allows you to select how Gate A20 is worked. Gate A20 is a
device used to address memory above 1 MB.
Typematic Rate Setting
When disabled, continually holding down a key on your keyboard will
generate only one instance. When enabled, you can set the two typematic
controls listed next. By default, this field is set to Disabled.
Typematic Rate (Chars/Sec)
When the typematic rate is enabled, the system registers repeated
keystrokes speeds. Settings are from 6 to 30 characters per second.
Typematic Delay (Msec)
When the typematic rate is enabled, this item allows you to set the time
interval for displaying the first and second characters. By default, this
item is set to 250msec.
Security Option
This field allows you to limit access to the System and Setup. The default
value is Setup. When you select System, the system prompts for the User
Password every time you boot up. When you select Setup, the system
always boots up and prompts for the Supervisor Password only when the
Setup utility is called up.
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MI920 User’s Manual
BIOS SETUP
APIC Mode
APIC stands for Advanced Programmable Interrupt Controller. The
default setting is Enabled.
MPS Version Control for OS
This option is specifies the MPS (Multiprocessor Specification) version
for your operating system. MPS version 1.4 added extended
configuration tables to improve support for multiple PCI bus
configurations and improve future expandability. The default setting is
1.4.
OS Select for DRAM > 64MB
This option allows the system to access greater than 64MB of DRAM
memory when used with OS/2 that depends on certain BIOS calls to
access memory. The default setting is Non-OS/2.
Small Logo (EPA) Show
The EPA logo appears at the right side of the monitor screen when the
system is boot up. The default setting is Disabled.
MI920 User’s Manual
29
BIOS SETUP
Advanced Chipset Features
This Setup menu controls the configuration of the chipset.
Phoenix - AwardBIOS CMOS Setup Utility
Advanced Chipset Features
DRAM Timing Selectable
CAS Latency Time
By SPD
3
ITEM HELP
Menu Level >
DRAM RAS# to CAS# Delay
DRAM RAS# Precharge
Precharge delay (tRAS)
System Memory Frequency
SLP_S4# Assertion Width
System BIOS Cacheable
Video BIOS Cacheable
Memory Hole at 15M-16M
PCI Express Root Port Func
3
3
9
400MHZ
1 to 2 Sec
Enabled
Ensabled
Disabled
Press Enter
** VGA Setting **
PEG/On Chip VGA Control
On-Chip Frame Buffer Size
DVMT Mode
Auto
8MB
DVMT
DVMT/FIXED memory Size
SDVO Device Setting
SDVO LVDS Protocol
SDVO Panel Number
Boot Display
128MB
LVDS + DVI
1CH SPGW, 24bit
1024x768
CRT+DVI
Auto
Panel Scaling
TV Standard
Off
Video Connector
TV Format
Automatic
Auto
Onboard PCI-E LAN
LAN PXE Option ROM
Enable
All Disable
DRAM Timing Selectable
This option refers to the method by which the DRAM timing is selected.
The default is By SPD.
CAS Latency Time
You can configure CAS latency time in HCLKs as 3 or 4 or 5. The
system board designer should set the values in this field, depending on
the DRAM installed. Do not change the values in this field unless you
change specifications of the installed DRAM or the installed CPU.
DRAM RAS# to CAS# Delay
This option allows you to insert a delay between the RAS (Row Address
Strobe) and CAS (Column Address Strobe) signals. This delay occurs
when the SDRAM is written to, read from or refreshed. Reducing the
delay improves the performance of the SDRAM.
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MI920 User’s Manual
BIOS SETUP
DRAM RAS# Precharge
This option sets the number of cycles required for the RAS to
accumulate its charge before the SDRAM refreshes. The default setting
for the Active to Precharge Delay is 3.
Precharge Delay (tRAS)
The default setting for the Precharge Delay is 9.
System Memory Frequency
The default setting is 400MHz.
SLP_S4# Assertion Width
The default setting is 1 to 2 Sec.
System BIOS Cacheable
The setting of Enabled allows caching of the system BIOS ROM at
F000h-FFFFFh, resulting in better system performance. However, if
any program writes to this memory area, a system error may result.
Video BIOS Cacheable
The Setting Enabled allows caching of the video BIOS ROM at
C0000h-F7FFFh, resulting in better video performance. However, if
any program writes to this memory area, a system error may result.
Memory Hole At 15M-16M
In order to improve performance, certain space in memory can be
reserved for ISA cards. This memory must be mapped into the memory
space below 16 MB. The choices are Enabled and Disabled.
On-Chip VGA Setting
The fields under the On-Chip VGA Setting and their default settings are:
PEG/On Chip VGA Control: Auto
On-Chip Frame Buffer Size: 8MB
DVMT Mode: DVTM
DVMT/Fixed Memory Size: 128MB
SDVO Device Setting: LVDS+DVI
SDVO LVDS Protocol: 1Ch SPGW, 24bit
SDVO Panel Number: 1024x768
Boot Display: CRT+DVI
Panel Scaling: Auto
TV Standard: Off
Video Connector: Automatic
TV Format: Auto
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31
BIOS SETUP
Panel Scaling
The default setting is Auto. The options available include On and Off.
Onboard PCI-E LAN
By default, this setting is enabled.
LAN PXE Option ROM
By default, this setting is All Disabled. The options available include
All Disabled and ICH6 integrated Lan.
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BIOS SETUP
Integrated Peripherals
This section sets configurations for your hard disk and other integrated
peripherals. The first screen shows three main items for user to select.
Once an item selected, a submenu appears. Details follow.
Phoenix - AwardBIOS CMOS Setup Utility
Integrated Peripherals
Press Enter
Press Enter
Press Enter
Press Enter
ITEM HELP
Menu Level >
OnChip IDE Device
Onboard Device
SuperIO Device
2nd SuperIO Device
Phoenix - AwardBIOS CMOS Setup Utility
OnChip IDE Device
Enabled
Enabled
ITEM HELP
Menu Level >
IDE HDD Block Mode
On-chip Primary PCI IDE
IDE Primary Master PIO
IDE Primary Slave PIO
IDE Primary Master UDMA
IDE Primary Slave UDMA
On-Chip Secondary PCI IDE
IDE Secondary Master PIO
IDE Secondary Slave PIO
IDE Secondary Master UDMA
IDE Secondary Slave UDMA
Auto
Auto
Auto
Auto
Enabled
Auto
Auto
Auto
Auto
*** On-Chip Serial ATA Setting ***
SATA Mode
IDE
On-Chip Serial ATA
PATA IDE Mode
SATA port
Auto
Secondary
P0, P2 is Primary
Phoenix - AwardBIOS CMOS Setup Utility
Onboard Device
Enabled
ITEM HELP
Menu Level >
USB Controller
Enabled
USB 2.0 Controller
Ensabled
USB Keyboard Support
Azalia/AC97 Audio Select
Auto
Phoenix - AwardBIOS CMOS Setup Utility
SuperIO Device
ITEM HELP
Menu Level >
POWER ON Function
KB Power ON Password
Hot Key power ON
Onboard Serial Port 1
Onboard Serial Port 2
PWRON After PWR-Fail
BUTTON ONLY
Enter
Ctrl-F1
3F8/IRQ4
2F8/IRQ3
Off
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33
BIOS SETUP
Phoenix - AwardBIOS CMOS Setup Utility
2nd SuperIO Device
ITEM HELP
Menu Level >
Onboard Serial Port 3
Serial Port 3 Use IRQ
Onboard Serial Port 4
Serial Port 4 Use IRQ
2B0H
IRQ11
2B8H
IRQ10
IDE HDD Block Mode
This field allows your hard disk controller to use the fast block mode to
transfer data to and from your hard disk drive.
On-chip Primary PCI IDE Enabled
This field, by default, is enabled
OnChip Primary/Secondary PCI IDE
The integrated peripheral controller contains an IDE interface with
support for two IDE channels. Select Enabled to activate each channel
separately.
IDE Primary/Secondary Master/Slave PIO
These fields allow your system hard disk controller to work faster.
Rather than have the BIOS issue a series of commands that transfer to or
from the disk drive, PIO (Programmed Input/Output) allows the BIOS to
communicate with the controller and CPU directly.
The system supports five modes, numbered from 0 (default) to 4, which
primarily differ in timing. When Auto is selected, the BIOS will select
the best available mode.
IDE Primary/Secondary Master/Slave UDMA
These fields allow your system to improve disk I/O throughput to
33Mb/sec with the Ultra DMA/33 feature. The options are Auto and
Disabled.
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MI920 User’s Manual
BIOS SETUP
On-Chip Serial ATA Setting
The fields under the SATA setting includes On-Chip Serial ATA (Auto),
PATA IDE Mode (Secondary) and SATA Port (PO, P2 is Primary).
USB Controller
The options for this field are Enabled and Disabled. By default, this field
is set to Enabled.
USB 2.0 Controller
The options for this field are Enabled and Disabled. By default, this field
is set to Enabled. In order to use USB 2.0, necessary OS drivers must be
installed first. Please update your system to Windows 2000 SP4 or
Windows XP SP2.
USB Keyboard Support
The options for this field are Enabled and Disabled. By default, this field
is set to Enabled.
Azalia/AC97 Audio Select
This field, by default, is set to Auto.
Power ON Function
This field is related to how the system is powered on – such as with the
use of conventional power button, keyboard or hot keys. The default is
BUTTON ONLY.
KB Power ON Password
This field allows users to set the password when keyboard power on is
the mode of the Power ON function.
Hot Key Power ON
This field sets certain keys, also known as hot keys, on the keyboard that
can be used as a ‘switch’ to power on the system.
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35
BIOS SETUP
Onboard Serial Port
These fields allow you to select the onboard serial ports and their
addresses. The default values for these ports are:
Serial Port 1
Serial Port 2
Serial Port 3
Serial Port 4
3F8/IRQ4
2F8/IRQ3
2B0/IRQ11
2B8/IRQ10
PWRON After PWR-Fail
This field sets the system power status whether on or off when power
returns to the system from a power failure situation.
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MI920 User’s Manual
BIOS SETUP
Power Management Setup
Phoenix - AwardBIOS CMOS Setup Utility
Power Management Setup
Enabled
ITEM HELP
ACPI Function
S1(POS)
Auto
Menu Level >
ACPI Suspend
RUN VGABIOS if S3 Resume
Power Management
Video Off Method
Video Off In Suspend
Suspend Type
User Define
V/H SYNC+Blank
Yes
Stop Grant
3
Modem Use IRQ
Suspend Mode
Disabled
Disabled
Instant-Off
Disabled
Disabled
Disabled
0
HDD Power Down
Soft-Off by PWR-BTTN
Wake-Up by PCI Card
Power On by Ring
Resume by Alarm
Date (of Month) Alarm
Time (hh:mm:ss) Alarm
0 : 0 : 0
** Reload Global Timer Events **
Primary IDE 0
Primary IDE 1
Secondary IDE 0
Secondary IDE 1
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
FDD, COM, LPT Port
PCI PIRQ[A-D] #
ACPI Function
Enable this function to support ACPI (Advance Configuration and
Power Interface).
ACPI Suspend
The default setting of the ACPI Suspend mode is S1(POS).
RUN VGABIOS if S3 Resume
The default setting of this field is Auto.
Power Management
This field allows you to select the type of power saving management
modes. There are four selections for Power Management.
Min. Power Saving
Max. Power Saving
User Define
Minimum power management
Maximum power management.
Each of the ranges is from 1 min. to
1hr. Except for HDD Power Down
which ranges from 1 min. to 15 min.
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37
BIOS SETUP
Video Off Method
This field defines the Video Off features. There are three options.
V/H SYNC + Blank
Default setting, blank the screen and turn
off vertical and horizontal scanning.
Allows BIOS to control the video display.
Writes blanks to the video buffer.
DPMS
Blank Screen
Video Off In Suspend
When enabled, the video is off in suspend mode. The default setting is
Yes.
Suspend Type
The default setting for the Suspend Type field is Stop Grant.
Modem Use IRQ
This field sets the IRQ used by the Modem. By default, the setting is 3.
Suspend Mode
When enabled, and after the set time of system inactivity, all devices
except the CPU will be shut off.
HDD Power Down
When enabled, and after the set time of system inactivity, the hard disk
drive will be powered down while all other devices remain active.
Soft-Off by PWRBTN
This field defines the power-off mode when using an ATX power
supply. The Instant Off mode allows powering off immediately upon
pressing the power button. In the Delay 4 Sec mode, the system powers
off when the power button is pressed for more than four seconds or
enters the suspend mode when pressed for less than 4 seconds.
Wake up by PCI Card
By default, this field is Disabled.
Power On by Ring
This field enables or disables the power on of the system through the
modem connected to the serial port or LAN.
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MI920 User’s Manual
BIOS SETUP
Resume by Alarm
This field enables or disables the resumption of the system operation.
When enabled, the user is allowed to set the Date and Time.
Reload Global Timer Events
The HDD, FDD, COM, LPT Ports, and PCI PIRQ are I/O events that can
prevent the system from entering a power saving mode or can awaken
the system from such a mode. When an I/O device wants to gain the
attention of the operating system, it signals this by causing an IRQ to
occur. When the operating system is ready to respond to the request, it
interrupts itself and performs the service.
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39
BIOS SETUP
PNP/PCI Configurations
This option configures the PCI bus system. All PCI bus systems on the
system use INT#, thus all installed PCI cards must be set to this value.
Phoenix - AwardBIOS CMOS Setup Utility
PnP/PCI Configurations
PCI Slot
Disabled
ITEM HELP
Menu Level
Init Display First
Reset Configuration Data
Auto (ESCD)
Press Enter
Resources Controlled By
IRQ Resources
Select Yes if you are
using a Plug and Play
capable operating
system Select No if
you need the BIOS to
configure non-boot
devices
Disabled
Auto
PCI/VGA Palette Snoop
INT Pin 1 Assignment
INT Pin 2 Assignment
Auto
Auto
Auto
Auto
Auto
Auto
Auto
INT Pin 3 Assignment
INT Pin 4 Assignment
INT Pin 5 Assignment
INT Pin 6 Assignment
INT Pin 7 Assignment
INT Pin 8 Assignment
**PCI Express relative items**
Maximum Payload Size
4096
Init Display First
The default setting is PCI Card.
Reset Configuration Data
This field allows you to determine whether to reset the configuration
data or not. The default value is Disabled.
Resources Controlled by
This PnP BIOS can configure all of the boot and compatible devices
with the use of a PnP operating system such as Windows 95.
PCI/VGA Palette Snoop
Some non-standard VGA display cards may not show colors properly.
This field allows you to set whether or not MPEG ISA/VESA VGA
cards can work with PCI/VGA. When this field is enabled, a PCI/VGA
can work with an MPEG ISA/VESA VGA card. When this field is
disabled, a PCI/VGA cannot work with an MPEG ISA/VESA card.
Maximum Payload Size
The default setting of the PCI Express Maximum Payload Size is 4096.
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MI920 User’s Manual
BIOS SETUP
PC Health Status
This section shows the parameters in determining the PC Health Status.
These parameters include temperatures, fan speeds and voltages.
Phoenix - AwardBIOS CMOS Setup Utility
PC Health Status
ITEM HELP
Shutdown Temperature
CPU Warning Temperature
Current System Temp
Current CPU Temp
FAN2 Speed
Disabled
Disabled
Menu Level >
45°C/113°F
45°C/113°F
5400 RPM
5400 RPM
FAN1 Speed
Vcore
+12 V
+1.8V
0.94 V
11.92 V
1.83V
+5
V
5.25 V
3.37V
+3.3V
VBAT (V)
5VSB(V)
3.21 V
5.50 V
Smart FAN1 Temperature
FAN1 Tolerance Value
Disabled
1
Shutdown Temperature
This field allows the user to set the temperature by which the system
automatically shuts down once the threshold temperature is reached.
This function can help prevent damage to the system that is caused by
overheating.
CPU Warning Temperature
This field allows the user to set the temperature so that when the
temperature is reached, the system sounds a warning. This function can
help prevent damage to the system that is caused by overheating.
Temperatures/Voltages
These fields are the parameters of the hardware monitoring function
feature of the motherboard. The values are read-only values as
monitored by the system and show the PC health status.
Smart FAN1 Temperature
This field enables or disables the smart fan feature. At a certain
temperature, the fan starts turning. Once the temperature drops to a
certain level, it stops turning again.
FAN1 Tolerance Value
The default value is 1.
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41
BIOS SETUP
Frequency/Voltage Control
This section shows the user how to configure the processor frequency.
Phoenix - AwardBIOS CMOS Setup Utility
Frequency/Voltage Control
Disabled
Disabled
ITEM HELP
Menu Level >
Auto Detect PCI Clk
Spread Spectrum Modulated
Auto Detect PCI Clk
This field enables or disables the auto detection of the PCI clock.
Spread Spectrum Modulated
This field sets the value of the spread spectrum. The default setting is
Disabled. This field is for CE testing use only.
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MI920 User’s Manual
BIOS SETUP
Load Fail-Safe Defaults
This option allows you to load the troubleshooting default values
permanently stored in the BIOS ROM. These default settings are
non-optimal and disable all high-performance features.
Load Optimized Defaults
This option allows you to load the default values to your system
configuration. These default settings are optimal and enable all high
performance features.
Set Supervisor Password
These two options set the system password. Supervisor Password sets a
password that will be used to protect the system and Setup utility. User
Password sets a password that will be used exclusively on the system. To
specify a password, highlight the type you want and press <Enter>. The
Enter Password: message prompts on the screen. Type the password, up
to eight characters in length, and press <Enter>. The system confirms
your password by asking you to type it again. After setting a password,
the screen automatically returns to the main screen.
To disable a password, just press the <Enter> key when you are
prompted to enter the password. A message will confirm the password to
be disabled. Once the password is disabled, the system will boot and you
can enter Setup freely.
Save & Exit Setup
This option allows you to determine whether or not to accept the
modifications. If you type “Y”, you will quit the setup utility and save all
changes into the CMOS memory. If you type “N”, you will return to
Setup utility.
Exit Without Saving
Select this option to exit the Setup utility without saving the changes you
have made in this session. Typing “Y” will quit the Setup utility without
saving the modifications. Typing “N” will return you to Setup utility.
MI920 User’s Manual
43
BIOS SETUP
This page is intentionally left blank.
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MI920 User’s Manual
DRIVERS INSTALLATION
Drivers Installation
This section describes the installation procedures for software and
drivers under the Windows 2000 and Windows XP. The software and
drivers are included with the motherboard. If you find the items missing,
please contact the vendor where you made the purchase. The contents of
this section include the following:
IMPORTANT NOTE:
After installing your Windows operating system (Windows 2000/ XP),
you must install first the Intel Chipset Software Installation Utility
before proceeding with the drivers installation.
MI920 User’s Manual
45
DRIVER INSTALLATION
Intel Chipset Software Installation Utility
The Intel Chipset Drivers should be installed first before the software
drivers to enable Plug & Play INF support for Intel chipset components.
Follow the instructions below to complete the installation under
Windows 2000/XP.
1. Insert the CD that comes with the board. Click Intel Chipsets and then
Intel(R) 915GM Chipset Drivers.
2. Click Intel(R) Chipset Software Installation Utility.
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MI920 User’s Manual
DRIVERS INSTALLATION
3. When the Welcome screen appears, click Next to continue.
4. Click Yes to accept the software license agreement and proceed with
the installation process.
MI920 User’s Manual
47
DRIVER INSTALLATION
5. On Readme Information screen, click Next to continue the
installation.
6. The Setup process is now complete. Click Finish then restart the
computer and for changes to take effect. When the computer has
restarted, the system will be able to find some devices. Restart your
computer when prompted.
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MI920 User’s Manual
DRIVERS INSTALLATION
VGA Drivers Installation
To install the VGA drivers, follow the steps below to proceed with the
installation.
1. Insert the CD that comes with the motherboard. Click Intel Chipsets
and then Intel(R) 915GM Chipset Drivers.
2. Click Intel(R) 915GM Chipset Family Graphics Driver.
MI920 User’s Manual
49
DRIVER INSTALLATION
3. When the Welcome screen appears, click Next to continue.
4. Click Yes to to agree with the license agreement and continue the
installation.
5. On Readme File Information screen, click Next to continue.
6. On Setup Progress screen, click Next to continue the installation.
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MI920 User’s Manual
DRIVERS INSTALLATION
7. The Setup process is now complete. Click Finish to restart the
computer and for changes to take effect.
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51
DRIVER INSTALLATION
AC97 Codec Audio Driver Installation
Follow the steps below to install the Realtek AC97 Codec Audio
Drivers.
1. Insert the CD that comes with the motherboard. Click Intel Chipsets
and then Intel Chipsets and then Intel(R) 915GM Chipset Drivers.
2. Click Realtek AC'97 Codec Audio Driver.
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MI920 User’s Manual
DRIVERS INSTALLATION
3. Click Finish to restart the computer and for changes to take effect. .
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53
DRIVER INSTALLATION
LAN Drivers Installation
Follow the steps below to complete the installation of the Intel PRO
LAN drivers.
1. Insert the CD that comes with the motherboard. Click LAN Card and
then Intel(R) PRO LAN Drivers.
2. Click Install Base Software to continue.
3. When prompted, please to restart the computer for new settings to take
effect.
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MI920 User’s Manual
DRIVERS INSTALLATION
Follow the steps below to install the Marvell Gigabit LAN drivers.
1. Insert the CD that comes with the motherboard. Click LAN Card and
then Marvell LAN Controller Driver.
2. Click Next when the InstallShield Wizard welcome screen appears.
3. Click Next to agree with the license agreement.
4. Click Next when the Readme Information screen appears to proceed
with the drives installation process.
5. When the Installation is complete, click Finish for the changes to take
effect.
MI920 User’s Manual
55
APPENDIX
Appendix
A. I/O Port Address Map
Each peripheral device in the system is assigned a set of I/O port
addresses which also becomes the identity of the device. The following
table lists the I/O port addresses used.
Address
Device Description
DMA Controller #1
Interrupt Controller #1
Timer
Keyboard Controller
Real Time Clock, NMI
DMA Page Register
Interrupt Controller #2
DMA Controller #2
Clear Math Coprocessor Busy Signal
Reset Math Coprocessor
IDE Interface
Parallel Port #2(LPT2)
Serial Port #2(COM2)
Graphics adapter Controller
Parallel Port #1(LPT1)
Network Ports
000h - 01Fh
020h - 03Fh
040h - 05Fh
060h - 06Fh
070h - 07Fh
080h - 09Fh
0A0h - 0BFh
0C0h - 0DFh
0F0h
0F1h
1F0h - 1F7h
278 - 27F
2F8h - 2FFh
2B0 - 2DF
378h - 3FFh
360 - 36F
3B0 - 3BF
3C0 - 3CF
3D0 - 3DF
3F0h - 3F7h
3F8h - 3FFh
Monochrome & Printer adapter
EGA adapter
CGA adapter
Floppy Disk Controller
Serial Port #1(COM1)
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APPENDIX
B. Interrupt Request Lines (IRQ)
Peripheral devices use interrupt request lines to notify CPU for the
service required. The following table shows the IRQ used by the devices
on board.
Level
IRQ0
IRQ1
IRQ2
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
IRQ8
IRQ9
IRQ10
IRQ11
IRQ12
IRQ13
IRQ14
IRQ15
Function
System Timer Output
Keyboard
Interrupt Cascade
Serial Port #2
Serial Port #1
Reserved
Floppy Disk Controller
Parallel Port #1
Real Time Clock
Reserved
Reserved
Reserved
PS/2 Mouse
80287
Primary IDE
Secondary IDE
MI920 User’s Manual
57
APPENDIX
C. Watchdog Timer Configuration
The WDT is used to generate a variety of output signals after a user
programmable count. The WDT is suitable for use in the prevention of
system lock-up, such as when software becomes trapped in a deadlock.
Under these sorts of circumstances, the timer will count to zero and the
selected outputs will be driven. Under normal circumstance, the user
will restart the WDT at regular intervals before the timer counts to zero.
SAMPLE CODE:
//===========================================================================
//
// THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY
// KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A PARTICULAR
// PURPOSE.
//
//===========================================================================
#include <stdio.h>
#include <stdlib.h>
#include "W627EHF.H"
//===========================================================================
int main (int argc, char *argv[]);
void copyright(void);
void EnableWDT(int);
void DisableWDT(void);
//===========================================================================
int main (int argc, char *argv[])
{
unsigned char bBuf;
unsigned char bTime;
char **endptr;
copyright();
if (argc != 2)
{
printf(" Parameter incorrect!!\n");
return 1;
}
if (Init_W627EHF() == 0)
{
printf(" Winbond 83627HF is not detected, program abort.\n");
return 1;
}
bTime = strtol (argv[1], endptr, 10);
printf("System will reset after %d seconds\n", bTime);
EnableWDT(bTime);
return 0;
}
//===========================================================================
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MI920 User’s Manual
APPENDIX
void copyright(void)
{
printf("\n======== Winbond 83627EHF Watch Timer Tester (AUTO DETECT) ========\n"\
"
"
"
Usage : W627E_WD reset_time\n"\
Ex : W627E_WD 3 => reset system after 3 second\n"\
W627E_WD 0 => disable watch dog timer\n");
}
//===========================================================================
void EnableWDT(int interval)
{
unsigned char bBuf;
bBuf = Get_W627EHF_Reg( 0x2D);
bBuf &= (!0x01);
Set_W627EHF_Reg( 0x2D, bBuf);
//Enable WDTO
Set_W627EHF_LD( 0x08);
Set_W627EHF_Reg( 0x30, 0x01);
//switch to logic device 8
//enable timer
bBuf = Get_W627EHF_Reg( 0xF5);
bBuf &= (!0x08);
Set_W627EHF_Reg( 0xF5, bBuf);
//count mode is second
//set timer
Set_W627EHF_Reg( 0xF6, interval);
}
//===========================================================================
void DisableWDT(void)
{
Set_W627EHF_LD(0x08);
Set_W627EHF_Reg(0xF6, 0x00);
Set_W627EHF_Reg(0x30, 0x00);
//switch to logic device 8
//clear watchdog timer
//watchdog disabled
}
//===========================================================================
MI920 User’s Manual
59
APPENDIX
//===========================================================================
//
// THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY
// KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A PARTICULAR
// PURPOSE.
//
//===========================================================================
#include "W627EHF.H"
#include <dos.h>
//===========================================================================
unsigned int W627EHF_BASE;
void Unlock_W627EHF (void);
void Lock_W627EHF (void);
//===========================================================================
unsigned int Init_W627EHF(void)
{
unsigned int result;
unsigned char ucDid;
W627EHF_BASE = 0x2E;
result = W627EHF_BASE;
ucDid = Get_W627EHF_Reg(0x20);
if (ucDid == 0x88)
{
goto Init_Finish;
}
W627EHF_BASE = 0x4E;
result = W627EHF_BASE;
ucDid = Get_W627EHF_Reg(0x20);
if (ucDid == 0x88)
{
goto Init_Finish;
}
W627EHF_BASE = 0x00;
result = W627EHF_BASE;
Init_Finish:
return (result);
}
//===========================================================================
void Unlock_W627EHF (void)
{
outportb(W627EHF_INDEX_PORT, W627EHF_UNLOCK);
outportb(W627EHF_INDEX_PORT, W627EHF_UNLOCK);
}
//===========================================================================
void Lock_W627EHF (void)
{
outportb(W627EHF_INDEX_PORT, W627EHF_LOCK);
}
//===========================================================================
void Set_W627EHF_LD( unsigned char LD)
{
Unlock_W627EHF();
outportb(W627EHF_INDEX_PORT, W627EHF_REG_LD);
outportb(W627EHF_DATA_PORT, LD);
Lock_W627EHF();
}
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MI920 User’s Manual
APPENDIX
//===========================================================================
void Set_W627EHF_Reg( unsigned char REG, unsigned char DATA)
{
Unlock_W627EHF();
outportb(W627EHF_INDEX_PORT, REG);
outportb(W627EHF_DATA_PORT, DATA);
Lock_W627EHF();
}
//===========================================================================
unsigned char Get_W627EHF_Reg(unsigned char REG)
{
unsigned char Result;
Unlock_W627EHF();
outportb(W627EHF_INDEX_PORT, REG);
Result = inportb(W627EHF_DATA_PORT);
Lock_W627EHF();
return Result;
}
//===========================================================================
//===========================================================================
//
// THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY
// KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A PARTICULAR
// PURPOSE.
//
//===========================================================================
#ifndef __W627EHF_H
#define __W627EHF_H
1
//===========================================================================
#define
#define
W627EHF_INDEX_PORT
W627EHF_DATA_PORT
(W627EHF_BASE)
(W627EHF_BASE+1)
//===========================================================================
#define W627EHF_REG_LD 0x07
//===========================================================================
#define W627EHF_UNLOCK
#define W627EHF_LOCK
0x87
0xAA
//===========================================================================
unsigned int Init_W627EHF(void);
void Set_W627EHF_LD( unsigned char);
void Set_W627EHF_Reg( unsigned char, unsigned char);
unsigned char Get_W627EHF_Reg( unsigned char);
//===========================================================================
#endif //__W627EHF_H
MI920 User’s Manual
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