Detailed Technical USER MANUAL FOR:
3.5”-SBC
MSB900/L
Nordstrasse 11/F
CH- 4542 Luterbach
Tel.:
Fax:
Email:
++41 (0)32 681 58 00
++41 (0)32 681 58 01
Homepage: http://www.digitallogic.com
DIGITAL-LOGIC AG
MSB900/L Detailed Technical Manual V1.0
Table of Contents
1.
Trademarks ...................................................................................................................5
Disclaimer .....................................................................................................................5
Environmental Protection Statement ..........................................................................5
Who should use this Product.......................................................................................5
Recycling Information ..................................................................................................6
Technical Support.........................................................................................................6
Limited Two Year Warranty..........................................................................................6
Explanation of Symbols ...............................................................................................7
Applicable Documents and Standards........................................................................8
1.10. For Your Safety.............................................................................................................9
1.11. RoHS Commitment .......................................................................................................9
RoHS Compatible Product Design......................................................................................... 10
1.12. Swiss Quality .............................................................................................................. 11
Standard Features of the MSB900/L.......................................................................... 12
MSB900 Block Diagram.............................................................................................. 13
Examples of Ordering Codes..................................................................................... 16
2.7.1. MSB900/L .................................................................................................................................. 17
2.7.2. MSB800CON Part Nr 802205.................................................................................................... 21
MSB900/L Incompatibilities to a standard PC/AT..................................................... 22
2.10. High Frequency Radiation (to meet EN55022).......................................................... 22
2.11. Battery-Lifetime .......................................................................................................... 23
3.1.1. MSB900 and MSB900L ............................................................................................................. 23
Boot Time.................................................................................................................... 25
5.3.1. CPUs of this MICROSPACE Product ........................................................................................ 26
5.3.2. Numeric Coprocessor ................................................................................................................ 26
5.3.3. DDRAM Memory........................................................................................................................ 26
5.4.1. Keyboard AT compatible and PS/2 Mouse................................................................................ 26
5.4.2. Line Printer Port LPT1 ............................................................................................................... 26
5.4.3. Serial Ports COM1-COM2 ......................................................................................................... 27
5.4.4. Floppy Disk Interface ................................................................................................................. 27
5.5. Controllers................................................................................................................... 27
5.5.1. Interrupt Controllers ................................................................................................................... 27
Timers and Counters.................................................................................................. 28
5.6.1. Programmable Timers ............................................................................................................... 28
5.6.2. RTC (Real Time Clock).............................................................................................................. 28
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5.6.3. Watchdog................................................................................................................................... 28
5.6.4. ROM-BIOS Sockets................................................................................................................... 28
5.6.5. BIOS CMOS Setup .................................................................................................................... 29
5.8.1. EEPROM Memory for Setup...................................................................................................... 35
5.9.1. System Memory Map................................................................................................................. 35
5.9.2. System I/O map ......................................................................................................................... 36
VGA..........................................................................................................................40
Description of the connectors...............................................................................41
Jumper Locations on the Board............................................................................53
10. Cable Interfaces......................................................................................................55
10.1. The Hard Disk Cable 44pin......................................................................................... 55
10.2. The COM1/LPT Serial Interface Cable ....................................................................... 56
10.3. The COM2 Serial Interface Cable............................................................................... 57
11. Thermal Specifications...........................................................................................58
11.1. Thermal Analysis for Case Integration...................................................................... 58
12. Assembly Views......................................................................................................59
12.1. MSB900/L .................................................................................................................... 59
12.2. Mechanical Dimensions ............................................................................................. 61
13. PXE-Boot and PXE-Setup in the BIOS ..................................................................62
14. PXE-License Order .................................................................................................64
15. Index ........................................................................................................................65
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MSB900/L Detailed Technical Manual V1.0
1. PREFACE
The information contained in this manual has been carefully checked and is believed to be accurate; it is
subject to change without notice. Product advances mean that some specifications may have changed.
DIGITAL-LOGIC AG assumes no responsibility for any inaccuracies, or the consequences thereof, that may
appear in this manual. Furthermore, DIGITAL-LOGIC AG does not accept any liability arising from the use or
application of any circuit or product described herein.
1.1. Trademarks
DIGITAL-LOGIC, DIGITAL-LOGIC-Logo, MICROSPACE, and smartModule are registered trademarks
owned worldwide by DIGITAL-LOGIC AG, Luterbach (Switzerland). In addition, this document may include
names, company logos, and registered trademarks which are, therefore, proprietary to their respective own-
ers.
1.2. Disclaimer
DIGITAL-LOGIC AG makes no representations or warranties with respect to the contents of this manual, and
specifically disclaims any implied warranty of merchantability or fitness, for any particular purpose. DIGITAL-
LOGIC AG shall, under no circumstances, be liable for incidental or consequential damages or related ex-
penses resulting from the use of this product, even if it has been notified of the possibility of such damage.
1.3. Environmental Protection Statement
This product has been manufactured to satisfy environmental protection requirements wherever possible.
Many of the components used (structural parts, printed circuit boards, connectors, batteries, etc.) are capa-
ble of being recycled. Final disposal of this product after its service life must be accomplished in accordance
with applicable country, state, or local laws or regulations.
1.4. Who should use this Product
ꢀ Electrical engineers with know-how in PC-technology.
ꢀ Because of the complexity and the variability of PC-technology, we cannot guarantee that the product
will work in any particular situation or set-up. Our technical support will try to help you find a solution.
ꢀ Pay attention to electrostatic discharges; use a CMOS protected workplace.
ꢀ Power supply must be OFF when working on the board or connecting any cables or devices.
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1.5. Recycling Information
All components within this product fulfill the requirements of the RoHS (Restriction of Hazardous Substances
Directive). The product is soldered with a lead free process.
1.6. Technical Support
1.
2.
Contact your local DIGITAL-LOGIC Technical Support, in your country.
New Support Request
Support requests are only accepted with detailed information about the product (i.e., BIOS-, Board-
version)!
1.7. Limited Two Year Warranty
DIGITAL-LOGIC AG guarantees the hardware and software products it manufactures and produces to be
free from defects in materials and workmanship for two years following the date of shipment from DIGITAL-
LOGIC AG, Switzerland. This warranty is limited to the original purchaser of the product and is not transfer-
able.
During the two year warranty period, DIGITAL-LOGIC AG will repair or replace, at its discretion, any defec-
tive product or part at no additional charge, provided that the product is returned, shipping prepaid, to
DIGITAL-LOGIC AG. All replaced parts and products become property of DIGITAL-LOGIC AG.
Before returning any product for repair, direct customers of DIGITAL-LOGIC AG, Switzerland are re-
quired to register a RMA (Return Material Authorization) number in the Support Center at
All other customers must contact their local distributors for returning defective materials.
This limited warranty does not extend to any product which has been damaged as a result of accident, mis-
use, abuse (such as use of incorrect input voltages, wrong cabling, wrong polarity, improper or insufficient
ventilation, failure to follow the operating instructions that are provided by DIGITAL-LOGIC AG or other con-
tingencies beyond the control of DIGITAL-LOGIC AG), wrong connection, wrong information or as a result of
service or modification by anyone other than DIGITAL-LOGIC AG. Nor if the user has insufficient knowledge
of these technologies or has not consulted the product manuals or the technical support of DIGITAL-LOGIC
AG and therefore the product has been damaged.
Empty batteries (external and onboard), as well as all other battery failures, are not covered by this manufac-
turer’s limited warranty.
Except, as directly set forth above, no other warranties are expressed or implied, including, but not limited to,
any implied warranty of merchantability and fitness for a particular purpose, and DIGITAL-LOGIC AG ex-
pressly disclaims all warranties not stated herein. Under no circumstances will DIGITAL-LOGIC AG be liable
to the purchaser or any user for any damage, including any incidental or consequential damage, expenses,
lost profits, lost savings, or other damages arising out of the use or inability to use the product.
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1.8. Explanation of Symbols
CE Conformity
This symbol indicates that the product described in this manual is in compliance with all ap-
plied CE standards.
Caution, Electric Shock!
This symbol and title warn of hazards due to electrical shocks (> 60V) when touching prod-
ucts or parts of them. Failure to observe the precautions indicated and/or prescribed by the
law may endanger your life/health and/or result in damage to your equipment.
Caution, Electric Shock!
This symbol and title warn of hazards due to electrical shocks (> 32V) when touching prod-
ucts or parts of them. Failure to observe the precautions indicated and/or prescribed by the
law may endanger your life/health and/or result in damage to your equipment
Warning, ESD Sensitive Device!
This symbol and title inform that electronic boards and their components are sensitive to
Electro Static Discharge (ESD). In order to ensure product integrity at all times, care must
always be taken while handling and examining this product.
Attention!
This symbol and title emphasize points which, if not fully understood and taken into consid-
eration by the reader, may endanger your health and/or result in damage to your equipment.
Note...
This symbol and title emphasize aspects the user should read through carefully for his, or
her, own advantage.
Warning, Heat Sensitive Device!
This symbol indicates a heat sensitive component.
Safety Instructions
This symbol shows safety instructions for the operator to follow.
This symbol warns of general hazards from mechanical, electrical,
and/or chemical failure. This may endanger your life/health and/or
result in damage to your equipment.
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1.9. Applicable Documents and Standards
The following publications are used in conjunction with this manual. When any of the referenced specifica-
tions are superseded by an approved revision, that revision shall apply. All documents may be obtained from
their respective organizations.
ꢀ Advanced Configuration and Power Interface Specification Revision 2.0c, August 25, 2003 Copyright
© 1996-2003 Compaq Computer Corporation, Intel Corporation, Microsoft Corporation, Phoenix Tech-
nologies Ltd., Toshiba Corporation. All rights reserved. http://www.acpi.info/
ꢀ ANSI/TIA/EIA-644-A-2001: Electrical Characteristics of Low Voltage Differential Signaling (LVDS) In-
terface Circuits, January 1, 2001. http://www.ansi.org/
ꢀ ANSI INCITS 361-2002: AT Attachment with Packet Interface - 6 (ATA/ATAPI-6), November 1, 2002.
ꢀ ANSI INCITS 376-2003: American National Standard for Information Technology – Serial Attached
SCSI (SAS), October 30, 2003. http://www.ansi.org/
ꢀ Audio Codec ’97 Revision 2.3 Revision 1.0, April 2002 Copyright © 2002 Intel Corporation. All rights
reserved. http://www.intel.com/labs/media/audio/
ꢀ Display Data Channel Command Interface (DDC/CI) Standard (formerly DDC2Bi) Version 1, August
14, 1998 Copyright © 1998 Video Electronics Standards Association. All rights reserved.
ꢀ ExpressCard Standard Release 1.0, December 2003 Copyright © 2003 PCMCIA. All rights reserved.
ꢀ IEEE 802.3-2002, IEEE Standard for Information technology, Telecommunications and information ex-
change between systems–Local and metropolitan area networks–Specific requirements – Part 3: Car-
rier Sense Multiple Access with Collision Detection (CSMA/CD) Access Method and Physical Layer
Specifications. http://www.ieee.org
ꢀ IEEE 802.3ae (Amendment to IEEE 802.3-2002), Part 3: Carrier Sense Multiple Access with Collision
Detection (CSMA/CD) Access Method and Physical Layer Specifications, Amendment: Media Access
Control (MAC) Parameters, Physical Layers, and Management Parameters for 10 GB/s Operation.
ꢀ Intel Low Pin Count (LPC) Interface Specification Revision 1.1, August 2002 Copyright © 2002 Intel
Corporation. All rights reserved. http://developer.intel.com/design/chipsets/industry/lpc.htm
ꢀ PCI Express Base Specification Revision 1.1, March 28, 2005, Copyright © 2002-2005 PCI Special In-
terest Group. All rights reserved. http://www.pcisig.com/
ꢀ PCI Express Card Electromechanical Specification Revision 1.1, March 28, 2005, Copyright © 2002-
2005 PCI Special Interest Group. All rights reserved. http://www.pcisig.com/
ꢀ PCI Local Bus Specification Revision 2.3, March 29, 2002 Copyright © 1992, 1993, 1995, 1998, 2002
PCI Special Interest Group. All rights reserved. http://www.pcisig.com/
ꢀ PICMG® Policies and Procedures for Specification Development, Revision 2.0, September 14, 2004,
PCI Industrial Computer Manufacturers Group (PICMG®), 401 Edgewater Place, Suite 500, Wake-
field, MA 01880, USA, Tel: 781.224.1100, Fax: 781.224.1239. http://www.picmg.org/
ꢀ Serial ATA: High Speed Serialized AT Attachment Revision 1.0a January 7, 2003 Copyright © 2000-
2003, APT Technologies, Inc, Dell Computer Corporation, Intel Corporation, Maxtor Corporation, Sea-
gate Technology LLC. All rights reserved. http://www.sata-io.org/
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ꢀ System Management Bus (SMBus) Specification Version 2.0, August 3, 2000 Copyright © 1994, 1995,
1998, 2000 Duracell, Inc., Energizer Power Systems, Inc., Fujitsu, Ltd., Intel Corporation, Linear
Technology Inc., Maxim Integrated Products, Mitsubishi Electric Semiconductor Company, Power-
Smart, Inc., Toshiba Battery Co. Ltd., Unitrode Corporation, USAR Systems, Inc. All rights reserved.
ꢀ Universal Serial Bus Specification Revision 2.0, April 27, 2000 Copyright © 2000 Compaq Computer
Corporation, Hewlett-Packard Company, Intel Corporation, Lucent Technologies Inc., Microsoft Corpo-
ration, NEC Corporation, Koninklijke Philips Electronics N.V. All rights reserved. http://www.usb.org/
1.10. For Your Safety
Your new DIGITAL-LOGIC product was developed and tested carefully to provide all features neces-
sary to ensure its compliance with electrical safety requirements. It was also designed for a long,
fault-free life. However, this life expectancy can be drastically reduced by improper treatment during
unpacking and installation. Therefore, in the interest of your own safety and for the correct operation
of your new DIGITAL-LOGIC product, please comply with the following guidelines.
Attention!
All work on this device must only be carried out by sufficiently skilled personnel.
Caution, Electric Shock!
Before installing your new DIGITAL-LOGIC product, always ensure that your mains power is
switched off. This applies also to the installation of piggybacks or peripherals. Serious electri-
cal shock hazards can exist during all installation, repair and maintenance operations with this
product. Therefore, always unplug the power cable and any other cables which provide
external voltage before performing work.
Warning, ESD Sensitive Device!
Electronic boards and their components are sensitive to static electricity. In order to ensure
product integrity at all times, be careful during all handling and examinations of this product.
1.11. RoHS Commitment
DIGITAL-LOGIC AG is committed to develop and produce environmentally friendly products according to the
Restriction of Hazardous Substances (RoHS) Directive (2002/95/EC) and the Waste Electrical and Electronic
Equipment (WEEE) Directive (2002/96/EC) established by the European Union. The RoHS directive was
adopted in February 2003 by the European Union and came into effect on July 1, 2006. It is not a law but a
directive, which restricts the use of six hazardous materials in the manufacturing of various types of elec-
tronic and electrical equipment. It is closely linked with the Waste Electrical and Electronic Equipment Direc-
tive (WEEE) 2002/96/EC, which has set targets for collection, recycling and recovery of electrical goods and
is part of a legislative initiative to solve the problem of huge amounts of toxic e-waste.
Each European Union member state is adopting its own enforcement and implementation policies using the
directive as a guide. Therefore, there could be as many different versions of the law as there are states in the
EU. Additionally, non-EU countries like China, Japan, or states in the U.S. such as California may have their
own regulations for green products, which are similar, but not identical, to the RoHS directive.
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RoHS is often referred to as the "lead-free" directive but it restricts the use of the following substances:
ꢀ Lead
ꢀ Mercury
ꢀ Cadmium
ꢀ Chromium VI
ꢀ PBB and PBDE
The maximum allowable concentration of any of the above mentioned substances is 0.1% (except for Cad-
mium, which is limited to 0.01%) by weight of homogeneous material. This means that the limits do not apply
to the weight of the finished product, or even to a component but to any single substance that could (theo-
retically) be separated mechanically.
1.11.1. RoHS Compatible Product Design
All DIGITAL-LOGIC standard products comply with RoHS legislation.
Since July 1, 2006, there has been a strict adherence to the use of RoHS compliant electronic and mechani-
cal components during the design-in phase of all DIGITAL-LOGIC standard products.
1.11.2. RoHS Compliant Production Process
DIGITAL-LOGIC selects external suppliers that are capable of producing RoHS compliant devices. These
capabilities are verified by:
1. A confirmation from the supplier indicating that their production processes and resulting devices are
RoHS compliant.
2. If there is any doubt of the RoHS compliancy, the concentration of the previously mentioned sub-
stances in a produced device will be measured. These measurements are carried out by an accred-
ited laboratory.
1.11.3. WEEE Application
The WEEE directive is closely related to the RoHS directive and applies to the following devices:
ꢀ Large and small household appliances
ꢀ IT equipment
ꢀ Telecommunications equipment (although infrastructure equipment is exempt in some countries)
ꢀ Consumer equipment
ꢀ Lighting equipment – including light bulbs
ꢀ Electronic and electrical tools
ꢀ Toys, leisure and sports equipment
ꢀ Automatic dispensers
It does not apply to fixed industrial plants and tools. The compliance is the responsibility of the company that
brings the product to market, as defined in the directive. Components and sub-assemblies are not subject to
product compliance. In other words, since DIGITAL-LOGIC does not deliver ready-made products to end
users the WEEE directive is not applicable for DIGITAL-LOGIC. Users are nevertheless encouraged to prop-
erly recycle all electronic products that have reached the end of their life cycle.
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1.12. Swiss Quality
ꢀ 100% Made in Switzerland
ꢀ DIGITAL-LOGIC is a member of "Swiss-Label"
ꢀ This product was not manufactured by employees earning
piecework wages
ꢀ This product was manufactured in humane work conditions
ꢀ All employees who worked on this product are paid
customary Swiss market wages and are insured
ꢀ ISO 9000:2001 (quality management system)
1.13. The Swiss Association for Quality and Management Sys-
tems
The Swiss Association for Quality and Management Systems (SQS) provides certification and assessment
services for all types of industries and services. SQS certificates are accepted worldwide thanks to accredita-
tion by the Swiss Accreditation Service (SAS), active membership in the International Certification Network,
IQNet, and co-operation contracts/agreements with accredited partners.
The SQS Certificate ISO 9001:2000 has been issued to DIGITAL-LOGIC AG, the entire company, in the field
of development, manufacturing and sales of embedded computer boards, embedded computer modules and
computer systems. The certification is valid for three years at which time an audit is performed for recertifica-
tion.
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2. OVERVIEW
2.1. Standard Features of the MSB900/L
The MICROSPACE 3.5”-SBC is a miniaturized modular device incorporating the major elements of a PC/AT
compatible computer. It includes standard PC/AT compatible elements, such as:
ꢀ Powerful GEODE LX-900 600MHz
ꢀ Legacy BIOS ROM
ꢀ DDR-SODIMM 200pin socket (for DDR-RAM 256-1024MB)
ꢀ 128k second level cache
ꢀ Timers
ꢀ DMA
ꢀ Real-time clock with CMOS-RAM and battery buffer (only on MSB900, not on MSB900L)
ꢀ LPT1 parallel port
ꢀ COM1-, COM2- RS2332 serial port
ꢀ Speaker interface
ꢀ PS/2-keyboard and mouse interface (shared on one mini DIN connector)
ꢀ PATA-IDE hard disk interface
ꢀ VGA video interface
ꢀ PCI/104 (one slot), limited I/O connector space
ꢀ 4 Channels USB 2.0
ꢀ Onboard CF socket Type II
2.2. Unique Features
The MICROSPACE 3.5”-SBC includes all standard PC/AT functions plus unique DIGITAL-LOGIC AG en-
hancements, such as:
ꢀ Two channel LAN Ethernet, INTEL 82551QM (LAN A) and INTEL 82551ER (LAN B)
ꢀ Boot from LAN (PXE and RPL)
ꢀ Single 8 - 32Volt supply
ꢀ Video input (only on MSB900, not available on MSB900L)
ꢀ Watchdog
ꢀ EEPROM for setup and configuration
ꢀ UL approved parts
ꢀ Optional: interface for operator display (LVDS, COM2, CRT, USB, SMBus)
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2.4. MSB900/MSB900L specifications
CPU
Specification
GEODE LX900
1.25V very low powered
Real / Protected
x86
32Bits
128kB
32 lines
16GB
CPU
CPU Core Supply
Mode
Compatibility
Word Size
Secondary Cache
Physical Addressing
Virtual Addressing
Clock Rates
Socket Standard
600MHz
Soldered BGA
Chipset
Specification
AMD LX900
AMD CS5536
Northbridge
Southbridge
LAN
Audio
Codec
2x 10/100Mbit Intel 82551QM (LAN A), Intel 82551ER (LAN B)
Stereo In and Stereo Line-Out
AD1985 up to 96kHz sampling rate, 16Bit (Analog Devices)
Not on board
16MByte Video-DDRAM
Firewire IEEE1394
Video
Power Management:
Specification
The LX900 supports ACPI and APM Version 1.2
The following ACPI Sleep States are supported:
- S1 (Standby)
- S3 (Suspend to RAM) not available
- S4 (Hibernation)
DMA:
Specification
8237A comp.
4 channel 8bit
3 channel 16bit
Interrupts:
Specification
8259 comp.
8 + 7 levels
PC compatible
Timers:
Specification
8254 comp.
3 programmable counters/timers
Memory:
Specification
SODIMM
SODIMM200pin DDR PC2700 333MHz 256-1024MByte
Video
Specification
Controller
BUS
Enhanced BIOS
Memory
CRT-Monitor
Video Input
GEODE LX900
32Bit high speed 33MHz PCI bus
VGA / LCD BIOS
2-16MByte shared RAM
VGA, SVGA up to 1920x1440
MSB900: yes, 1 channel
MSB900L: no
Drivers
WIN2000, XP
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Mass Storage
Specification
FD
HD
Floppy disk interface not supported
E-IDE interface, AT-type, for max. 2 hard disks, 44pin connector,
for 1.3, 1.8 and 2.5" hard disk with 44 pins IDE
Standard AT Interfaces:
Specification
Name
COM1
COM2
FIFO
yes
yes
IRQs
IRQ4
IRQ3
Addr.
3F8
2F8
Standard Option
RS232C
RS232C
Serial
COM1/2 available on headers onboard.
For DSub-connectors, option MSB800-CON is needed.
W83627HF from WINBOND
LPT1 printer interface mode: SPP (output), EPP (bidir.)
AT or PS/2-keyboard
PS/2
No speaker
Integrated into the chipset, RTC with CMOS-RAM 256Byte
<5 µA
Onboard 3.6Volt Lithium 400mAh available
External connection, no onboard battery available
SuperIO Chip
Parallel
Keyboard
Mouse
Speaker
RTC
Backup current
RTC-backup MSB900
RTC-backup MSB900L
BUS
Specification
PCI/104
Clock
PCI 32Bit Bus, 1 slot
33MHz defined by the GEODE
USB
Specification
USB
Transfer rate
Channels
2.0
480MBps, 12.5MBps / 1.5MBps
4
Peripheral Extension
ISA
PCI MSB900
PCI MSB900L
Specification
Not supported
With PCI/104 BUS (1 slot), limited I/O space
Not available
Power Supply
Working
Specification
8-32Volt 5% (peak 36Volt)
Unspecified
MSB900/L with HD, MS/KB (PS/2), CRT Monitor
Windows XP Desktop: type 8.5-10W
MSB900/L:
Power Rise Time
Power consumption
Standby power consumption
Windows Standby: 2.5W (without MS/KB wakeup function)
Windows Standby: 4.5W (with PS/2 wakeup function)
Physical Characteristics
Specification
Dimensions
Length: 146 mm
Depth: 102 mm
Height: 20 mm
160g
1.6mm / 0.0625 inches nominal
Multilayer
Weight
PCB Thickness
PCB Layer
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Operating Environment
Relative humidity
Vibration
Shock
Temperature
Specification
5-90%, non-condensing
5-2000Hz, 0.1G
1G
MSB900*:
Operating: Standard version: -25°C to +70°C
Extended version: -40°C to +85°C
Storage: -55°C to +85°C
* = with passive cooler
MSB900L**:
Operating: Standard version: 0°C to +60°C
Storage: -55°C to +85°C
** = without passive cooler
EMI/EMC (IEC1131-2 refer MIL
461/462)
Specification
ESD Electro Static Discharge
IEC 801-2, EN55101-2, VDE 0843/0847 Part 2
Metallic protection needed
Separate ground layer included
15kV single peak
REF Radiated Electromagnetic Field IEC 801-3, VDE 0843 Part 3, IEC770 6.2.9. (not tested)
EFT Electric Fast Transient (Burst)
IEC 801-4, EN50082-1, VDE 0843 Part 4
250V - 4kV, 50 ohms, Ts=5ns
Grade 2: 1kV Supply, 500 I/O, 5kHz
IEC 801-5, IEEE587, VDE 0843 Part 5
SIR Surge Immunity Requirements
Supply:
I/O:
2kV, 6 pulse/minute
500V, 2 pulse/minute
FD, CRT: none
EN55022
High-frequency Radiation
Compatibility
Specification
MSB900/L
Mechanically compatible to 3.5inch industrial embedded com-
puter boards
All information is subject to change without notice.
2.5. Examples of Ordering Codes
802220
802221
802205
MSB900 with LX900 CPU, 0MB-RAM, Battery, PCI/104 and Video input
MSB900L with LX900 CPU, 0MB RAM, …
MSB800CON COM1, LPT1 Expansion board.
These are only examples; for current ordering codes, please see the current price list.
2.6. Related Application Notes
Application CD.
#
Description
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2.8. MSB900/L Incompatibilities to a standard PC/AT
None.
2.9. Related Application Notes
Application CD.
#
Description
2.10. High Frequency Radiation (to meet EN55022)
All connectors are filtered onboard to comply with the EMI standards.
The following filters are used:
Interface
3db-
Frequency
Inductivity
L and R
Capacitor
to GND
Filter-Type
Protection
VGA-RGB
VGA-HS/VS
VGA-VCC
Ferrite
33ohms
Ferrite
2x 10pF
33pF
1nF
0V/3V Diode
0V/3V Diode
None
Video Input
USB
-
-
-
-
None
Inductors
none
DLP31D
Diode SRV05-4
GND/5V
IDE
33ohms series
Ferrite
-
-
None
None
Sound I/O
1nF
PS2-KB
Ferrite
Ferrite
Ferrite
Ferrite
47pF
47pF
1nF
None
None
None
None
PS2-MS
PS2-VCC
PS2-GND
1nF
COM1
COM2
LPT1
47pF
47pF
47pF
MAX211E
MAX211E
none
LAN
Integrated
PULSE
J00-0065NL
Isolated 500V
None
All 33MHz-Clocks
33Ohms series 10pF
22
DIGITAL-LOGIC AG
MSB900/L Detailed Technical Manual V1.0
2.11. Battery-Lifetime
Battery specs:
Lowest temp.
-40°C
Nominal temp.
+20°C
Highest temp.
+85°C
Manufacturer:
Type:
Capacity versus Temp:
Voltage versus Temp.
Nominal values:
pba
ER10280
10uA
10uA
420mAh
3.6V
400mAh
3.6V
350mAh
Ca. 3.6V
3.6V / 400mAh @ 0.5mA / -55°C...~+85°C
Information taken from the datasheet of ER10280
PRODUCT:
Temperature
°C
Battery voltage
V
VCC (+5)
switched ON
µA
VCC (+5V)
switched off
µA
Battery current:
Battery-Lifetime:
+25°C
+25°C
3.6
< 1
< 3
>3.5 years
>3.5 year
2.11.1. External battery assembling (for the MSB900L):
On the MSB900L board, an external battery can be connected to J3. Attach the battery ground to pin 2.
If the customer wants to connect an external battery, then some precautions have to be taken:
The battery is prohibited from charging. Do not use a rechargeable battery!
The RTC device defines a voltage level of 3.0-3.6V, so use an external battery within this range (inclusive of
the diode which is pre-assembled onboard).
3. BUS SIGNALS
3.1. Addressing PCI Devices
3.1.1.
MSB900 and MSB900L
DEVICE
IDSEL
PIRQ
#REG #GNT
Remarks
SLOT 1
AD20 A / B / C / D
3
3
For additional cards (peripheral boards)
Onboard used:
LAN A
LAN B
AD28
AD29
AD27
C
A
A / B
1
4
5
1
4
5
Onboard device
Onboard device
Optional device
Mini-PCI
CPU
AD11
A
2
2
Onboard device
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DIGITAL-LOGIC AG
MSB900/L Detailed Technical Manual V1.0
4. BIOS HISTORY
This BIOS history is for the MSB900/L.
This BIOS history is not for the following products:
MSEP900, MSM900, SM900
Version:
Date:
Status:
Modifications:
1.23
02.2007
Initial Release
-
-
-
-
-
-
-
Note…
This product has a unique BIOS version. For a description of the other features of the BIOS, please
refer to the driver/software/BIOS manual “GEODE_LX800-LX900” on the Product CD.
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DIGITAL-LOGIC AG
MSB900/L Detailed Technical Manual V1.0
5. DETAILED SYSTEM DESCRIPTION
This system configuration is based on the ISA architecture. Check the I/O and memory map in this chapter.
5.1. Power Requirements
The power is connected through the wide-range power connector. The supply uses only the +8V to +32V
and the ground connection.
Attention:
Make sure the power plug is wired correctly before supplying power to the board! A built-in diode
protects the board against reverse polarity.
Tolerance of supply:
Must be within 8-32Volt norm.
Test environment for power consumption measurement:
Peripheries:
Hard disk Hitachi Model HTA422020F9ATJ0 20GB
Monitor Eizo Flexscan F340I-W
PS/2-KB Logitech Model iTouch Keyboard
PS/2-MS Logitech Model M-CAA43
Software:
MS-DOS V6.22
WinXP
Current consumption @ 12Volt supply at -40°C/+25°C/+85°C
Mode
MSB900-600MHz
DOS: C:\
Memory
1GB
DLAG-Nr. -30 °C
[mA]
+25°C
[mA]
700
+85 °C
[mA]
WinXP: Desktop
1GB
700
5.2. Boot Time
System Boot-Times
Definitions/Boot-Medium
MSB900-600MHz
Quick Boot Normal Boot
time [s]
time [s]
From hard disk Hitachi Model J4K20-20:
Boot from hard disk to “Starting MS-DOS”.-Prompt
Boot from hard disk to XP desktop
-
-
15
45
10
Booting without a storage device (only BIOS)
25
DIGITAL-LOGIC AG
MSB900/L Detailed Technical Manual V1.0
5.3. CPU, Boards and RAMs
5.3.1.
CPUs of this MICROSPACE Product
Processor:
Type:
National
Clock:
600 MHz
GEODE LX900
5.3.2.
Numeric Coprocessor
It is integrated in the LX900 CPU.
5.3.3.
DDRAM Memory
Speed:
Size:
333
DDR-SODIMM
DDRDIMM 200pin
64bit
256-1024MBytes
DDR-SODIMM
1
Bits:
Capacity:
Bank:
5.4. Interfaces
5.4.1.
Keyboard AT compatible and PS/2 Mouse
The PS/2 Keyboard and Mouse are combined on the PS2-connector. It is needed to use a Y-Cable to con-
nect both, the mouse and the keyboard.
5.4.2.
Line Printer Port LPT1
A standard bi-directional LPT port is integrated into the MICROSPACE PC.
Further information about these signals is available in numerous publications, including the IBM technical
reference manuals for the PC and AT computers and from other reference documents.
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DIGITAL-LOGIC AG
MSB900/L Detailed Technical Manual V1.0
5.4.3.
Serial Ports COM1-COM2
The serial channels are fully compatible with 16C550 UARTS. COM1 is the primary serial port, and is sup-
ported by the board's ROM-BIOS as the PC-DOS 'COM1' device. The secondary serial port is COM2; it is
supported as the 'COM2' device.
Standard: COM 1/2: National PC87317VUL: 2 x 16C550 compatible serial interfaces
Serial Port Connectors COM1, COM2
Pin
1
2
3
4
5
6
7
8
Signal Name Function
in/out
in
in
DB25 Pin DB9 Pin
CD
DSR
RXD
RTS
TXD
CTS
DTR
RI
Data Carrier Detect
Data Set Ready
Receive Data
Request To Send
Transmit Data
Clear to Send
Data Terminal Ready
Ring Indicator
Signal Ground
8
6
1
6
2
7
3
8
4
9
5
in
3
4
2
5
out
out
in
out
in
20
22
7
9
GND
The serial port signals are compatible with the RS232C specifications.
5.4.4.
Floppy Disk Interface
This is not available with this product; use a USB Floppy.
5.5. Controllers
5.5.1.
Interrupt Controllers
An 8259A compatible interrupt controller, within the chipset, provides seven prioritized interrupt levels. Of
these, several are normally associated with the board's onboard device interfaces and controllers, and sev-
eral are available on the AT expansion bus.
Interrupt:
IRQ0
IRQ1
Sources:
Onboard used:
ROM-BIOS clock tick function, from timer 0
Keyboard controller output buffer full
Used for cascade 2. 8259
COM2 serial port
yes
yes
IRQ2
IRQ3
yes
yes
IRQ4
IRQ5
IRQ6
IRQ7
IRQ8
IRQ9
COM1 serial port
LPT2 parallel printer (if present)
Floppy controller
LPT1 parallel printer
Battery backed clock
Free for user
yes
no *
yes
yes
yes
no *
IRQ10
IRQ11
IRQ12
IRQ13
IRQ14
IRQ15
Free for user
Free for user
PS/2 mouse
Math. coprocessor
Hard disk IDE
Free for user
no *
no *
yes
yes
yes
no *
* It may depend on the LAN configuration.
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DIGITAL-LOGIC AG
MSB900/L Detailed Technical Manual V1.0
5.6. Timers and Counters
5.6.1.
Programmable Timers
An 8253 compatible timer/counter device is also included in the board's ASIC device. This device is utilized
in precisely the same manner as in a standard AT implementation. Each channel of the 8253 is driven by a
1.190 MHz clock, derived from a 14.318 MHz oscillator, which can be internally divided in order to provide a
variety of frequencies.
Timer 2 can also be used as a general purpose timer if the speaker function is not required.
Timer Assignment
Timer
Function
0
1
2
ROM-BIOS clock tick (18.2Hz)
DRAM refresh request timing (15 µs)
Speaker tone generation time base
5.6.2.
RTC (Real Time Clock)
An AT compatible date/time clock is located within the chipset. The device also contains a CMOS static
RAM, compatible with that in standard ATs. System configuration data is normally stored in the clock chip's
CMOS RAM in a manner consistent with the convention used in other AT compatible computers. To attach
5.6.3.
Watchdog
The watchdog timer detects a system crash and performs a hardware reset. After power up, the watchdog is
always disabled as the BIOS does not send strobes to the watchdog. In case the user wants to take advan-
tage of the watchdog, the application must produce a strobe at least every 800 ms. If no strobe occurs within
the 800 ms, the watchdog resets the system.
For more information, please refer to the driver/software/BIOS manual “GEODE_LX800-LX900” on the Prod-
uct CD. The watchdog feature is integrated in the INT15 function.
There are some programming examples available:
Product CD-Rom or customer download area: \tools\SM855\int15dl\…
5.6.4.
ROM-BIOS Sockets
An EPROM socket with 8bit wide data access normally contains the board’s AT compatible ROM-BIOS. The
socket takes a 29F020 EPROM (or equivalent) device. The board's wait-state control logic automatically in-
serts four memory wait states in all CPU accesses to this socket. The ROM-BIOS sockets occupy the mem-
ory area from C0000H through FFFFFh; however, the board's ASIC logic reserves the entire area from
C0000h through FFFFFh for onboard devices, so that this area is already usable for ROM-DOS and BIOS
expansion modules. Consult the appropriate address map for the MICROSPACE PC-Product ROM-BIOS
sockets.
28
DIGITAL-LOGIC AG
MSB900/L Detailed Technical Manual V1.0
5.6.4.1. Standard BIOS ROM
Device:
Map:
FWH
E0000 - FFFFFh
C0000 - C7FFFh
CC000 - CFFFFh
Core BIOS 128k
VGA BIOS 32k
FREE
5.6.5.
BIOS CMOS Setup
If wrong setups are memorized in the CMOS-RAM, the default values will be loaded after resetting the
RTC/CMOS-RAM by de-soldering the battery.
If the battery is down, it is always possible to start the system with the default values from the BIOS.
5.7. CMOS RAM Map
Systems based on the industry-standard specification include a battery backed Real Time Clock chip. This
clock contains at least 64Bytes of non-volatile RAM. The system BIOS uses this area to store information
including system configuration and initialization parameters, system diagnostics, and the time and date. This
information remains intact even when the system is powered down.
The BIOS supports 128Bytes of CMOS RAM. This information is accessible through I/O ports 70h and 71h.
CMOS RAM can be divided into several segments:
ꢁ
ꢁ
ꢁ
Locations 00h - 0Fh contain the real time clock (RTC) and status information
Locations 10h - 2Fh contain system configuration data
Locations 30h - 3Fh contain system BIOS-specific configuration data as well as chipset-specific in-
formation
ꢁ
Locations 40h - 7Fh contain chipset-specific information as well as power management configuration
parameters
The following table provides a summary of how these areas may be further divided.
Beginning
Ending
Checksum Description
00h
10h
2Eh
30h
34h
40h
5Ch
5Eh
6Fh
7Eh
0Fh
2Dh
2Fh
33h
3Fh
5Bh
5Dh
6Eh
7Dh
7Fh
No
RTC and Checksum
Yes
No
System Configuration
Checksum Value of 10h - 2Dh
Standard CMOS
No
No
Standard CMOS - SystemSoft Reserved
Extended CMOS - Chipset Specific
Checksum Value of 40h - 5Bh
Extended CMOS - Chipset Specific
Extended CMOS - Power Management
Checksum Value of 6Fh - 7Dh
Yes
No
No
Yes
No
29
DIGITAL-LOGIC AG
CMOS Map
MSB900/L Detailed Technical Manual V1.0
Location
00h
Description
Time of day (seconds) specified in BCD
Alarm (seconds) specified in BCD
Time of day (minutes) specified in BCD
Alarm (minutes) specified in BCD
Time of day (hours) specified in BCD
Alarm (hours) specified in BCD
Day of week specified in BCD
Day of month specified in BCD
Month specified in BCD
01h
02h
03h
04h
05h
06h
07h
08h
09h
Year specified in BCD
0Ah
Status Register A
Bit 7
=
Update in progress
Bits 6-4 = Time based frequency divider
Bits 3-0 = Rate selection bits that define the periodic
interrupt rate and output frequency.
0Bh
Status Register B
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
=
0
1
=
0
1
=
0
1
=
0
1
=
0
1
=
0
1
=
0
1
=
0
1
Run/Halt
Run
Halt
Periodic Timer
Disable
Enable
Alarm Interrupt
Disable
Enable
Update Ended Interrupt
Disable
Enable
Square Wave Interrupt
Disable
Enable
Calendar Format
BCD
Binary
Time Format
12-Hour
24-Hour
Daylight Savings Time
Disable
Enable
0Ch
Status Register C
Bit 7
Bit 6
Bit 5
Bit 4
=
=
=
=
Interrupt Flag
Periodic Interrupt Flag
Alarm Interrupt Flag
Update Interrupt Flag
Bits 3-0 = Reserved
Status Register D
0Dh
Bit 7
=
0
1
Real Time Clock
Lost Power
Power
Continued...
30
DIGITAL-LOGIC AG
MSB900/L Detailed Technical Manual V1.0
CMOS Map continued...
Location Description
0Eh
CMOS Location for Bad CMOS and Checksum Flags
Bit 7
Bit 6
= Flag for CMOS Lost Power
0
1
=
=
Power OK
Lost Power
= Flag for CMOS checksum bad
0
1
=
=
Checksum is valid
Checksum is bad
0Fh
10h
Shutdown Code
Diskette Drives
Bits 7-4 = Diskette Drive A
0000
0001
0010
0011
0100
0101
=
Not installed
=
Drive A = 360 kB
Drive A = 1.2MB
Drive A = 720 kB
Drive A = 1.44MB
Drive A = 2.88MB
=
=
=
=
Bits 3-0 = Diskette Drive B
0000
0001
0010
0011
0100
0101
=
=
=
=
=
=
Not installed
Drive B = 360 kB
Drive B = 1.2MB
Drive B = 720 kB
Drive B = 1.44MB
Drive B = 2.88MB
11h
12h
Reserved
Fixed (Hard) Drives
Bits 7-4 = Hard Drive 0, AT Type
0000
0001-1110
1111
=
=
=
Not installed
Types 1-14
Extended drive types 16-44.
See location 19h.
Bits 3-0 = Hard Drive 1, AT Type
0000
0001-1110
1111
=
=
=
Not installed
Types 1-14
Extended drive types 16-44.
See location 2Ah.
13h
14h
Reserved
Equipment
Bits 7-6 = Number of Diskette Drives
00
01
=
=
One diskette drive
Two diskette drives
Reserved
10, 11 =
Bits 5-4 = Primary Display Type
00
01
10
11
=
=
=
=
Adapter with option ROM
CGA in 40 column mode
CGA in 80 column mode
Monochrome
Bits 3-2 = Reserved
Bit 1
= Math Coprocessor Presence
0
1
=
=
Not installed
Installed
Bit 0
= Bootable Diskette Drive
0
1
=
=
Not installed
Installed
Continued...
31
DIGITAL-LOGIC AG
MSB900/L Detailed Technical Manual V1.0
CMOS Map continued...
Location Description
15h
16h
17h
18h
19h
1Ah
1Bh
Base Memory Size (in kB) - Low Byte
Base Memory Size (in kB) - High Byte
Extended Memory Size (in kB) - Low Byte
Extended Memory Size (in kB) - High Byte
Extended Drive Type - Hard Drive 0
Extended Drive Type - Hard Drive 1
Custom and Fixed (Hard) Drive Flags
Bits 7-6 = Reserved
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
= Internal Floppy Disk Controller
0
1
=
=
Disabled
Enabled
= Internal IDE Controller
0
1
=
=
Disabled
Enabled
= Hard Drive 0 Custom Flag
0
1
=
=
Disabled
Enabled
= Hard Drive 0 IDE Flag
0
1
=
=
Disabled
Enabled
= Hard Drive 1 Custom Flag
0
1
=
=
Disabled
Enabled
= Hard Drive 1 IDE Flag
0
1
=
=
Disabled
Enabled
1Ch
1Dh
1Eh
Reserved
EMS Memory Size Low Byte
EMS Memory Size High Byte
1Fh - 24h Custom Drive Table 0
These 6 Bytes (48 bits) contain the following data:
Cylinders
10bits
10bits
10bits
08bits
08bits
range 0-1023
Landing Zone
Write Precompensation
Heads
range 0-1023
range 0-1023
range 0-15
Sectors/Track
range 0-254
Byte 0
1Fh
20h
Bits 7-0 = Lower 8 bits of Cylinders
Byte 1
Bits 7-2 = Lower 6 bits of Landing Zone
Bits 1-0 = Upper 2 bits of Cylinders
Byte 2
21h
Bits 7-4 = Lower 4 bits of Write Precompensation
Bits 3-0 = Upper 4 bits of Landing Zone
Continued...
32
DIGITAL-LOGIC AG
MSB900/L Detailed Technical Manual V1.0
CMOS Map continued...
Location Description
Byte 3
22h
Bits 7-6 = Reserved
Bits 5-0 = Upper 6 bits of Write Precompensation
Byte 4
23h
24h
Bits 7-0 = Number of Heads
Byte 5
Bits 7-0 = Sectors Per Track
25h - 2Ah Custom Drive Table 1
These 6 Bytes (48 bits) contain the following data:
Cylinders
10bits
10bits
10bits
08bits
08bits
range 0-1023
Landing Zone
Write Precompensation
Heads
range 0-1023
range 0-1023
range 0-15
Sectors/Track
range 0-254
Byte 0
25h
26h
Bits 7-0 = Lower 8 bits of Cylinders
Byte 1
Bits 7-2 = Lower 6 bits of Landing Zone
Bits 1-0 = Upper 2 bits of Cylinders
Byte 2
27h
28h
29h
Bits 7-4 = Lower 4 bits of Write Precompensation
Bits 3-0 = Upper 4 bits of Landing Zone
Byte 3
Bits 7-6 = Reserved
Bits 5-0 = Upper 6 bits of Write Precompensation
Byte 4
Bits 7-0 = Number of Heads
Byte 5
2Ah
2Bh
Bits 7-0 = Sectors Per Track
Boot Password
Bit 7
= Enable/Disable Password
0
1
=
=
Disable Password
Enable Password
Bits 6-0 = Calculated Password
SCU Password
2Ch
Bit 7
= Enable/Disable Password
0
1
=
=
Disable Password
Enable Password
Bits 6-0 = Calculated Password
Reserved
2Dh
2Eh
2Fh
30h
31h
32h
High Byte of Checksum - Locations 10h to 2Dh
Low Byte of Checksum - Locations 10h to 2Dh
Extended RAM (kB) detected by POST - Low Byte
Extended RAM (kB) detected by POST - High Byte
BCD Value for Century
Continued...
33
DIGITAL-LOGIC AG
MSB900/L Detailed Technical Manual V1.0
CMOS Map continued...
Location Description
33h
34h
35h
Base Memory Installed
Bit 7 = Flag for Memory Size
0
1
=
=
640kB
512kB
Bits 6-0 = Reserved
Minor CPU Revision
Differentiates CPUs within a CPU type (i.e., 486SX vs 486 DX,
vs 486 DX/2). This is crucial for correctly determining CPU input
clock frequency. During a power-on reset, Reg DL holds minor
CPU revision.
Major CPU Revision
Differentiates between different CPUs (i.e., 386, 486, Pentium).
This is crucial for correctly determining CPU input clock fre-
quency. During a power-on reset, Reg DH holds major CPU
revision.
36h
Hotkey Usage
Bits 7-6 = Reserved
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
= Semaphore for Completed POST
= Semaphore for 0 Volt POST (not currently used)
= Semaphore for already in SCU menu
= Semaphore for already in PM menu
= Semaphore for SCU menu call pending
= Semaphore for PM menu call pending
Definitions for these locations vary depending on the chipset.
40h-7Fh
5.8. EEPROM saved CMOS Setup
The EEPROM has different functions, as listed below:
• Backup of the CMOS-Setup values.
• Storing system information (i.e., version, production date, customization of the board, CPU type).
• Storing user/application values.
The EEPROM will be updated automatically after exiting the BIOS setup menu. The system will operate also
without any CMOS battery. While booting, the CMOS is automatically updated with the EEPROM values.
Press the Esc-key while powering on the system before the video shows the BIOS message and the CMOS
will not be updated.
This would be helpful, if wrong parameters are stored in the EEPROM and the setup of the BIOS does not
start.
If the system hangs or a problem appears, the following steps must be performed:
1. Reset the CMOS-Setup (disconnect the battery for at least 10 minutes).
2. Press Esc until the system starts up.
3. Enter the BIOS Setup:
a) load DEFAULT values
b) enter the settings for the environment
c) exit the setup
4. Restart the system.
The user may access the EEPROM through the INT15 special functions. Refer to that chapter in the GEODE
LX800-LX900 manual on the Product CD.
The system information is read-only and uses the SFI functions. Refer to the GEODE LX800-LX900 manual.
34
DIGITAL-LOGIC AG
MSB900/L Detailed Technical Manual V1.0
5.8.1.
EEPROM Memory for Setup
The EEPROM is used for setup and configuration data, stored as an alternative to the CMOS-RTC. Option-
ally, the EEPROM setup driver may update the CMOS RTC, if the battery is running down and the checksum
error would appear and stop the system. The capacity of the EEPROM is 2 kByte.
Organization of the 2048Byte EEPROMs:
Address MAP:
Function:
0000h
0001h
0003h
CMOS-Setup valid (01=valid)
Reserved
Flag for DLAG-Message (FF=no message)
Copy of CMOS-Setup data
Reserved for AUX-CMOS-Setup
Serial-Number
Production date (year/day/month)
1. Service date (year/day/month)
2. Service date (year/day/month)
3. Service date (year/day/month)
Boot errors (Auto incremented if any boot error occurs)
Setup Entries (Auto incremented on every Setup entry)
Low Battery (Auto incremented every time the battery is low, EEPROM -> CMOS)
Startup (Auto incremented on every power-on start)
Reserved
0010h-007Fh
0080h-00FFh
0100h-010Fh
0110h-0113h
0114h-0117h
0118h-011Bh
011Ch-011Fh
0120h-0122h
0123h-0125h
0126h-0128h
0129h-012Bh
0130h
0131h
Reserved
0132h/0133h
0134h/0135h
0136h
BIOS Version (V1.4 => [0132h]:= 4, [0133h]:=1)
BOARD Version (V1.5 => [0124h]:=5, [0125h]:=1)
BOARD TYPE (‘M’=PC/104, ‘E’=Euro, ‘W’=MSWS, ‘S’=Slot, ‘C’=Custom, ‘X’= smart-
Core or smartModule)
0137h
CPU TYPE:
(01h=ELAN300/310, 02h=ELAN400, 05h=P5, 08h=P3, 09h=ELAN520, 10h=P-M).
Reserved
Reserved
0200h-03FFh
0200h-027Fh
0400h-07FFh
Free for Customer use
5.9. Memory & I/O Map
5.9.1.
System Memory Map
The X86 CPU, used as a central processing unit on the MICROSPACE, has a memory address space which
is defined by 32 address bits. Therefore, it can address 1 GByte of memory. The memory address MAP is as
follows:
CPU GEODE
Address:
Size:
Function / Comments:
000000 - 09FFFFh
0A0000 - 0BFFFFh
0C0000 - 0C7FFFh
0C8000 - 0CFFFFh
0D0000 - 0DFFFFh
0E0000 - 0EBFFFh
0EC000 - 0EFFFFh
0F0000 - 0FFFFFh
100000 - 1FFFFFFh
640 kBytes
128 kBytes
32 kBytes
32 kBytes
64 kBytes
32 kBytes
16 kBytes
64 kBytes
31 MBytes
Onboard DRAM for DOS applications
CGA, EGA, LCD Video RAM 128kB
VGA BIOS
Free for user
Free for user
Bios
BIOS extensions
Core BIOS
DRAM for extended onboard memory
35
DIGITAL-LOGIC AG
MSB900/L Detailed Technical Manual V1.0
5.9.2.
System I/O map
The following table details the legacy I/O range for 000h through 4FFh. Each I/O location has a read/write
(R/W) capability.
Note the following abbreviations:
---
Unknown or can not be determined.
Yes
WO
RO
Read and write the register at the indicated location. No shadow required.
Write only. Value written can not be read back. Reads do not contain any useful information.
Read only. Writes have no effect.
The value written to the register can not be read back via the same I/O location. Read back is
accomplished via a “Shadow” register located in MSR space.
Shw
Shw@
Shw$
Reads of the location return a constant or meaningless value.
Reads of the location return a status or some other meaningful information
Writes to the location are “recorded” and written to the LPC. Reads to the location return the re-
corded value. The LPC is not read.
Rec
I/O Map
I/O Addr. Function
Slave DMA Address - Channel 0
Size R/W Comment
000h
001h
002h
003h
004h
005h
006h
007h
008h
009h
00Ah
00Bh
00Ch
00Dh
00Eh
00Fh
8bit Yes 16bit values in two transfers.
8bit Yes 16bit values in two transfers.
8bit Yes 16bit values in two transfers.
8bit Yes 16bit values in two transfers.
8bit Yes 16bit values in two transfers.
8bit Yes 16bit values in two transfers.
8bit Yes 16bit values in two transfers.
8bit Yes 16bit values in two transfers.
8bit Shw$
Slave DMA Counter - Channel 0
Slave DMA Address - Channel 1
Slave DMA Counter - Channel 1
Slave DMA Address - Channel 2
Slave DMA Counter - Channel 2
Slave DMA Address - Channel 3
Slave DMA Counter - Channel 3
Slave DMA Command/Status - Channels [3:0]
Slave DMA Request - Channels [3:0]
Slave DMA Mask - Channels [3:0]
Slave DMA Mode - Channels [3:0]
Slave DMA Clear Pointer - Channels [3:0]
Slave DMA Reset - Channels [3:0]
Slave DMA Reset Mask - Channels [3:0]
Slave DMA General Mask - Channels [3:0]
8bit WO Reads return value B2h.
8bit Shw@ Reads return value B2h.
8bit Shw@ Reads return value B2h.
8bit WO Reads return value B2h.
8bit WO Reads return value B2h.
8bit Shw@ Reads return value B2h.
8bit Shw@ Reads return value B2h.
010h-01Fh No Specific Usage
---
---
020h
021h
PIC Master - Command/Status
PIC Master - Command/Status
8bit Shw$
8bit Shw$
022h-03Fh No Specific Usage
---
---
040h
041h
042h
043h
PIT – System Timer
PIT – Refresh Timer
PIT – Speaker Timer
PIT – Control
8bit Shw$
8bit Shw$
8bit Shw$
8bit Shw$
044h-05Fh No Specific Usage
---
---
Continued…
36
DIGITAL-LOGIC AG
MSB900/L Detailed Technical Manual V1.0
I/O Map Continued…
I/O Addr. Function
Size R/W Comment
If KEL Memory Offset 100h[0] = 1(Emulation-
Enabled bit).
060h
Keyboard/Mouse - Data Port
8bit Yes
If MSR 5140001Fh[0] = 1 (SNOOP bit) and
KEL Memory Offset 100h[0] = 0 (Emulation-
Enabled bit).
061h
Port B Control
8bit Yes
062h-063h No Specific Usage
---
---
If KEL Memory Offset 100h[0] = 1
(Emulation-Enabled bit).
.
064h
Keyboard/Mouse - Command/ Status
8bit Yes
If MSR 5140001Fh[0] = 1 (SNOOP
bit) and KEL Memory Offset 100h[0]
= 0 (Emulation-Enabled bit)
065h-06Fh No Specific Usage
---
---
070h-071h RTC RAM Address/Data Port
072h-073h High RTC RAM Address/Data Port
074-077h No Specific Usage
8bit Yes Options per MSR 51400014h[0]. (Note 1)
8bit Yes Options per MSR 51400014h[1].
---
---
---
---
078h-07Fh No Specific Usage
080h
081h
082h
083h
Post Code Display
8bit Rec Write LPC and DMA. Read only DMA.
DMA Channel 2 Low Page
DMA Channel 3 Low Page
DMA Channel 1 Low Page
Upper addr bits [23:16]. Write LPC and
8bit Rec
DMA. Read only DMA.
084h-086h No Specific Usage
8bit Rec Write LPC and DMA. Read only DMA.
Upper addr bits [23:16]. Write LPC and DMA.
Read only DMA.
087h
DMA Channel 0 Low Page
8bit Rec
088h
089h
08Ah
08B
No Specific Usage
8bit Rec Write LPC and DMA. Read only DMA.
DMA Channel 6 Low Page
DMA Channel 7 Low Page
DMA Channel 5 Low Page
Upper addr bits [23:16]. Write LPC and DMA.
Read only DMA.
8bit Rec
08Ch-08Dh No Specific Usage
8bit Rec Write LPC and DMA. Read only
08Eh
08Fh
DMA
DMA C4 Low Page
8bit Rec Upper addr bits [23:16]. See comment at 080h.
090h-091h No Specific Usage
092h Port A
093h-09Fh No Specific Usage
---
8bit Yes
--- ---
---
If kel_porta_en is enabled, then access Port A;
else access LPC.
0A0h
0A1h
PIC Slave - Command/Status
PIC Slave - Command/Status
8bit Shw$
8bit Shw$
0A2h-0BFh No Specific Usage
8bit
8bit Yes 16bit values in two transfers.
8bit ---
8bit Yes 16bit values in two transfers.
8bit ---
---
0C0h
Master DMA Address - Channel 4
0C1h
No Specific Usage
0C2h
Master DMA Counter - Channel 4
No Specific Usage
0C3h
0C4h
Master DMA Address - Channel 5
Master DMA Counter - Channel 5
No Specific Usage
8bit Yes 16bit values in two transfers.
8bit Yes 16bit values in two transfers.
0C6h
0C7h
8bit
---
0C8h
Master DMA Address - Channel 6
Master DMA Counter - Channel 6
No Specific Usage
8bit Yes 16bit values in two transfers.
8bit Yes 16bit values in two transfers.
0CAh
0CBh
Continued…
8bit
---
37
DIGITAL-LOGIC AG
MSB900/L Detailed Technical Manual V1.0
I/O Map Continued…
I/O Addr. Function
Size R/W Comment
8bit Yes 16bit values in two transfers.
8bit ---
8bit Yes 16bit values in two transfers.
8bit ---
8bit Shw$
8bit ---
8bit WO
8bit ---
8bit Yes
8bit ---
8bit Shw@
8bit ---
8bit WO
8bit ---
8bit WO
8bit ---
8bit WO
8bit ---
8bit Shw@
0CCh
0CDh
0CEh
0CFh
0D0h
0D1h
0D2h
0D3h
0D4h
0D5h
0D6h
0D7h
0D8h
0D9h
0DAh
0DBh
0DCh
0DDh
0DEh
0DFh
Master DMA Address - Channel 7
No Specific Usage
Master DMA Counter - Channel 7
No Specific Usage
Master DMA Command/Status – Channels [7:4]
No Specific Usage
Master DMA Request - Channels [7:4]
No Specific Usage
Master DMA Mask - Channels [7:4]
No Specific Usage
Master DMA Mode - Channels [7:4]
No Specific Usage
Master DMA Clear Pointer - Channels [7:4]
No Specific Usage
Master DMA Reset - Channels [7:4]
No Specific Usage
Master DMA Reset Mask - Channels [7:4]
No Specific Usage
Master DMA General Mask - Channels [7:4]
No Specific Usage
8bit
---
---
---
0E0h-2E7h No Specific Usage
2E8h-2EFh UART/IR - COM4
2F0h-2F7h No Specific Usage
2F8h-2FFh UART/IR - COM2
300h- 36Fh No Specific Usage
MSR bit enables/disables into I/O
2EFh space. (UART1 MSR
51400014h[18:16], UART2 MSR
51400014h[22:20]). Defaults to
LPC.
8bit
---
---
---
MSR bit enables/disables into I/O
2FFh space. (UART1 MSR
8bit
--- 51400014h[18:16], UART2 MSR
51400014h[22:20]). Defaults to
LPC.
---
---
370h
371h
372h
373h
374h
375h
376h
377h
Floppy Status R A
Floppy Status R B
Floppy Digital Out
No Specific Usage
Floppy Cntrl Status
Floppy Data
8bit
8bit
RO Second Floppy.
RO Second Floppy.
8bit Shw@ Second Floppy.
8bit
8bit
---
RO Second Floppy.
8bit Yes Second Floppy.
8bit ---
8bit Shw$ Second Floppy.
No Specific Usage
Floppy Conf Reg
378h-3E7h No Specific Usage
---
---
MSR bit enables/disables into I/O
3EFh space. (UART1 MSR
51400014h[18:16], UART2 MSR
51400014h[22:20]). Defaults to
LPC.
3E8h-3EFh UART/IR - COM3
8bit
8bit
---
3F0h
Floppy Status R A
RO First Floppy.
Continued…
38
DIGITAL-LOGIC AG
MSB900/L Detailed Technical Manual V1.0
I/O Map Continued…
I/O Addr. Function
Size R/W Comment
8bit RO First Floppy.
8bit Shw@ First Floppy.
3F1h
3F2h
3F3h
3F4h
3F5h
3F6h
3F7h
Floppy Status R B
Floppy Digital Out
No Specific Usage
Floppy Cntrl Status
Floppy Data
8bit
8bit
---
RO First Floppy.
8bit Yes First Floppy.
8bit ---
8bit Shw$ First Floppy.
MSR bit enables/disables into I/O
No Specific Usage
Floppy Conf Reg
3FFh space. (UART1 MSR
51400014h[18:16], UART2 MSR
51400014h[22:20]). Defaults to
LPC.
3F8h-3FFh UART/IR - COM1
8bit
---
480h
481h
No Specific Usage
8bit WO Write LPC and DMA. Read only DMA.
Upper addr bits [31:24]. Write LPC and DMA.
Read only DMA.
DMA Channel 2 High Page
8bit Rec
482h
483h
DMA Channel 3 High Page
DMA Channel 1 High Page
484h-486h No Specific Usage
8bit WO Write LPC and DMA. Read only DMA.
Upper addr bits [31:24]. Write LPC and DMA.
Read only DMA.
487h
489h
DMA Channel 0 High Page
8bit Rec
Upper addr bits [31:24]. Write LPC and DMA.
Read only DMA.
DMA Channel 6 High Page
8bit Rec
48Ah
48Bh
DMA Channel 7 High Page
DMA Channel 5 High Page
48Ch-48Eh No Specific Usage
8bit WO Write LPC and DMA. Read only DMA.
Upper addr bits [31:24]. Write LPC and DMA.
Read only DMA.
48Fh
DMA Channel 4 High Page
8bit Rec
490h-4CFh No Specific Usage
---
---
4D0h
4D1h
PIC Level/Edge
PIC Level/Edge
8bit Yes IRQ0-IRQ 7.
8bit Yes IRQ8-IRQ15.
4D2h-4FFh No Specific Usage
---
---
Note 1: The Diverse Device Snoops writes to this port and maintains the MSB as NMI enabled. When low,
NMI is enabled. When high, NMI is disabled. This bit defaults high. Reads of this port return bits
[6:0] from the on-chip or off-chip target, while Bit 7 is returned from the “maintained” value.
39
DIGITAL-LOGIC AG
MSB900/L Detailed Technical Manual V1.0
6. VGA
6.1. VGA/LCD Controller of the Geode LX900
• Highly integrated flat panel and CRT GUI Accelerator & Multimedia Engine, Palette/DAC, Clock Synthe-
sizer, and integrated frame buffer
• HiQColorTM Technology implemented with TMED (Temporal Modulated Energy Distribution)
• Hardware Windows Acceleration
• Hardware Multimedia Support
• High-Performance flat panel display resolution and color depth at 3.3V
• 18/24bit direct interface to color TFT panels (X1)
• Advanced Power Management minimizes power usage in:
ꢀ
ꢀ
ꢀ
Normal operation
Standby (Sleep) modes
Panel-Off Power-Saving Mode
• VESA standards supported
• Fully compatible with IBM® VGA
• Driver support for Windows XP, Windows 2000, Windows 98, Windows NT4.0
Attention!
When connecting or disconnecting the monitor, be very careful. Also hold the socket on the board
at the same time to add stability.
6.2. Graphic Modes
Bios settings: 254MB video memory (shared)
Resolution
Col. Dept.
Frequency
800x600
16bit / 32bit
16bit / 32bit
16bit / 32bit
16bit / 32bit
16bit / 32bit
16bit / 32bit
60Hz – 100Hz
60Hz – 100Hz
60Hz – 100Hz
60Hz – 100Hz
60Hz – 100Hz
60Hz – 85Hz
1024x768
1152x864
1280x1024
1600x1200
1920x1440
40
DIGITAL-LOGIC AG
MSB900/L Detailed Technical Manual V1.0
7. VIDEO INPUT
The MSB900 contains a low-cost video input port. It consist of LX900’s video input port (VIP) and the exter-
nal frame grabber chip SAA7111A. This port is capable of digitizing a CVBS video signal with 15 frames per
second at a resolution of 352x288bits. Note that this frame rate is only achievable when the raw data stream
is compressed before being stored on the hard drive. Driver support is currently available for the Windows
XP platform.
8. DESCRIPTION OF THE CONNECTORS
Flat cable
•
•
•
44pin IDE is: IDT Terminal for Dual Row (2.00mm grid) and 1.00mm flat cable
All others are: IDT Terminal for Dual Row 0.1" (2.54mm grid) and 1.27mm flat cable
NC: not connected
Connector
Structure
Pin
Remarks
X1
X14
X15
X20
X22
X31
X33
X34
X39
X50
X51
X52
X60
X61
X71
X101
X110
X120
X230
X301
Power
Video Input
2pin jack plug
SMA
44pin RM 2.0
3.5mm jack plug
3.5mm jack plug
PS/2
RJ45
RJ45
10pin RM 2.54mm
Dual-USB
Dual-USB
Operator panel connector / Flat panel
Sound MIC stereo input
Sound speaker stereo output
Keyboard PS/2 and Mouse Utility connector
LAN Port A
Not assembled
LAN Port B
COM2 serial interface connector
USB 0/1 connector
USB 2/3 connector
Socket for USB UDOC
IDE PATA connector
10pin RM2.54mm Not assembled
44pin RM 2.0
32pin RM 2.54mm
50pin
COM1 and LPT connector
CompactFlash Socket
PCI/104 expansion connector
POD-Port interface connector
MiniPCI socket
120pin
14pin
124pin
4 pin
15pin DSUB
JTAG-Port
DSUB VGA connector
High-density
41
DIGITAL-LOGIC AG
MSB900/L Detailed Technical Manual V1.0
Top view of the MSB900/L
42
DIGITAL-LOGIC AG
MSB900/L Detailed Technical Manual V1.0
Bottom view of the MSB900/L
43
DIGITAL-LOGIC AG
MSB900/L Detailed Technical Manual V1.0
X1
Power Supply
Signal
Pin
1 (Shield) Power supply 8-30V
2
3
NC
Power supply GND
X14 Video IN
Pin Signal
Pin Signal
GND
1
CVBS
2
44
DIGITAL-LOGIC AG
MSB900/L Detailed Technical Manual V1.0
X15 Operator Panel / Flat Panel (bottom side)
X15 is intended to be used internally to attach an operator panel. Some signals may not be present or are
shared with other connectors. This connector is not assembled and is only for OEM-specific applications. A
2mm x 44pin header is needed.
Pin Signal
1
2
3
4
5
6
7
8
9
GND
VCC (+5V output)
LVDS YAM0
LVDS YAP0
GND
VCC (+5V output)
LVDS YAM1
LVDS YAP1
GND
Note...
VCC:
VCC3:
max. 0.5 Amp
max. 0.5 Amp
DCMAIN: DC supply input must be within
the 8-30V range.
10 VCC (+5V output)
11 LVDS YAM2
12 LVDS YAP2
13 GND
14 Enable VDD
15 LVDS CLKAP
16 LVDS CLKAM
17 CRT red
Attention!
If the VGA or COM2 signals on X15 are
used, the X10 (VGA connector) or the
X39 (COM2 connector) must not be con-
nected.
18 CRT green
19 CRT blue
20 CRT hsync
21 CRT vsync
22 CRT SCL
23 CRT SDA
24 GND
Attention!
USB-signals on X15 are multiplexed with
the USB-Port1. They must be enabled by
soldering the two resistors.
25 COM2 DCD
26 COM2 DSR
27 COM2 RXD
28 COM2 RTS
29 COM2 TXD
30 COM2 CTS
31 COM2 DTR
32 COM2 RI
33 SYS_RST#
34 VCC3 (+3.3V output)
35 USB D-
36 USB D+
37 VCC3 (+3.3V output)
38 SMB SCL
39 SMB SDA
40 AVR PA0
41 AVR PA3
42 DCMAIN (filtered power input)
43 GND
44 VCC (+5V output)
45
DIGITAL-LOGIC AG
MSB900/L Detailed Technical Manual V1.0
X15 Reverse Pin Configuration MSB900 LVDS X15 (on component side)
Attention!
When X15 is soldered on the component side, a different pin numbering schema must be applied.
Odd and even pin numbers are swapped. Ignoring this warning may result in the destruction
of any attached devices such as displays!
Pin Signal
1
2
3
4
5
6
7
8
9
VCC (+5V Output)
GND
LVDS_YAP0
LVDS_YAM0
VCC (+5V Output)
GND
LVDS_YAP1
LVDS_YAM1
VCC (+5V Output)
10 GND
11 LVDS_YAP2
12 LVDS_YAM2
13 Enable VDD
14 GND
15 LVDS_CLKAM
16 LVDS_CLKAP
17 CRT green
18 CRT red
19 CRT hsync
20 CRT blue
21 CRT SCL
22 CRT vsync
23 GND
24 CRT SDA
25 COM2 DSR
26 COM2 DCD
27 COM2 RTS
28 COM2 RXD
29 COM2 CTS
30 COM2 TXD
31 COM2 RI
32 COM2 DTR
33 VCC3 (+3.3V Output)
34 SYS_RST#
35 USB D+
36 USB D-
37 SMB SCL
38 VCC3 (+3.3V Output)
39 AVR PA0
40 SMB SDA
41 DCMAIN (filtered power input)
42 AVR PA3
43 VCC (+5V Output)
44 GND
46
DIGITAL-LOGIC AG
MSB900/L Detailed Technical Manual V1.0
X31 Keyboard PS/2 and Mouse Utility Connector
Connector and Adapter
Mini- DIN PS/2 (6 PC)
Remarks
KEYBOARD
Shield
DATA
GND
VCC (+5V)
CLK
Shield
1
3
4
5
Mini- DIN PS/2 (6 PC)
Remarks
MOUSE
VCC (+5V)
DATA
GND
4
2
3
6
CLK
PS/2 Front side (female)
X33 10/100 BASE-T Interface Connector 0
Pin Signal (CAT 5)
1
2
3
4
5
6
7
8
TX+
TX-
RX+
RX-
X34 10/100 BASE-T Interface Connector 1
Pin Signal
1
2
3
4
5
6
7
8
TX+
TX-
RX+
RX-
47
DIGITAL-LOGIC AG
MSB900/L Detailed Technical Manual V1.0
X39 Serial Port COM2
Header onboard
D-SUB connector
Signal
Pin 1
Pin 2
Pin 3
Pin 4
Pin 5
Pin 6
Pin 7
Pin 8
Pin 9
Pin 10
Pin 1
Pin 6
Pin 2
Pin 7
Pin 3
Pin 8
Pin 4
Pin 9
Pin 5
DCD
DSR
RxD
RTS
TxD
CTS
DTR
RI
GND
open
Attention!
If the X39 connector is used, DO NOT connect the COM2 signals on the X15 connector!
X50 USB 1 Connector (Dual-USB)
Pin Signal Remarks
1
2
3
4
5
6
7
8
VCC
USB-P1-
USB-P1+
GND
VCC
USB-P2-
USB-P2+
GND
On MPC20/21, not assembled.
X51 USB 2 Connector (Dual USB)
Pin Signal Remarks
1
2
3
4
5
6
7
8
VCC
USB-P2-
USB-P2+
GND
VCC
USB-P4-
USB-P4+
GND
Pin 1
Pin 2
Pin 3
Pin 4
VCC
USB-P-
USB-P+
GND
48
DIGITAL-LOGIC AG
MSB900/L Detailed Technical Manual V1.0
X52 USB UDOC (not assembled)
Pin Signal
Pin Signal
1
2
3
4
5
VCC
NC
6
7
8
9
NC
GND
NC
NC
USB-P2-
NC
USB-P2+
10 NC
Attention!
X52 for USB-DOC-Flash drives are only for OEM use. The connector is not assembled. The UDOC
may be assembled if the CompactFlash is not assembled.
X60 IDE Interface
Pin Signal
Pin Signal
1
3
5
7
9
Reset (active low)
2
4
6
8
GND
D8
D9
D7
D6
D5
D4
D10
10 D11
12 D12
14 D13
16 D14
18 D15
11 D3
13 D2
15 D1
17 D0
19 GND
21 DREQ
23 IOW (active low)
25 IOR (active low)
27 IORDY
29 DACK
20 (keypin) NC
22 GND
24 GND
26 GND
28 ALE / Master-Slave
30 GND
31 IRQ14
33 ADR1
35 ADR0
37 CS0 (active low)
39 LED (active low)
41 VCC Logic
43 GND
32 NC
34 NC
36 ADR2
38 CS1 (active low)
40 GND
42 VCC Motor
44 NC
49
DIGITAL-LOGIC AG
MSB900/L Detailed Technical Manual V1.0
X61 Serial Port COM1, Parallel Port LPT1
Header onboard
D-SUB connector
Signal
Pin 1
Pin 2
Pin 3
Pin 4
Pin 5
Pin 6
Pin 7
Pin 8
Pin 9
Pin 1
Pin 6
Pin 2
Pin 7
Pin 3
Pin 8
Pin 4
Pin 9
Pin 5
DCD
DSR
RxD
RTS
TxD
CTS
DTR
RI
GND
GND
Pin 10
Pin 11
Pin 12
Pin 13
Pin 14
Pin 15
Pin 16
Pin 17
Pin 18
Pin 19
Pin 20
Pin 21
Pin 22
Pin 23
Pin 24
Pin 25
Pin 26
Pin 27
Pin 28
Pin 29
Pin 30
Pin 29
Pin 30
select
paper end
busy
Pin 12
Pin 11
Pin 10
Pin 9
Pin 8
Pin 7
Pin 6
Pin 5
Pin 17
Pin 4
Pin 16
Pin 3
Pin 15
Pin 2
Pin 14
Pin 1
Pin 23-25
acknowledge
data 7
data 6
data 5
data 4
data 3
shift in
data 2
init printer
data 1
error
data 0
auto feed
strobe
GND
power supply GND
power supply 8-30V
power supply GND
power supply 8-30V
50
DIGITAL-LOGIC AG
MSB900/L Detailed Technical Manual V1.0
X101 PCI-104 BUS Interface
Pin
A
B
C
D
1
2
3
4
5
6
7
8
GND/5.0V KEY2
VI/O
AD05
C/BE0*
GND
AD11
AD14
+3.3V
SERR*
GND
STOP*
+3.3V
FRAME*
GND
AD18
AD21
+3.3V
IDSEL0
AD24
GND
AD29
+5V
REQ0*
GND
Reserved
AD02
GND
AD07
AD09
VI/O
AD13
C/BE1*
GND
PERR*
+3.3V
TRDY*
GND
AD16
+3.3V
AD20
AD23
GND
C/BE3*
AD26
+5V
AD30
GND
REQ2*
VI/O
+5
AD00
+5V
AD03
AD06
GND
M66EN
AD12
+3.3V
PAR
SDONE
GND
DEVSEL*
+3.3V
C/BE2*
GND
AD01
AD04
GND
AD08
AD10
GND
AD15
SB0*
+3.3V
LOCK*
GND
IRDY*
+3.3V
AD17
GND
AD22
IDSEL1
VI/O
AD25
AD28
GND
REQ1*
+5V
GNT2*
GND
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
AD19
+3.3V
IDSEL2
IDSEL3
GND
AD27
AD31
VI/O
GNT0*
GND
CLK1
GND
RST*
GNT1*
+5V
CLK2
GND
+12V
CLK0
+5V
INTD*
INTA*
Reserved
CLK3
+5V
INTB*
Reserved
INTC*
GND/3.3V KEY2
-12V
Notes:
1. The shaded area denotes power or ground signals.
2. The KEY pins are to guarantee proper module installation. Pin-A1 will be removed and the female side
plugged for 5.0V I/O signals and Pin-D30 will be modified in the same manner for 3.3V I/O. It is highly
recommended that both KEY pins (A1 and D30) be electrically connected to GND for shielding.
DLAG boards have them as NC (not connected).
X110 LPC-Port
Only for factory and POD-Diagnostic use.
Pin Signal
Pin Signal
1
3
5
7
9
VCC 3.3V
2
4
6
8
LAD0
LAD1
LAD2
LAD3
LFrame#
PCI_RST#
FWH_TBL#
VCC 5V
10 PCI_RST#
12 nc
14 FWH_Control
11 LPC_Clock
13 Ground
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DIGITAL-LOGIC AG
MSB900/L Detailed Technical Manual V1.0
X230 JTAG-Port
Pin Signal
Pin Signal
1
3
TCK
TDI
2
4
TMS
TDO
X301 VGA Monitor (CRT-Signals)
15pins High-Density DSub
Pin
Signal
1
2
Red
Green
Blue
H-Synch
V-Synch
Bridged
3
13
14
5 + 11
5, 6, 7, 8 Grounded
The VGA-CRT signals from J2 must be wired to a standard VGA High Density DSub-connector (female):
The LCD signals must be wired panel-specific.
Solder-side view of the female 15pin HiDSub
1
2
3
4
5
Red Green Blue
GND
6
7
8
9
10
GND
11
12
13
14
15
HSyn VSyn
Attention!
If the X10 connector is used, DO NOT connect the VGA signals on the X15 connector!
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9. JUMPER LOCATIONS ON THE BOARD
The following figure shows the location of all jumper blocks on the MSB900/L board. The numbers shown in
this figure are silk screened on the board so that the pins can easily be located. This chapter refers to the
individual pins for these jumpers. The default jumper settings are indicated with asterisks.
Be careful: some jumpers are soldering bridges; you will need a miniature soldering station with a vacuum
pump.
9.1. The Jumpers on MSB900/L
Settings written in bold are defaults.
Remarks
Jumper
Structure
1-2 / open
2-3 / closed
J1
J2
J3
J4
CompactFlash master
Autostart function
Disconnect Battery
Slave
Master
N/A
N/A
1)
Enabled
Disabled
Disabled
Disconnect CMOS EEPROM
N/A
1) With the autostart function enabled, the system will start booting up within 2 seconds after the power
supply is turned on.
9.2. Reload Default BIOS Settings
To reload default BIOS settings when the system refuses to boot after defective BIOS settings have been
made please proceed as follows.
•
•
•
•
•
•
Turn off the system.
Remove J3 on MSB900 or disconnect the optional external battery on the MSB900L.
Remove J4.
Turn on the system and enter the BIOS setup menu.
Close J4 and J5 or attach the optional external battery.
Choose save and exit in the BIOS setup menu.
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10.CABLE INTERFACES
10.1. The Hard Disk Cable 44pin
IDT Terminal for Dual Row (2.00mm grid) and 1.00mm flat cable; 44pins = 40pins signal and 4pins power.
1
2
1 2
39
40
39
40
43 44
43 44
Max. length for the IDE cable is 30cm.
Attention!
Check the pin 1 marker of the cable and the connector before you power-on. Refer to the tech-
nical manual of the installed drives because a wrong cable will immediately destroy the drive
and/or the MICROSPACE MSB900/L board. In this case the warranty is void! Without the tech-
nical manual you may not connect this type of drive.
The 44pin IDE connector on the drives is normally composed of the 44 pins, 2 open pins and 4
test pins, 50 pins in total. Leave the 4 test pins unconnected.
c d
a b
1 3
43
Testpin
44pin IDE Interface with integrated power lines
open pin
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10.2. The COM1/LPT Serial Interface Cable
Terminal for dual row 2mm grid and 1mm flat cable.
Connector X61
Pin
Signal
COM1 9pin D-Sub male
Pin 1
Pin 2
Pin 3
Pin 4
Pin 5
Pin 6
Pin 7
Pin 8
Pin 9
Pin 10
= DCD
= DSR
= RXD
= RTS
= TXD
= CTS
= DTR
= RI
1
6
2
7
3
8
4
9
5
= GND
Pin
Signal
LPT1 25pin D-Sub female
Pin 11
Pin 12
Pin 13
Pin 14
Pin 15
Pin 16
Pin 17
Pin 18
Pin 19
Pin 20
Pin 21
Pin 22
Pin 23
Pin 24
Pin 25
Pin 26
Pin 27
Pin 28
= SELECT
= Paper end
= Busy
13
12
11
10
9
8
7
6
5
17
4
16
3
15
2
14
1
= Acknowledge
= Data 7
= Data 6
= Data 5
= Data 4
= Data 3
= Shift in
= Data 2
= Init
= Data 1
= Error
= Data 0
= Autofeed
= Strobe
= GND
18-25
Attention!
•
•
Do not short circuit these signal lines.
Never connect any pins on the same plug or to any other plug on the MICROSPACE
MSB900/L. The +/-10 Volts will immediately destroy the MICROSPACE core logic. In this
case the warranty is void!
•
Do not overload the output; the maximum output of the current converters is 10mA.
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10.3. The COM2 Serial Interface Cable
DT terminal for dual row 0.1" (2.54mm grid) and 1.27mm flat cable.
Connector X39
Pin
Signal
COM2 9pin D-Sub male
Pin 1
Pin 2
Pin 3
Pin 4
Pin 5
Pin 6
Pin 7
Pin 8
Pin 9
Pin 10
= DCD
= DSR
= RXD
= RTS
= TXD
= CTS
= DTR
= RI
1
6
2
7
3
8
4
9
5
= GND
Attention!
•
•
Do not short circuit these signal lines.
Never connect any pins on the same plug or to any other plug on the MICROSPACE
MSB900/L. The +/-10 Volts will immediately destroy the MICROSPACE core logic. In this
case the warranty is void!
•
Do not overload the output; the maximum output of the current converters is 10mA.
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11. THERMAL SPECIFICATIONS
11.1. Thermal Analysis for Case Integration
The MSB900/L has a unique thermal design. Heat sources are located on the bottom side of the PCB.
Usually this means the board will be mounted upside down with the CPU thermally in contact with a heat
sink. Alternatively, the CPU will be in contact with the system enclosure which then works as a heat sink.
The LX900 CPU is rated with a Total Dissipated Power (TDP) of 3.8W maximum and 1.6W typical @ 600
MHz.
The following picture is a thermal analysis of the bottom side. It was taken after one hour of operating (BIOS
screen) at room temperature. There was no heat sink mounted on the CPU.
fCPU
[MHz]
Uin [V]
TCPUmax [°C]
TCS5536max[°C]
600
12
Pay particular attention when mounting the PC-product in a fully enclosed case/box. The thermal energy will
be stored in the interior of this environment.
If the case has a fan:
•
•
The hot air must be exchanged with cool air from outside using a filtered fan.
The hot air must be cooled with a heat exchanger.
If the case has no fan or opening to exchange hot air:
• The heat sink of the CPU must be mounted directly to a heat sink integrated in the case. The heat will
be conducted directly through the alloy of the heat sink to the outside.
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13.PXE-BOOT AND PXE-SETUP IN THE BIOS
PXE Protocol
PXE is defined on a foundation of industry-standard Internet protocols and services that are widely deployed
in the industry, namely TCP/IP, DHCP, and TFTP. These standardize the form of the interactions between
clients and servers. To ensure that the meaning of the client-server interaction is standardized as well, cer-
tain vendor option fields in DHCP protocol are used, which are allowed by the DHCP standard. The opera-
tions of standard DHCP and/or BOOTP servers (that serve up IP addresses and/or NBPs) will not be dis-
rupted by the use of the extended protocol. Clients and servers that are aware of these extensions will rec-
ognize and use this information, and those that do not recognize the extensions will ignore them.
In brief, the PXE protocol operates as follows. The client initiates the protocol by broadcasting a
DHCPDISCOVER containing an extension that identifies the request as coming from a client that implements
the PXE protocol. Assuming that a DHCP server or a Proxy DHCP server implementing this extended proto-
col is available, after several intermediate steps, the server sends the client a list of appropriate Boot Serv-
ers. The client then discovers a Boot Server of the type selected and receives the name of an executable file
on the chosen Boot Server. The client uses TFTP to download the executable from the Boot Server. Finally,
the client initiates execution of the downloaded image. At this point, the client’s state must meet certain re-
quirements that provide a predictable execution environment for the image. Important aspects of this envi-
ronment include the availability of certain areas of the client’s main memory, and the availability of basic net-
work I/O services.
Deployment of servers
On the server end of the client-server interaction there must be available services that are responsible for
providing redirection of the client to an appropriate Boot Server. These redirection services may be deployed
in two ways:
1. Combined standard DHCP and redirection services.
The DHCP servers that are supplying IP addresses to clients are modified to become, or are replaced
by servers that serve up IP addresses for all clients and redirect PXE-enabled clients to Boot Servers
as requested.
2. Separate standard DHCP and redirection services.
PXE redirection servers (Proxy DHCP servers) are added to the existing network environment. They
respond only to PXE-enabled clients, and provide only redirection to Boot Servers. Each PXE Boot
Server must have one or more executables appropriate to the clients that it serves.
Preboot Execution Environment (PXE) Specification 11
Version 2.1 September 20, 1999
Copyright © 1998, 1999 Intel Corporation. All rights reserved.
This diagram illustrates the relationship between the NBP (the remote boot program) and the PXE APIs.
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BIOS-Setup Screen with the LAN-BOOT (PXE) DISABLE / ENABLE menu:
After ENABLING the LAN-Boot, the Password must be entered.
The Password must be requested with the PXE-licence order form on the following page.
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14.PXE-LICENSE ORDER
The PXE-Function must be licensed before it can be enabled. To order, fill out and sign this form; return to
the fax number below. This form may be printed out separately from the digital copy of this manual on the
Product CD.
Note... One license per form
Each computer system requires an individual, one-time royalty payment for the PXE-license. After
receipt of payment, you will be emailed the password necessary to enable the PXE-Function (see
Customer Information:
Company Name:
Your Name:
Street Address:
ZIP / City:
Email:
Information for the PXE-License:
Currency
(circle one)
Product
USD
MPC20
ꢀ
Euro
ꢀ
MPC21/A
CHF
Price per license
23 USD
17 Euro
28 CHF
For each additional license, please fill out another form.
Date:
Signature:
dd / mm / yyyy
Fax this form to your DIGITAL-LOGIC Sales Manager:
(please write in his/her name)
Fax: +0041 32 681 58 01
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15.INDEX
1
I
10/100 BASE-T Interface
47
I/O Map
IDE interface
36
15
IDE Interface
Incompatibilities
Interfaces
Interrupt Controllers
ISO 9001:2000
49
22
15, 26
27
11
A
Addressing PCI Devices
Application Notes
23
16, 22
B
J
Battery-Lifetime
BIOS CMOS
BIOS History
BIOS, Reload Default Settings
Block Diagram
Boot Time
23
29
24
53
13
25
23
JTAG-Port
Jumper Locations
52
53
K
L
Bus Signals
Keyboard PS/2
26, 47
C
CMOS
29
34
41
27
28
26
LCD TFT Interface
LPC-Port
LPT1
45
51
26
CMOS Setup
Connectors
Controllers
Counters
CPU
M
Manual, How to Use It
Mechanical Dimensions
memory address MAP
Memory Map
Mouse Utility Connector
MSM800-LVDSCON
2
61
35
35
47
21
D
Dimensions & Diagrams
Disclaimer
DRAM
17
5
26
E
O
P
EEPROM Memory for Setup
EMI / EMC
Environmental Protection Statement
External battery assembling
35
16
5
Ordering Codes
16
23
Parallel Port
PCI-104 BUS Interface
power
Power Requirements
Power Supply
Printer
PS/2
PXE-Boot
PXE-License Order
PXE-Setup
50
51
25
25
44
26
47
62
64
62
F
Features, Standard
Features, Unique
Floppy disk
12
12
15
27
Floppy Disk Interface
G
Graphic Modes
40
55
R
H
Radiation
RAM Map
Recycling Information
22
29
6
Hard Disk Cable
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RoHS Commitment
ROM-BIOS
RTC
9
28
28
T
Technical Support
6
58
28
5
Thermal Specifications
Timers
Trademarks
S
Safety Precautions
Schematics
Serial Interface Cable
Serial Port COM1
Serial Port COM2
Serial Ports
Specifications
SQS
Standards
Swiss Association for Quality and Management
Systems
9
59
56, 57
50
48
U
V
UDOC
USB
44, 49
48
27
14
11
8
VGA
VGA Monitor
Video Input
40
52
41
11
11
7
Swiss Quality
Symbols
System Description
25
W
Warranty
Watchdog
6
28
66
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