Texas Instruments Calculator TLV320AIC12KEVMB K User Manual

User's Guide  
SLAU229BOctober 2007Revised August 2008  
TLV320AIC12KEVMB-K and TLV320AIC14KEVMB-K User's  
Guide  
This user's guide describes the characteristics, operation, and use of evaluation modules  
TLV320AIC12KEVMB  
and  
TLV320AIC14KEVMB,  
both  
as  
stand-alone  
and  
as  
kits  
(TLV320AIC12KEVMB-K and TLV320AIC14KEVMB-K). A complete circuit description, schematic diagram  
and bill of materials are also included.  
The following related documents are available through the Texas Instruments web site at www.ti.com.  
EVM-Compatible Device Data Sheets  
Device  
Literature Number  
SLWS115E  
SLES025  
TLV320AIC12K/14K  
TAS1020B  
REG1117-3.3  
TPS767D318  
SN74LVC125A  
SN74LVC1G125  
SN74LVC1G07  
SBVS001  
SLVS209  
SCAS290  
SCES223  
SCES296  
Contents  
1
2
3
4
5
6
7
EVM Overview ............................................................................................................... 3  
Analog Interface.............................................................................................................. 3  
Digital Interface .............................................................................................................. 4  
Power Supplies .............................................................................................................. 6  
EVM Operation............................................................................................................... 6  
Kit Operation ................................................................................................................. 7  
EVM Bill of Materials....................................................................................................... 29  
Appendix A TLV320AIC12KEVMB/14KEVMB Schematic ................................................................. 32  
Appendix B USB-MODEVM Schematic ...................................................................................... 33  
List of Figures  
1
2
3
4
5
6
7
8
TLV320AIC12KEVMB-K/14KEVMB-K Block Diagram.................................................................. 8  
Default Software Screen .................................................................................................. 10  
Information Tab............................................................................................................. 12  
Sounds and Audio Devices Properties .................................................................................. 13  
Preset Configurations...................................................................................................... 14  
Device Controls Tab ....................................................................................................... 15  
Control Register 1 Tab .................................................................................................... 16  
Control Register 2 Tab .................................................................................................... 17  
Control Register 3 Tab .................................................................................................... 17  
Control Register 4 Tab .................................................................................................... 18  
Control Register 5 Tab .................................................................................................... 18  
Control Register 6 Tab .................................................................................................... 19  
9
10  
11  
12  
SMARTDM is a trademark of Texas Instruments.  
I2C is a trademark of Koninklijke Philips Electronics N.V.  
Windows is a registered trademark of Microsoft Corporation.  
LabView is a trademark of National Instruments.  
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EVM Overview  
1
EVM Overview  
1.1 Features  
Full-featured evaluation board for the TLV320AIC12K/14K audio codec  
TLV320AIC12KEVMB-K/14KEVMB-K features USB connectivity for quick and easy setup.  
Intuitive evaluation software  
Easy interfacing to multiple analog sources  
Analog output signals from the TLV320AIC12K/14K are available on top and bottom connectors.  
On-board headphone jack, external microphone jack and electret microphone are included  
Digital control signals can be applied directly to top and bottom connectors.  
1.2 Introduction  
The TLV320AIC12KEVMB-K/14KEVMB-K is a complete evaluation/demonstration kit, which includes a  
USB-based motherboard called the USB-MODEVM Interface board and evaluation software for use with a  
®
personal computer running Microsoft Windows operating systems. Provisions are made for connecting all  
audio inputs and outputs either from the modular connectors or with on-board terminals, a headphone  
jack, and external microphone jack. An on-board electret microphone is also provided.  
2
Analog Interface  
For maximum flexibility, the TLV320AIC12KEVMB/14KEVMB is designed for easy interfacing to multiple  
analog sources. Samtec part numbers SSW-110-22-F-D-VS-K and TSM-110-01-T-DV-P provide a  
convenient 10-pin dual row header/socket combination at J1 and J2. These headers/sockets provide  
access to the analog input and output pins of the device. Consult Samtec at www.samtec.com or call  
1-800-SAMTEC-9 for a variety of mating connector options. Table 1 summarizes the analog interface  
pinout for the TLV320AIC12KEVMB/14KEVMB.  
Table 1. Analog Interface Pinout  
PIN NUMBER  
J1.1  
SIGNAL  
OUTM1  
OUTP1  
OUTMV  
OUTP2  
OUTMV  
OUTMV  
OUTMV  
OUTP2  
AGND  
NC  
DESCRIPTION  
Inverting output of the DAC  
J1.2  
Noninverting output of the DAC  
J1.3  
Programmable virtual ground for the output of OUTP2 and OUTP3  
J1.4  
Analog output number 2 from the 16-driver  
J1.5  
Programmable virtual ground for the output of OUTP2 and OUTP3  
J1.6  
Programmable virtual ground for the output of OUTP2 and OUTP3  
J1.7  
Programmable virtual ground for the output of OUTP2 and OUTP3  
J1.8  
Analog output number 3 from the 16-driver  
Analog Ground  
J1.9  
J1.10  
J1.11  
J1.12  
J1.13  
J1.14  
J1.15  
J1.16  
J1.17  
J1.18  
J1.19  
J1.20  
J2.1  
Not Connected  
AGND  
NC  
Analog Ground  
Not Connected  
AGND  
NC  
Analog Ground  
Not Connected  
NC  
Not Connected  
NC  
Not Connected  
AGND  
NC  
Analog Ground  
Not Connected  
AGND  
NC  
Analog Ground  
Not Connected  
INM2  
Inverting analog input 2  
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Digital Interface  
Table 1. Analog Interface Pinout (continued)  
PIN NUMBER  
SIGNAL  
INP2  
NC  
DESCRIPTION  
Noninverting analog input 2  
Not Connected  
J2.2  
J2.3  
J2.4  
NC  
Not Connected  
J2.5  
NC  
Not Connected  
J2.6  
NC  
Not Connected  
J2.7  
INM1  
INP1  
AGND  
NC  
Inverting analog input 1  
Noninverting analog input 1  
Analog Ground  
J2.8  
J2.9  
J2.10  
J2.11  
J2.12  
J2.13  
J2.14  
J2.15  
J2.16  
J2.17  
J2.18  
J2.19  
J2.20  
Not Connected  
AGND  
NC  
Analog Ground  
Not Connected  
AGND  
NC  
Analog Ground  
Not Connected  
NC  
Not Connected  
NC  
Not Connected  
AGND  
NC  
Analog Ground  
Not Connected  
AGND  
NC  
Analog Ground  
Not Connected  
In addition to the analog headers, the analog inputs and outputs may also be accessed through alternate  
connectors, either screw terminals or audio jacks. The microphone input is also tied to J8 and the headset  
output tied to J11. Table 2 summarizes the screw terminals available on the  
TLV320AIC12KEVMB/14KEVMB.  
Table 2. Alternate Analog Connectors  
DESIGNATOR PIN 1  
PIN 2  
PIN3  
J6  
OUTP1  
OUTP2  
INP2  
OUTM1  
OUTMV  
INM2  
J7  
OUTP3  
J9  
J10  
INM1  
INP1  
3
Digital Interface  
The TLV320AIC12KEVMB/14KEVMB is designed to easily interface with multiple control platforms.  
Samtec part numbers SSW-110-22-F-D-VS-K and TSM-110-01-T-DV-P provide a convenient 10-pin dual  
row header/socket combination at J4 and J5. These headers/sockets provide access to the digital control  
and serial data pins of the device. Consult Samtec at www.samtec.com or call 1-800- SAMTEC-9 for a  
variety of mating connector options. Table 3 summarizes the digital interface pinout for the  
TLV320AIC12KEVMB/14KEVMB.  
Table 3. Digital Interface Pinout  
PIN NUMBER  
J4.1  
SIGNAL  
NC  
DESCRIPTION  
Not Connected  
Not Connected  
Not Connected  
Digital Ground  
Not Connected  
J4.2  
NC  
J4.3  
NC  
J4.4  
DGND  
NC  
J4.5  
4
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Digital Interface  
Table 3. Digital Interface Pinout (continued)  
PIN NUMBER  
SIGNAL  
NC  
DESCRIPTION  
Not Connected  
Not Connected  
J4.6  
J4.7  
NC  
J4.8  
AIC12K/14K RESET  
Reset signal input to AIC12K/14KEVMB  
Not Connected  
J4.9  
NC  
J4.10  
J4.11  
J4.12  
J4.13  
J4.14  
J4.15  
J4.16  
J4.17  
J4.18  
J4.19  
J4.20  
J5.1  
DGND  
Digital Ground  
NC  
Not Connected  
NC  
Not Connected  
NC  
Not Connected  
AIC12K/14K RESET  
Reset signal input to AIC12K/14KEVMB  
Not Connected  
I2C Serial Clock  
NC  
SCL  
NC  
Not Connected  
DGND  
Digital Ground  
NC  
Not Connected  
I2C Serial Data Input/Output  
SDA  
NC  
Not Connected  
J5.2  
NC  
Not Connected  
J5.3  
SCLK  
Audio Serial Data Shift Clock (Input/Output)  
Digital Ground  
J5.4  
DGND  
J5.5  
NC  
Not Connected  
J5.6  
NC  
Not Connected  
J5A.7  
J5B.7  
J5.8  
FSD  
Audio Serial Data Bus Frame Sync Delayed  
Audio Serial Data Bus Frame Sync (Input/Output)  
Not Connected  
FS  
NC  
J5.9  
NC  
Not Connected  
J5.10  
J5.11  
J5.12  
J5.13  
J5.14  
J5.15  
J5.16  
J5.17  
J5.18  
J5.19  
J5.20  
DGND  
Digital Ground  
DIN  
Audio Serial Data Bus Data Input (Input)  
Not Connected  
NC  
DOUT  
Audio Serial Data Bus Data Output (Output)  
Not Connected  
NC  
NC  
Not Connected  
I2C Serial Clock  
SCL  
MCLK  
Master Clock Input  
DGND  
Digital Ground  
AIC12K/14K PWDN  
SDA  
Power down signal input to AIC12K/14KEVMB  
I2C Serial Data Input/Output  
Note that J5 comprises the signals needed for a SMARTDM™ serial digital audio interface and I2C™  
signals. The reset and power down (RESET and PWRDN) signals are routed to J4. I2C™ is actually  
routed from the USB-MODEVM to both connectors; however, the codec and EEPROM are only connected  
to J5.  
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Power Supplies  
4
Power Supplies  
J3 provides connection to the common power bus for the TLV320AIC12KEVMB/14KEVMB. Power is  
supplied on the pins listed in Table 4.  
Table 4. Power Supply Pinout  
SIGNAL  
PIN NUMBER  
J3.2  
SIGNAL  
NC J3.1  
NC  
+5VA J3.3  
J3.4  
NC  
DGND J3.5  
DVDD (1.8V) J3.7  
IOVDD (3.3V) J3.9  
J3.6  
AGND  
NC  
J3.8  
J3.10  
NC  
The TLV320AIC12KEVMB-K/14KEVMB-K motherboard (the USB-MODEVM Interface board) supplies  
power to J3 of the TLV320AIC12KEVMB/14KEVMB. Power for the motherboard is supplied either through  
its USB connection or via terminal blocks on that board.  
4.1 Stand-Alone Operation  
When used as a stand-alone EVM, power can be applied to J3 directly. The user must be sure to  
reference the supplies to the appropriate grounds on that connector.  
CAUTION  
Verify that all power supplies are within the safe operating limits shown on the  
TLV320AIC12K/14K data sheet before applying power to the EVM.  
4.2 USB-MODEVM Interface Power  
The USB-MODEVM Interface board can be powered from several different sources:  
USB  
6VDC–10VDC AC/DC external wall supply (not included)  
Lab power supply  
When powered from the USB connection, JMP6 should have a shunt from pins 1–2 (this is the default  
factory configuration). When powered from 6V-10VDC, either through the J8 terminal block or the J9  
barrel jack, JMP6 should have a shunt installed on pins 2-3. If power is applied in any of these ways,  
onboard regulators generate the required supply voltages and no further power supplies are necessary.  
If lab supplies are used to provide the individual voltages required by the USB-MODEVM Interface, JMP6  
should have no shunt installed. Voltages are then applied to J2 (+5VA), J3 (+5VD), J4 (+1.8VD), and J5  
(+3.3VD). The +1.8VD and +3.3VD can also be generated on the board by the onboard regulators from  
the +5VD supply; to enable this configuration, the switches on SW1 need to be set to enable the  
regulators by placing them in the ON position (lower position, looking at the board with text reading  
right-side up). If +1.8VD and +3.3VD are supplied externally, disable the onboard regulators by placing  
SW1 switches in the OFF position.  
Each power supply voltage has an LED (D1-D7) that lights when the power supplies are active.  
5
EVM Operation  
This section provides information on the analog input and output, digital control, and general operating  
conditions for the TLV320AIC12KEVMB/14KEVMB.  
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Kit Operation  
5.1 Analog Input  
The analog input sources can be applied directly to J2 (top or bottom side). The analog inputs may also  
be accessed through J8 and screw terminals J9 and J10.  
5.2 Analog Output  
The analog outputs from the TLV320AIC12K/14K are available on J1 (top or bottom). They also may be  
accessed through J6 and J7 or J11. Note that the TLV320AIC14K only has one (differential) output which  
can be accessed from J1 or screw terminal J6.  
5.3 Digital Control  
The digital control signals can be applied directly to J4 and J5 (top or bottom side). The modular  
TLV320AIC12KEVMB/14KEVMB can also be connected directly to the USB-MODEVM Interface board  
included as part of the TLV320AIC12EVMB-K/14EVMB-K. See the product folder for this EVM or the  
TLV320AIC12K/14K for a current list of compatible interface and/or accessory boards.  
5.4 Default Jumper Locations  
Table 5 lists the jumpers found on the EVM and their respective factory default conditions. Please note  
that jumper W5 must be set to position 1-2 (IOVDD=3.3V) when using the USB-MODEVM for I2C  
communication.  
Table 5. List of Jumpers  
DEFAULT  
JUMPER  
POSITION  
JUMPER DESCRIPTION  
Sets the codec as master or slave. When set as master (2-3), the codec provides the  
digital audio clock signals. When set as slave (1-2), the codec receives the digital  
audio clock signals.  
W1  
1-2  
Used for correct polarity for FSD. In stand-alone master, FSD must be pulled high  
(2-3), In stand alone slave, FSD must be pulled low (1-2).  
W2  
1-2  
W3  
W4  
Installed  
Installed  
Provides a means of measuring IOVDD current  
Provides a means of measuring DVDD current  
IOVDD select. Can be set to 3.3V (1-2) or 1.8V (2-3) although 3.3V is required when  
using the USB-MODEVM for I2C communication.  
W5  
W6  
W7  
1-2  
Installed  
Installed  
Selects on-board EEPROM as firmware source (required)  
When installed, allows the USB-MODEVM to hardware reset the device under user  
control  
W8  
Installed  
Installed  
Installed  
1-2  
Provides a means of measuring AVDD current  
W9  
Provides a means of measuring DRVDD current  
Coupling for OUTP1. Either directly or via capacitor  
Source for INM1. Set to 1-2 when using external common mode for MICIN  
Disconnects electret microphone (MK1)  
W10  
W11  
W12  
Installed  
6
Kit Operation  
This section provides information on using the TLV320AIC12KEVMB-K/14KEVMB-K, including set up,  
program installation, and program usage.  
6.1 TLV320AIC12KEVMB-K/14KEVMB-K Block Diagram  
A block diagram of the TLV320AIC12KEVMB-K/14KEVMB-K is shown in Figure 1. The evaluation kit  
consists of two circuit boards connected together. The motherboard is designated as the USB-MODEVM  
Interface board, while the daughtercard is the TLV320AIC12KEVMB/14KEVMB described previously in  
this manual.  
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Kit Operation  
TLV320AIC12KEVMB/14KEVMB  
TLV320AIC12K/14K  
EVM Position 1  
Control Interface  
2
I C  
TAS1020B  
USB 8051  
USB  
EVM Position 2  
Microcontroller  
SMARTDM  
Audio Interface  
Figure 1. TLV320AIC12KEVMB-K/14KEVMB-K Block Diagram  
The USB-MODEVM Interface board is intended to be used in USB mode, where control of the installed  
EVM is accomplished using the onboard USB controller device. Provision is made, however, for driving all  
the data buses (I2C, PCM/SMARTDM™) externally. The source of these signals is controlled by SW2 on  
the USB-MODEVM. Refer to Table 6 for details on the switch settings.  
Additionally, SW3 on the USB-MODEVM (IOVDD SELECT) must be set up to 3.3V (SW3 position 1 on,  
SW3 positions 2-8 off).  
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Kit Operation  
Table 6. USB-MODEVM SW2 Settings  
SW-2 SWITCH  
NUMBER  
LABEL  
SWITCH DESCRIPTION  
USB-MODEVM EEPROM I2C Address A0  
ON: A0 = 0  
1
A0  
OFF: A0 = 1  
USB-MODEVM EEPROM I2C Address A1  
ON: A1 = 0  
OFF: A1 = 1  
USB-MODEVM EEPROM I2C Address A2  
ON: A2 = 0  
OFF: A2 = 1  
2
3
4
5
6
7
8
A1  
A2  
Digital Audio Bus Source Selection  
ON: Digital Audio Bus connects to TAS1020  
OFF: Digital Audio Bus connects to USB-MODEVM J14  
USB I2S  
USB MCK  
USB SPI  
USB RST  
EXT MCK  
Digital Audio Bus MCLK Source Selection  
ON: MCLK connects to TAS1020  
OFF: MCLK connects to USB-MODEVM J14  
SPI Bus Source Selection  
ON: SPI Bus connects to TAS1020  
OFF: SPI Bus connects to USB-MODEVM J15  
RST Source Selection  
ON: EVM Reset Signal comes from TAS1020  
OFF: EVM Reset Signal comes from USB-MODEVM J15  
External MCLK Selection  
ON: MCLK Signal is provided from USB-MODEVM J10  
OFF: MCLK Signal comes from either selection of SW2-5  
For use with the TLV320AIC12KEVMB/14KEVMB, SW-2 positions 1, 3, 4, 5 and 6 should be set to ON,  
while SW-2 positions 2, 7 and 8 should be set to OFF.  
6.2 Installation  
Ensure that the TLV320AIC12KEVMB/14KEVMB is installed on the USB-MODEVM Interface board,  
aligning J1, J2, J3, J4, J5 with the corresponding connectors on the USB-MODEVM.  
Place the CD-ROM into your PC CD-ROM drive. Locate the Setup program on the disk, and start it. The  
Setup program will install the TLV320AIC12K/14K Evaluation Tool software on your PC.  
The NI-VISA Runtime installer is embedded to the TLV320AIC12K/14K Evaluation Tool installer. This  
software allows the program to communicate with the USB-MODEVM.  
When the installation completes, click Finish on the TLV320AIC12K/14K Evaluation Tool installer window.  
You may be prompted to restart your computer.  
When installation is complete, attach a USB cable from your PC to the USB-MODEVM Interface board. As  
configured at the factory, the board will be powered from the USB interface, so the power indicator LEDs  
and the 'USB ACTIVE' LED on the USB-MODEVM should light.  
The Found New Hardware Wizard will show up on the screen. Select the 'No, not this time' radio button  
and click 'Next >'. Select 'Install the software automatically (Recommended)' and click 'Next >'. If the  
driver installs correctly the message: 'The wizard has finished installing the software for: AIC12K/14K  
EVM' should appear. Click 'Finish'. The AIC12K/14K EVM driver should now be installed. The device  
should now appear on the Device Manager as 'NI-VISA USB Devices>AIC12K/14K EVM' and as 'Sound,  
video and game controllers>USB Audio Device'.  
Once the device drivers are installed launch the TLV320AIC12K/14K Evaluation Tool software on your  
PC, located on the computer's desktop or in 'Start>Programs>Texas Instruments'.  
The software should automatically find the TLV320AIC12K/14K, and a screen similar to the one in  
Figure 2 should appear.  
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Kit Operation  
Figure 2. Default Software Screen  
6.3 USB-MODEVM Interface Board  
The simple diagram shown in Figure 1 shows only the basic features of the USB-MODEVM Interface  
board. The board is built around a TAS1020B streaming audio USB controller with an 8051-based core.  
The board features two positions for modular EVMs, or one double-wide serial modular EVM may be  
installed.  
Since the TLV320AIC12KEVMB/14KEVMB is a double-wide modular EVM, it is installed with connections  
to both EVM positions, which connects the TLV320AIC12K/14K digital control interface to the I2C port  
realized using the TAS1020B, as well as the TAS1020B digital audio interface.  
In the factory configuration, the board is ready to use with the TLV320AIC12KEVMB/14KEVMB. To view  
all the functions and configuration options available on the USB-MODEVM board, see the USB-MODEVM  
Interface Board schematic in Appendix B.  
6.4 Program Description  
After the TLV320AIC12KEVMBK/14KEVMB-K software installation (described in Section 6.2) is complete,  
evaluation and development with the TLV320AIC12K/14K can begin.  
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Kit Operation  
6.5 Indicators and Main Screen Controls  
Figure 2 illustrates the indicators and the main screen controls near the top of the software screen display,  
and a large tabbed interface below. This section discusses the controls above this tabbed section.  
At the top left of the screen is an Interface indicator. The TLV320AIC12K/14K has an I2C interface. The  
indicator is lit after the program begins. Below the Interface indicator is the Device Connected indicator.  
The TLV320AIC12K/14K Evaluation Tool detects whether or not the TLV320AIC12KEVMB-K/14KEVMB-K  
is present. If the device is unplugged from the USB port or if the device driver is not installed properly, the  
Device Connected indicator will turn red. Otherwise, it will turn green.  
To the right of the Interface indicator is a group box called Firmware. This box indicates the product  
identification of the USB device, so AIC12K/14K EVM should be displayed in the box labeled Located  
On:. The version of the firmware appears in the Version box below this.  
To the right, the next group box contains controls for resetting the TLV320AIC12K/14K. A software reset  
can be done by writing to a register in the TLV320AIC12K/14K; the writing is accomplished by pushing the  
button labeled Software Reset. This button also resets to the default I2C address and refreshes the GUI's  
register table and controls/indicators by reading all registers. The TLV320AIC12K/14K also may be reset  
by toggling a GPIO pin on the USB-MODEVM, which is done by pushing the Hardware Reset button.  
CAUTION  
In order to perform a hardware reset, the RESET jumper (W7) must be installed  
and SW2-7 on the USB-MODEVM must be turned OFF. Failure to do either of  
these steps results in not generating a hardware reset or causing unstable  
operation of the EVM, which may require cycling power to the USB-MODEVM.  
The ADC Overflow and DAC Overflow indicators light when the overflow flags are set in register 1 of the  
TLV320AIC12K/14K. These indicators, as well as the other indicators on this panel, update only when  
writing or reading registers, on resets or by pushing the Refresh button. The Indicator Updates and  
Control Updates buttons enable/disable updates of indicators and controls, respectively.  
6.6 Information Tab  
The information tab (Figure 3) shows information for two TLV320AIC12KEVMB-K/14KEVMB-K hardware  
configurations.  
The USB-MODEVM Audio Interface Configuration allows audio data and I2C communication between  
the host computer and the TLV320AIC12K/14K. SW2 on the USB-MODEVM must be configured as  
shown in the left section of Figure 3.  
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Kit Operation  
Figure 3. Information Tab  
Additionally, the operating system's audio device must be configured as AIC12K/14K EVM (see Figure 4).  
The External Audio Interface Configuration only allows I2C communication between the host computer  
and the TLV320AIC12K/14K. In this configuration, the TLV320AIC12K/14K can transmit and receive audio  
data to/from an external PCM device or DSP. SW2 on the USB-MODEVM must be configured as shown in  
the right section of Figure 3.  
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Kit Operation  
Figure 4. Sounds and Audio Devices Properties  
6.7 Preset Configurations Tab  
The Preset Configurations tab (Figure 5) provides several presets for both the USB-MODEVM Audio  
Interface Configuration and the External Audio Interface Configuration. Also, there is a  
TLV320AIC12K/14K Defaults preset which programs the codec's default register settings. When a radio  
button is selected, a detailed description of the preset will appear on the Preset Configuration  
Description box. To load a preset to the codec, select the desired preset by selecting the corresponding  
radio button and pushing the Load button. At the same time, this will show the preset's executed  
commands on the Command Buffer of the Command Line Interface tab (see Figure 13).  
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Kit Operation  
Figure 5. Preset Configurations  
6.8 Device Controls Tab  
The Device Controls Tab (Figure 6) contains six enumerated Control Registers sub tabs with controls  
for all six registers of the TLV320AIC12K/14K, a register table at the bottom of the tab, several controls  
and an indicator at the right of the tab. The 8-bit I2C Address indicator shows the current I2C address.  
The Device Position control lets the user select a specific codec on a master-slave chain to write to or  
read from. The TLV320AIC12KEVMB-K/14KEVMB-K is configured as a stand-alone slave, so the device  
position must be set to zero. The Program Device button, when pushed, programs the register  
corresponding only to the selected Control Registers sub tab. The register table holds the current  
register values in hexadecimal and binary format. The Register Dump to File button dumps the current  
register values to a spreadsheet. Please refer to the TLV320AIC12K/14K datasheet for further details on  
control register content.  
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Kit Operation  
Figure 6. Device Controls Tab  
6.8.1  
Control Register 1 Tab  
The Transfer Mode control lets the user select between continuous data transfer mode or programming  
mode. In the continuous data transfer mode, only audio data is sent and received through the serial audio  
bus. In the programming mode, control data is sent and received through the serial audio bus. The Data  
Format Mode, if set to 15 bits + 1, allows the codec to run in continuous mode and switch to  
programming mode by setting the LSB of DIN to 1 to send control data. The USB-MODEVM Audio  
Interface Configuration currently supports continuous and 16-bits audio data transfers. The Mic Bias sets  
the voltage of the BIAS pin to 2.35V or 1.35V. The Selected Filter button allows the user to select  
between an FIR filter or an IIR filter for the decimation/interpolation low-pass filter. The Loopback  
switches toggle the analog or digital loopback on and off. The indicator below each switch will light when  
on only if the register data sent by pressing the Program Device button is acknowledged.  
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Figure 7. Control Register 1 Tab  
6.8.2  
Control Register 2 Tab  
The Turbo Mode control (Figure 8) sets the SCLK frequency to 16×FS×(number of devices)×mode or  
MCLK÷P, where number of devices is the number of codecs in cascade (default=1) and the mode is 1 for  
continuous data transfer mode and 2 for programming mode. The Host Port Control can be used to  
assign different functions to the SDA pin or to set SCL and SDA for I2C or S2C. When using the  
USB-MODEVM Audio Interface Configuration the Host Port Control must be set to SDA/SCL are I2C  
interface pins.  
If the host interface is not needed, the two pins of SCL and SDA can be programmed to become  
general-purpose I/Os. If selected to be used as I/O pins, the SDA and SCL pins become output and input  
pins respectively, determined by D1 and D0. SDA can then be set to 1 or 0 by toggling the General  
Purpose Output control.  
The Decimation/Interpolation filter bypass button bypasses the filters selected in register 1. This can be  
useful when using a DSP to apply such filters. The I2C Base Address control allows the user to select the  
first three bits (MSB first) of the device's 7-bit I2C address. The last 4 bits of the address will depend on  
the automatic cascade detection (ACD) feature of SMARTDM™, which sets the device position.  
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Kit Operation  
Figure 8. Control Register 2 Tab  
6.8.3  
Control Register 3 Tab  
The Control Register 3 Tab (Figure 9) allows the user to set the DAC Oversampling Rate (OSR), set  
the Asynchronous Sampling Rate Factor and power down the ADC or DAC with the Power Down  
Controls. The indicator below each power down switch will light when on only if the register data sent by  
pressing the Program Device button is acknowledged. The USB-MODEVM Audio Interface  
Configuration currently allows a fixed sampling rate and a single codec. For an OSR=256 the value of M,  
set in register 4, must be a multiple of 2. Similarly, for an OSR=512 the value of M must be a multiple of 4.  
Figure 9. Control Register 3 Tab  
6.8.4  
Control Register 4 Tab  
The Control Register 4 Tab (Figure 10) provides controls for P, N and M. Furthermore, an FS calculator  
is provided for convenience. The calculator derives FS from the MCLK frequency entered by the user or  
loaded by a preset by using the equation: FS=MCLK÷(16×P×M×N). The PLL Method switch illustrates  
that for coarse sampling, P must be equal to 8. Please note that the FS calculator and the PLL Method  
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are merely for illustration; what is actually written to registers 4A and 4B are the values of P, M and N  
only. The USB-MODEVM Audio Interface Configuration is set up for an MCLK=11.2896 MHz, so P, M  
and N must satisfy the FS equation and the SCLK equation in Turbo Mode for that configuration. If using  
the External Audio Interface Configuration, the divider values can be set to anything specified in the  
TLV320AIC12K/14K datasheet.  
Figure 10. Control Register 4 Tab  
6.8.5  
Control Register 5 Tab  
The Control Register 5 Tab (Figure 11) has several gain controls. The ADC PGA and DAC PGA gain  
knobs range from -42dB to 20dB and each have a MUTE button. The gain knobs and the respective  
MUTE buttons write to register 5A for the ADC PGA and to register 5B for the DAC PGA. Sliders are  
provided for the Input Buffer Gain (0dB to 24dB) and the Digital Sidetone Gain (-21dB to -3dB w/MUTE)  
and they both share register 5C. For convenience, the corresponding register for each control is provided  
to the right of the tab. An 'x' denotes the bits modified by the corresponding control.  
Figure 11. Control Register 5 Tab  
6.8.6  
Control Register 6 Tab  
The Control Register 6 Tab (Figure 12) provides controls to select the analog input and to configure the  
analog outputs. Note that OUTP2/P3 are only available on the TLV320AIC12/12K. The  
TLV320AIC12KEVMB/14KEVMB provides a 1/8" audio jack (J8) to connect a microphone, an on-board  
electret microphone (MK1) and another 1/8" audio jack (J11) to connect a stereo headset. There are four  
options for the Analog Input Select control:  
a. INP/M1 - selects input 1 as the input source (connected to screw terminal J10). To use this mode,  
jumper W11 must be installed on pins 2-3.  
b. MICIN self-biased to 1.35V (single-ended) - In this mode, the device internally self-biases the input to  
1.35V. To use this mode, jumper W11 must be installed on pins 2-3. Jumper W12 must be installed if  
using the on-board electret microphone (MK1), otherwise a microphone can be connected to J8.  
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Please refer to Appendix A for details. Note that the ring contact in J8 is not connected.  
c. MICIN with external common mode (pseudo-differential) - In this mode, the single ended input is  
connected through ac-coupling to MICIN and the bias voltage used to generate the signal is also ac  
coupled to INM1. To use this mode, jumper W11 must be installed on pins 1-2. Jumper W12 must be  
installed if using the on-board electret microphone (MK1), otherwise a microphone can be connected to  
J8. Please refer to Appendix A for details. Note that the ring contact in J8 is not connected.  
d. INP/M2 - selects input 2 as the input source (connected to screw terminal J9).  
The Output Configuration control (TLV320AIC12K only) sets outputs OUTP2/P3 to differential or  
single-ended mode. If set to differential, OUTP2 and OUTP3 share pin OUTMV as the common inverting  
output. If set to single-ended, OUTMV becomes a virtual ground for OUTP2/P3 at the common mode  
voltage of 1.35V. Switch SW2 on the TLV320AIC12KEVMB/14KEVMB can be used to try multiple output  
configurations on J7 and J11. Please see the Functional Description section on the TLV320AIC12K/14K  
datasheet for details.  
The Output Drivers Controls (TLV320AIC12K only) mutes and powers down OUTP2 and/or OUTP3.  
Figure 12. Control Register 6 Tab  
6.9 Command Line Interface Tab  
A simple scripting language controls the TAS1020 on the USB-MODEVM from the LabView™-based PC  
software. The main program controls, described previously, do nothing more than write a script which is  
then handed off to an interpreter that sends the appropriate data to the correct USB endpoint. Because  
this system is script-based, provision is made in this tab for the user to view the scripting commands that  
are created as the controls are manipulated, as well as load and execute other scripts that have been  
written and saved (see Figure 13). This design allows the software to be used as a quick test tool or to  
help provide troubleshooting information in the rare event that the user encounters a problem with this  
EVM.  
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Kit Operation  
Figure 13. Command Line Interface Tab  
A script is loaded into the command buffer, either by operating the controls on the other tabs or by loading  
a script file or preset.  
When executed, either by loading commands from other tabs, loading a preset or pushing the Execute  
Command Buffer button, an array containing executed commands will be displayed on the Command  
History tab. Additionally, the return packet of data which results from the last command executed will be  
displayed in the USB-MODEVM Data Packet tab. The logging function, described below, can be used to  
see the results after every executed command.  
The File menu (Figure 14) provides some options for working with scripts. The first option, Open  
Command File..., loads a command file script into the command buffer. This script can then be executed  
by pressing the Execute Command Buffer button.  
The second option, Save Command File..., saves the contents of the command buffer into a file.  
The third option is Log Script and Results..., which opens a file save dialog box. The user can choose a  
location for a log file to be written using the file save dialog. When the Execute Command Buffer button is  
pressed, the script will run and the script, along with resulting data read back during the script, will be  
saved to the file specified. The log file is a standard text file which can be opened with any text editor, and  
looks much like the source script file, but with the additional information of the result of each script  
command executed.  
The third menu item is a submenu of Recently Opened Files. This list is simply a list of script files that  
have previously been opened, allowing fast access to commonly-used script files. The final menu item is  
Exit, which terminates the TLV320AIC12K/14K Evaluation Tool software.  
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Figure 14. File Menu  
The Options menu (Figure 15) provides two settings suitable for command line interface users and for  
troubleshooting. These settings allows the user to evaluate the device in its most basic form.  
The first option, Hardware Reset on Startup, enables (checked) and disables (unchecked) the hardware  
reset commands every time the GUI starts. If checked, a series of commands will be sent to the TAS1020  
to hardware reset the TLV320AIC12K/14K at startup. If unchecked, nothing will be written to the  
TLV320AIC12K/14K when the GUI starts. This option is useful if the user wants to keep the registers  
intact when closing and re-opening the GUI. Keep in mind that, every time the EVM-K is connected or  
reconnected, a hardware reset must be done in order to write to the codec either by pushing the Hardware  
Reset button on the GUI, pressing the push-button on the EVM or by using the command line interface.  
The second option, Hardware Reset on USB reconnection, enables (checked) and disables (unchecked)  
the hardware reset commands every time the EVM-K is reconnected while using the GUI. If unchecked, a  
manual hardware reset must be done if writing to the codec as stated on the paragraph above.  
Figure 15. Options Menu  
Under the Help menu is an About... menu item (Figure 16) which displays information about the  
TLV320AIC12KEVMB/14KEVMB software.  
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Kit Operation  
Figure 16. Help  
The actual USB protocol used as well as instructions on writing scripts are detailed in the following  
subsections. While it is not necessary to understand or use either the protocol or the scripts directly,  
understanding them may be helpful to some users.  
6.9.1  
USB-MODEVM Protocol  
The USB-MODEVM is defined to be a Vendor-Specific class, and is identified on the PC system as an  
NI-VISA device. Because the TAS1020 has several routines in its ROM which are designed for use with  
HID-class devices, HID-like structures are used, even though the USB-MODEVM is not an HID-class  
device. Data passes from the PC to the TAS1020 using the control endpoint.  
Data is sent in an HIDSETREPORT (see Table 7):  
Table 7. USB Control Endpoint  
HIDSETREPORT Request  
PART  
VALUE  
0x21  
DESCRIPTION  
00100001  
bmRequestType  
bRequest  
wValue  
0x09  
SET_REPORT  
don't care  
0x00  
wIndex  
0x03  
HID interface is index 3  
wLength  
Data  
calculated by host  
Data packet as described  
below  
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The data packet consists of the following bytes, shown in Table 8:  
Table 8. Data Packet Configuration  
BYTE NUMBER  
TYPE  
DESCRIPTION  
Specifies serial interface and operation. The two values are logically OR'd.  
Operation:  
READ  
WRITE  
0x00  
0x10  
Interface:  
0
Interface  
GPIO  
0x08  
0x04  
0x02  
0x01  
0x00  
SPI_16  
I2C_FAST  
I2C_STD  
SPI_8  
1
2
3
I2C Slave Address  
Length  
Slave address of I2C device or MSB of 16-bit reg addr for SPI  
Length of data to write/read (number of bytes)  
Address of register for I2C or 8-bit SPI; LSB of 16-bit address for SPI  
Register address  
Up to 60 data bytes could be written at a time. EP0 maximum length is 64. The  
return packet is limited to 42 bytes, so advise only sending 32 bytes at any one  
time.  
4..64  
Data  
Example usage:  
Write two bytes (45, A0) to device starting at register 1 of an I2C device with address 80:  
[0]  
[1]  
[2]  
[3]  
[4]  
[5]  
0x11  
0x80  
0x02  
0x01  
0x45  
0xA0  
Do the same with a fast mode I2C device:  
[0]  
[1]  
[2]  
[3]  
[4]  
[5]  
0x12  
0x80  
0x02  
0x01  
0x45  
0xA0  
In each case, the TAS1020 will return, in an HID interrupt packet, the following:  
[0]  
status:  
interface byte | status  
REQ_ERROR 0x80  
INTF_ERROR 0x40  
REQ_DONE 0x20  
[1]  
for I2C interfaces, the I2C address as sent  
for SPI interfaces, the read back data from SPI line for transmission of the corresponding byte  
[2]  
[3]  
length as sent  
for I2C interfaces, the reg address as sent  
for SPI interfaces, the read back data from SPI line for transmission of the corresponding byte  
[4..60] echo of data packet sent  
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If the command is sent with no problem, the returning byte [0] should be the same as the sent one  
logically or'd with 0x20 - in the second example above (fast mode), the returning packet should be:  
[0]  
[1]  
[2]  
[3]  
[4]  
[5]  
0x32  
0x80  
0x02  
0x01  
0x45  
0xA0  
If for some reason the interface fails (for example, the I2C device does not acknowledge), it would come  
back as:  
[0]  
[1]  
[2]  
[3]  
[4]  
[5]  
0x52 --> interface | INTF_ERROR  
0x80  
0x02  
0x01  
0x45  
0xA0  
If the request is malformed, that is, the interface byte (byte [0]) takes on a value which is not described  
above, the return packet would be:  
[0]  
[1]  
[2]  
[3]  
[4]  
[5]  
0x93 --> 0x13 was sent, which is not valid, so 0x93 is returned  
0x80  
0x02  
0x01  
0x45  
0xA0  
Examples above used writes. Reading is similar:  
Read two bytes from device starting at register 1 of an I2C device with address A0:  
[0]  
[1]  
[2]  
[3]  
0x01  
0x80  
0x02  
0x01  
The return packet should be  
[0]  
[1]  
[2]  
[3]  
[4]  
[5]  
0x21  
0x80  
0x02  
0x01  
0x45  
0xA0  
assuming that the values we wrote above starting at Register 5 were actually written to the device.  
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Kit Operation  
6.9.1.1  
GPIO Capability  
The USB-MODEVM has seven GPIO lines. The user can access them by specifying the interface to be  
0x08, and then using the standard format for packets—but addresses are unnecessary. The GPIO lines  
are mapped into one byte (see Table 9):  
Table 9. GPIO Pin Assignments  
7
x
6
5
4
3
2
1
0
P3.5  
P3.4  
P3.3  
P1.3  
P1.2  
P1.1  
P1.0  
Example: write P3.5 to a 0, all others to 1:  
[0]  
[1]  
[2]  
[3]  
[4]  
0x18 --> write, GPIO  
0x00 --> this value is ignored  
0x01 --> length - ALWAYS a 1  
0x00 --> this value is ignored  
0x3F --> 00111111  
The user may also read back from the GPIO to see the state of the pins. Suppose the port pins were  
written as in the previous example.  
Example: read the GPIO  
[0]  
[1]  
[2]  
[3]  
0x08 --> read, GPIO  
0x00 --> this value is ignored  
0x01 --> length - ALWAYS a 1  
0x00 --> this value is ignored  
The return packet should be:  
[0]  
[1]  
[2]  
[3]  
[4]  
0x28  
0x00  
0x01  
0x00  
0x3F  
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Kit Operation  
6.9.2  
Writing Scripts  
A script is simply a text file that contains data to send to the serial control buses. The scripting language is  
quite simple, as is the parser for the language. Therefore, the program is not very forgiving about mistakes  
made in the source script file, but the formatting of the file is simple. Consequently, mistakes should be  
rare.  
Each line in a script file is one command. There is no provision for extending lines beyond one line. A line  
is terminated by a carriage return.  
The first character of a line is the command. Commands are:  
i = = = = = = = Set interface bus to use  
r = = = = = = = Read from the serial control bus  
w = = = = = = = Write to the serial control bus  
# = = = = = = = Comment  
b = = = = = = = Break  
d = = = = = = = Delay  
The first command, i, sets the interface to use for the commands to follow. This command must be  
followed by one of the following parameters:  
i2cstd  
i2cfast  
spi8  
Standard mode I2C Bus  
Fast mode I2C bus  
SPI bus with 8-bit register addressing  
SPI bus with 16-bit register addressing  
Use the USB-MODEVM GPIO capability  
spi16  
gpio  
For example, if a fast mode I2C bus is to be used, the script would begin with:  
i i2cfast  
No data follows the break command. Anything following a comment command is ignored by the parser,  
provided that it is on the same line. The delay command allows the user to specify a time, in milliseconds,  
that the script will pause before proceeding.  
Note: UNLIKE ALL OTHER NUMBERS USED IN THE SCRIPT COMMANDS, THE DELAY TIME  
IS ENTERED IN A DECIMAL FORMAT. Also, note that because of latency in the USB bus  
as well as the time it takes the processor on the USB-MODEVM to handle requests, the  
delay time may not be precise.  
A series of byte values follows either a read or write command. Each byte value is expressed in  
hexadecimal, and each byte must be separated by a space. Commands are interpreted and sent to the  
TAS1020 by the program using the protocol described in Section 6.9.1.  
The first byte following a read or write command is the I2C slave address of the device (if I2C is used) or  
the first data byte to write (if SPI is used—note that SPI interfaces are not standardized on protocols, so  
the meaning of this byte will vary with the device being addressed on the SPI bus). The second byte is the  
starting register address that data will be written to (again, with I2C; SPI varies—see Section 6.9.1 for  
additional information about what variations may be necessary for a particular SPI mode). Following these  
two bytes are data, if writing; if reading, the third byte value is the number of bytes to read, (expressed in  
hexadecimal).  
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For example, to write the values 0x45 0xA0 to an I2C device with a slave address of 0x80, starting at a  
register address of 0x01, one would write:  
#example script  
i i2cfast  
w 80 01 45 A0  
r 80 01 02  
This script begins with a comment, specifies that a fast I2C bus will be used, then writes 0x45 0xA0 to the  
I2C slave device at address 0x80, writing the values into registers 0x01 and 0x02. The script then reads  
back two bytes from the same device starting at register address 0x01. Note that the slave device value  
does not change. It is not necessary to set the R/W bit for I2C devices in the script; the read or write  
commands will do that for the user.  
Any text editor may be used to write these scripts; Jedit is an editor that is highly recommended for  
general usage. For more information, go to: http://www.jedit.org.  
Once the script is written, it can be used in the command window by running the program, and then  
selecting Open Command File... from the File menu. Locate the script and open it. The script will then be  
displayed in the command buffer. The user may also edit the script once it is in the buffer and save it as  
specified in Section 6.9.  
Once the script is in the command buffer, it may be executed by pressing the Execute Command Buffer  
button. If the user has placed breakpoints in the script, it will execute to that point, and a dialog box will  
show up with a continue button to continue executing the script.  
Please refer to sections 3.1 (Power Down and Reset) and section 3.2 (AIC12 Control Register  
Programming Procedures) on the TLV320AIC12/13/14/15 Codec Operating In Stand-Alone Slave Mode  
application note for important details on programming the codec.  
Special care must be taken when writing subregisters (4A-4B and 5A-5D).  
Example: w 80 01 45 A0 01 20 B8 00  
The previous command writes registers 1, 2, 3, 4A, 5C and 6. It will not increment from 3 to 4A and  
then to 4B. The subregister to be written will depend on the data.  
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Kit Operation  
Here is an example of a script:  
# TLV320AIC12K/14K  
# This configuration allows playing audio to the DAC from any media player on  
# a computer and recording from the ADC on audio recording software. Pin  
# MICIN is configured as the input. The input can be heard via OUTP1/M1 and  
# OUTP2/P3 due to the digital sidetone. Audio files played on the computer  
# can also be heard via those outputs.  
#
# Hardware reset codec using TAS1020B's GPIO pin P3.5  
i gpio  
w 00 00 3F  
# Delay has to be at least 6 MCLK cycles ~ 540ns  
d 1  
w 00 00 7F  
#
# I2C interface  
i i2cstd  
#
# reg 03 - Software reset  
w 80 03 21  
#
# reg 01 - Clear ADC and DAC overflow flags.  
r 80 01 01  
#
# reg 02 - Turbo Mode  
w 80 01 A0  
#
# reg 04 - Set clock divider values (4A and 4B). P=8, M=1, N=4.  
w 80 04 20  
w 80 04 81  
#
# reg 05 - 5B -> DAC PGA=–32dB, 5C -> Input Buffer Gain=24dB,  
# Digital Sidetone Gain=–3dB. Defaults used for 5A and 5D.  
w 80 05 4A  
w 80 05 83  
#
# reg 06 - MICIN with external common mode, OUTP2/P3 drivers on.  
w 80 06 1C  
#
# reg 01 - Continuous data transfer mode, 16 bits.  
w 80 01 41  
28  
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EVM Bill of Materials  
7
EVM Bill of Materials  
Table 10 and Table 11 contain a complete bill of materials for the modular  
TLV320AIC12KEVMB/14KEVMB and the USB-MODEVM Interface Board.  
Table 10. TLV320AIC12KEVMB/14KEVMB Bill of Materials  
REFERENCE DESIGNATOR  
DESCRIPTION  
MANUFACTURER  
MFG PART NUMBER  
R7, R8  
01/10W 5% chip resistor  
2.7k1/10W 5% chip resistor  
10k1/10W 5% chip resistor  
Panasonic (or equivalent)  
Panasonic (or equivalent)  
Panasonic (or equivalent)  
TDK (or equivalent)  
ERJ-3GEY0R00V  
ERJ-3GEYJ272V  
ERJ-3GEYJ103V  
C1005X5R0J104K  
R5  
R1-R4, R6  
C8-C10, C19  
0.1µF 6.3V ceramic chip  
capacitor, ±10%, X5R  
C1–C6, C11, C12, C20, C21  
0.1µF 25V ceramic chip  
TDK (or equivalent)  
Panasonic (or equivalent)  
TDK (or equivalent)  
Murata (or equivalent)  
Texas Instruments  
C1608X7R1E104K  
ECJ-1VB0J106M  
capacitor, ±5%, X7R  
C13-C15, C18  
C16, C17  
C22, C23  
U1  
10µF 6.3V ceramic chip  
capacitor, ±10%, X5R  
10µF 16V ceramic chip  
capacitor, ±20%, X5R  
C3216X5R0J106M  
GRM32ER61A476KE20L  
47µF 10V ceramic chip  
capacitor, ±10%, X5R  
Audio codec  
TLV320AIC12KIDBT  
TLV320AIC14KIDBT  
U2  
3.3V LDO voltage regulator  
64K I2C EEPROM  
Texas Instruments  
MicroChip  
REG1117-3.3  
24LC64-I/SN  
SN74AUP1G74  
ED555/2DS  
U3  
U4  
Pos edge triggered D Flip-flop Texas Instruments  
J6, J9, J10  
Screw terminal block,  
2-position  
On Shore Technology  
J7  
Screw terminal block,  
3-position  
On Shore Technology  
ED555/3DS  
J8, J11  
3.5mm audio jack, T-R-S, SMD CUI Inc.  
SJ1-3515-SMT  
J1A, J2A, J4A, J5A  
20-pin SMT plug  
20-pin SMT socket  
10-pin SMT plug  
10-pin SMT socket  
Samtec  
Samtec  
Samtec  
Samtec  
TSM-110-01-L-DV-P  
SSW-110-22-F-D-VS-K  
TSM-105-01-L-DV-P  
SSW-105-22-F-D-VS-K  
6488702  
J1B, J2B, J4B, J5B  
J3A  
J3B  
N/A  
TLV320AIC12KEVMB/14KEVM Texas Instruments  
B PWB  
W3, W4, W6-W10, W12  
W1, W2, W5, W11  
MK1  
2-position jumper, 0.1" spacing Samtec  
3-position jumper, 0.1" spacing Samtec  
TSW-102-07-L-S  
TSW-103-07-L-S  
MD9745APZ-F  
Omnidirectional microphone  
cartridge  
Knowles Acoustics  
Panasonic - ECG  
E-Switch  
SW1  
Switch LT TOUCH 6X3.5  
240GF SMD  
EVQ-PJU04K  
SW2  
4PDT right angle switch  
EG4208  
5000  
TP13–TP16, TP27  
TP11, TP12  
PC Test Point - Miniature (red) Keystone Electronics  
PC Test Point - Miniature  
(black)  
Keystone Electronics  
Keystone Electronics  
Samtec  
5001  
TP1-TP10, TP17-TP26  
N/A  
PC Test Point - Miniature  
(white)  
5002  
Header shorting block  
SNT-100-BK-T  
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EVM Bill of Materials  
Table 11. USB-MODEVM Bill of Materials  
Designators  
Description  
101/10W 5% chip resistor  
Manufacturer  
Mfg. Part Number  
ERJ-3GEYJ100V  
ERJ-3EKF27R4V  
ERJ-14NF75R0U  
ERJ-3GEYJ221V  
ERJ-3GEYJ391V  
ERJ-3EKF6490V  
ERJ-3GEYJ152V  
R4  
Panasonic  
R10, R11  
R20  
27.41/16W 1% chip resistor Panasonic  
751/4W 1% chip resistor  
2201/10W 5% chip resistor  
3901/10W 5% chip resistor  
6491/16W 1% chip resistor  
Panasonic  
Panasonic  
Panasonic  
Panasonic  
Panasonic  
R19  
R14, R21, R22  
R13  
R9  
1.5k1/10W 5%  
chip resistor  
R1, R2, R3, R5, R6, R7, R8  
2.7k1/10W 5%  
Panasonic  
Panasonic  
Panasonic  
Panasonic  
CTS Corporation  
TDK  
ERJ-3GEYJ272V  
ERJ-3EKF3091V  
ERJ-3GEYJ103V  
ERJ-3GEYJ104V  
742C163103JTR  
C1608C0G1H330J  
C1608C0G1H470J  
C1608C0G1H101J  
C1608C0G1H102J  
C1608X7R1C104K  
C1608X5R1C334K  
C1608X5R0J105K  
C3216X5R0J106K  
chip resistor  
R12  
3.09k1/16W 1%  
chip resistor  
R15, R16  
R17, R18  
RA1  
10k1/10W 5%  
chip resistor  
100k1/10W 5%  
chip resistor  
10k1/8W Octal isolated  
resistor array  
C18, C19  
C13, C14  
C20  
33pF 50V ceramic  
chip capacitor, ±5%, NPO  
47pF 50V ceramic  
chip capacitor, ±5%, NPO  
TDK  
100pF 50V ceramic  
chip capacitor, ±5%, NPO  
TDK  
C21  
1000pF 50V ceramic  
chip capacitor, ±5%, NPO  
TDK  
C15  
0.1µF 16V ceramic  
chip capacitor, ±10%,X7R  
TDK  
C16, C17  
0.33µF 16V ceramic  
chip capacitor, ±20%,Y5V  
TDK  
C9, C10, C11, C12, C22, C23, 1µF 6.3V ceramic  
C24, C25, C26, C27, C28  
TDK  
chip capacitor, ±10%, X5R  
C1, C2, C3, C4, C5, C6, C7,  
C8  
10µF 6.3V ceramic  
chip capacitor, ±10%, X5R  
TDK  
D1  
50V, 1A, Diode MELF SMD  
Yellow Light Emitting Diode  
Green Light Emitting Diode  
Red Light Emitting Diode  
N-Channel MOSFET  
Micro Commercial Components DL4001  
D2  
Lumex  
SML-LX0603YW-TR  
SML-LX0603GW-TR  
D3, D4, D6, D7  
Lumex  
D5  
Lumex  
SML-LX0603IW-TR  
ZXMN6A07F  
Q1, Q2  
X1  
Zetex  
6MHz Crystal SMD  
Epson  
MA-505 6.000M-C0  
TAS1020BPFB  
REG1117-5  
U8  
USB streaming controller  
5V LDO regulator  
Texas Instruments  
Texas Instruments  
Texas Instruments  
U2  
U9  
3.3V/1.8V dual output  
LDO regulator  
TPS767D318PWP  
U3, U4  
Quad, 3-state buffers  
Texas Instruments  
Texas Instruments  
SN74LVC125APW  
U5, U6, U7  
Single IC buffer driver with  
open drain o/p  
SN74LVC1G07DBVR  
U10  
U1  
Single 3-state buffer  
Texas Instruments  
Microchip  
SN74LVC1G125DBVR  
24LC64I/SN  
64K 2-Wire serial EEPROM  
I2C  
USB-MODEVM PCB  
Texas Instruments  
6463995  
30  
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EVM Bill of Materials  
Table 11. USB-MODEVM Bill of Materials (continued)  
Designators  
Description  
Manufacturer  
Mfg. Part Number  
TP1, TP2, TP3, TP4, TP5,  
TP6, TP9, TP10, TP11  
Miniature test point terminal  
Keystone Electronics  
5000  
TP7, TP8  
Multipurpose test point  
terminal  
Keystone Electronics  
Mill-Max  
5011  
J7  
USB type B slave connector  
thru-hole  
897-30-004-90-000000  
J1, J2, J3, J4, J5, J8  
2-position terminal block  
2.5mm power connector  
On Shore Technology  
CUI Stack  
ED555/2DS  
PJ-102B  
J9  
J10  
BNC connector, female,  
PC mount  
AMP/Tyco  
414305-1  
J11A, J12A, J21A, J22A  
J11B, J12B, J21B, J22B  
J13A, J23A  
20-pin SMT plug  
20-pin SMT socket  
10-pin SMT plug  
10-pin SMT socket  
Samtec  
Samtec  
Samtec  
Samtec  
TSM-110-01-L-DV-P  
SSW-110-22-F-D-VS-K  
TSM-105-01-L-DV-P  
SSW-105-22-F-D-VS-K  
TSW-102-07-L-D  
J13B, J23B  
J6  
4-pin double row header (2x2) Samtec  
0.1"  
J14, J15  
JMP1–JMP4  
JMP8–JMP14  
JMP5, JMP6  
JMP7  
12-pin double row header (2x6) Samtec  
0.1"  
TSW-106-07-L-D  
TSW-102-07-L-S  
TSW-102-07-L-S  
TSW-103-07-L-S  
TSW-103-07-L-D  
TDA02H0SK1  
2-position jumper,  
0.1" spacing  
Samtec  
2-position jumper,  
0.1" spacing  
Samtec  
3-position jumper,  
0.1" spacing  
Samtec  
3-position dual row jumper,  
0.1" spacing  
Samtec  
SW1  
SMT, half-pitch  
2-position switch  
C&K Division, ITT  
C&K Division, ITT  
Samtec  
SW2  
SMT, half-pitch  
8-position switch  
TDA08H0SK1  
Jumper plug  
SNT-100-BK-T  
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Appendix A  
Appendix A TLV320AIC12KEVMB/14KEVMB Schematic  
The schematic diagram is provided as a reference.  
32  
TLV320AIC12KEVMB/14KEVMB Schematic  
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1
2
3
4
5
6
REVISION HISTORY  
ENGINEERING CHANGE NUMBER  
REV  
APPROVED  
J1A/J1B  
J4A/J4B  
1
3
5
7
9
11  
13  
15  
17  
19  
2
4
6
8
10  
12  
14  
16  
18  
20  
1
3
5
7
9
11  
13  
15  
17  
19  
2
4
6
8
10  
12  
14  
16  
18  
20  
OUTM1  
OUTMV  
A0(-)  
A1(-)  
A2(-)  
A3(-)  
AGND  
AGND  
AGND  
VCOM  
AGND  
AGND  
A0(+)  
A1(+)  
A2(+)  
A3(+)  
A4  
A5  
A6  
A7  
REF-  
REF+  
OUTP1  
OUTP2  
OUTMV  
OUTP3  
CNTL  
CLKX  
CLKR  
FSX  
FSR  
DX  
DR  
INT  
TOUT  
GPIO5  
GPIO0  
DGND  
GPIO1  
GPIO2  
DGND  
GPIO3  
GPIO4  
SCL  
W7  
1
2
D
C
B
A
D
C
B
A
RESET  
DGND  
SDA  
PWDN  
DAUGHTER-SERIAL  
DAUGHTER-ANALOG  
J1A (TOP) = SAMTEC - P/N: TSM-110-01-L-DV-P  
J1B (BOTTOM) = SAMTEC - P/N: SSW-110-22-F-D-V  
J4A (TOP) = SAMTEC - P/N: TSM-110-01-L-DV-P  
J4B (BOTTOM) = SAMTEC - P/N: SSW-110-22-F-D-V  
J5A  
1
3
5
7
9
11  
13  
15  
17  
19  
2
4
6
8
10  
12  
14  
16  
18  
20  
CNTL  
CLKX  
CLKR  
FSX  
FSR  
DX  
GPIO0  
DGND  
GPIO1  
GPIO2  
DGND  
GPIO3  
GPIO4  
SCL  
SCLK  
FSD  
DIN  
DOUT  
DIN  
DOUT  
DR  
INT  
MCLK  
MCLK  
TOUT  
GPIO5  
DGND  
SDA  
DAUGHTER-SERIAL  
J2A/J2B  
J5B  
1
3
5
7
9
11  
13  
15  
17  
19  
2
4
6
8
10  
12  
14  
16  
18  
20  
1
3
5
7
9
11  
13  
15  
17  
19  
2
4
6
8
10  
12  
14  
16  
18  
20  
INM2  
INM1  
A0(-)  
A1(-)  
A2(-)  
A3(-)  
AGND  
AGND  
AGND  
VCOM  
AGND  
AGND  
A0(+)  
A1(+)  
A2(+)  
A3(+)  
A4  
A5  
A6  
A7  
REF-  
REF+  
INP2  
INP1  
CNTL  
CLKX  
CLKR  
FSX  
FSR  
DX  
GPIO0  
DGND  
GPIO1  
GPIO2  
DGND  
GPIO3  
GPIO4  
SCL  
FS  
J3A/J3B  
+5VA  
1
3
5
7
9
2
4
6
8
+VA  
+5VA  
DGND  
+1.8VD  
+3.3VD  
-VA  
-5VA  
AGND  
VD1  
DR  
INT  
SCL  
SDA  
SCL  
SDA  
DGND  
+1.8VD  
AGND  
TOUT  
GPIO5  
DGND  
SDA  
10  
+5VD  
DAUGHTER-POWER  
DAUGHTER-SERIAL  
DAUGHTER-ANALOG  
+3.3VD  
J2A (TOP) = SAMTEC - P/N: TSM-110-01-L-DV-P  
J2B (BOTTOM) = SAMTEC - P/N: SSW-110-22-F-D-VS-K  
J5A (TOP) = SAMTEC - P/N: TSM-110-01-L-DV-P  
J5B (BOTTOM) = SAMTEC - P/N: SSW-110-22-F-D-V  
J3A (TOP) = SAMTEC - P/N: TSM-105-01-L-DV-P  
J3B (BOTTOM) = SAMTEC - P/N: SSW-105-22-F-D-V  
ti  
DATA ACQUISITION PRODUCTS  
HIGH-PERFORMANCE ANALOG DIVISION  
SEMICONDUCTOR GROUP  
12500 TI Boulevard, Dallas, TX 75243 USA  
TITLE  
ENGINEER Jorge Arbona  
DRAWN BY Steve Leggio  
DOCUMENT CONTROL NO.N/A  
TLV320AIC12K_14K_DBT_EVMB  
SIZE B  
DATE 19-Aug-2008  
REV  
B
SHEET  
2
OF  
3
FILE Daughtercard_Interface.Sch  
1
2
3
4
5
6
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1
2
3
4
5
6
REVISION HISTORY  
ENGINEERING CHANGE NUMBER  
REV  
APPROVED  
TP1  
W10  
OUTP1  
1
2
OUTP1  
OUTM1  
IOVDD  
R2  
J6  
OUTP1  
OUTM1  
1
2
10K  
TP2  
OUTM1  
C5  
0.1uF  
TP17  
PWDN  
PWDN  
PWDN  
D
C
B
A
D
C
B
A
IOVDD  
R3  
OUT1  
J7  
OUTP2  
OUTMV  
OUTP3  
1
2
3
+3.3VA  
10K  
TP28  
DRVSS  
W1  
3
2
1
M/S  
TP11  
AGND  
C18  
R7  
0
W9  
JMP  
10uF  
C19  
OUT2  
J11  
TP18  
DIN  
TP12  
DGND  
DIN  
DIN  
DOUT  
FS  
R8  
0
SW2  
1
3
TP19  
DOUT  
2
4
5
3
1
2
5
0.1uF  
TP3  
OUTP2  
DOUT  
FS  
C22  
C23  
4
6
47uF  
47uF  
OUTP2  
OUTP2  
TP20  
FS  
TP4  
OUTMV  
SJ1-3515-SMT  
7
9
OUTMV  
OUTP3  
OUTMV  
OUTP3  
TP21  
FSD  
8
HEADSET OUTPUT  
FSD  
TP5  
OUTP3  
FSD  
10  
12  
W3  
1
IOVDD  
IOVDD  
R4  
11  
IOVDD1  
2
4PDT_ESW_EG4208  
C9  
0.1uF  
C14  
10uF  
10K  
W2  
3
2
1
DGND  
TP22  
SCLK  
JMP  
TP6  
MICIN  
C1  
R1  
SCLK  
SDA  
SCL  
J8  
2
4
5
3
1
MICIN  
U1  
TLV320AIC12K_DBT  
TP23  
SDA  
0.1uF  
10K  
MICBIAS  
C10  
0.1uF  
C15  
10uF  
1
W12  
W4  
+1.8VD  
TP24  
SCL  
SJ1-3515-SMT  
EXT MIC IN  
+1.8V_D  
2
MK1  
U3  
+3.3VD  
8
4
MD9745APZ-F  
MICROPHONE  
+3.3VA W8  
C13  
10uF 0.1uF  
C8  
VCC  
VSS  
R5  
2.7K  
1
2
C12  
0.1uF  
24LC64I/SN  
W6  
1
2
TP7  
INP2  
J9  
TP25  
MCLK  
INP2  
C2  
C3  
1
INP2  
INM2  
MCLK  
MCLK  
TP8  
INM2  
0.1uF  
0.1uF  
2
+3.3VD  
INM2  
+3.3VD  
C20  
IN2  
U4  
R6  
10K  
8
1
2
3
4
VCC  
PRE  
CLR  
Q
CLK  
D
Q
0.1uF  
7
6
5
RESET  
RESET  
W11  
JMP  
TP9  
INM1  
1
2
3
TP26  
/RESET  
C6  
INM1  
GND  
C21  
0.1uF  
SW1  
RESET  
0.1uF  
SN74AUP1G74  
J10  
INM1  
INP1  
1
TP10  
INP1  
IOVDD  
C4  
0.1uF  
TP27  
2
INP1  
IOVDD  
IN1  
+1.8VD  
+3.3VD  
TP15  
+1.8VD  
TP16  
ti  
U2  
+3.3VD  
+5VA  
REG1117-3.3  
+3.3VA  
DATA ACQUISITION PRODUCTS  
TP13  
+5VA  
3
2
TP14  
+3.3VA  
HIGH-PERFORMANCE ANALOG DIVISION  
SEMICONDUCTOR GROUP  
VIN  
VOUT  
C16  
10uF  
C11  
0.1uF  
C17  
10uF  
W5  
IOVDD  
12500 TI Boulevard, Dallas, TX 75243 USA  
TITLE  
ENGINEER Jorge Arbona  
DRAWN BY Steve Leggio  
DOCUMENT CONTROL NO.N/A  
TLV320AIC12K_14K_DBT_EVMB  
SIZE B  
DATE 19-Aug-2008  
REV  
B
SHEET  
3
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Appendix B  
Appendix B USB-MODEVM Schematic  
The schematic diagram is provided as a reference.  
SLAU229BOctober 2007Revised August 2008  
USB-MODEVM Schematic  
33  
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REVISION HISTORY  
ENGINEERING CHANGE NUMBER  
REV  
APPROVED  
D
C
B
A
D
C
B
A
USB Interface  
USB Interface  
Daughtercard Interface  
Daughtercard Interface  
MCLK  
BCLK  
LRCLK  
I2SDIN  
I2SDOUT  
MISO  
MOSI  
SS  
SCLK  
RESET  
INT  
PWR_DWN  
P3.3  
MCLK  
BCLK  
LRCLK  
I2SDIN  
I2SDOUT  
MISO  
MOSI  
SS  
SCLK  
RESET  
INT  
PWR_DWN  
P3.3  
P3.4  
P3.5  
P1.0  
SDA  
SCL  
P1.1  
P1.2  
P1.3  
P3.4  
P3.5  
P1.0  
SDA  
SCL  
P1.1  
P1.2  
P1.3  
ti  
DATA ACQUISITION PRODUCTS  
HIGH-PERFORMANCE ANALOG DIVISION  
SEMICONDUCTOR GROUP  
6730 SOUTH TUCSON BLVD., TUCSON, AZ 85706 USA  
TITLE  
ENGINEER FRYE D. ZERKETTS  
DRAWN BY I. C. SPOTTS  
untitled  
DOCUMENT CONTROL NO.1234567  
SIZE B  
DATE dd MMM yyyy  
REV  
A
SHEET  
1
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REVISION HISTORY  
ENGINEERING CHANGE NUMBER  
REV  
APPROVED  
IOVDD  
+3.3VD  
+3.3VD  
U15  
C32  
C33  
C41  
0.1uF  
D
C
B
A
0.1uF  
U12  
0.1uF  
D
C
B
A
2
4
+3.3VD  
IOVDD  
+3.3VD  
IOVDD  
+3.3VD  
C28  
C34  
C22  
IOVDD  
+3.3VD  
+3.3VD  
R5  
SN74LVC1G126DBV  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
VCCA VCCB  
C30  
USB MCK  
J10  
DIR1  
DIR2  
1A1  
OE1  
OE2  
1B1  
1B2  
2B1  
2B2  
GND  
U10  
2
0.1uF  
0.1uF  
0.1uF  
4
RA1  
10K  
EXT MCK  
EXT MCLK  
R23  
200k  
U3  
1
2
3
4
5
6
R3  
0.1uF  
TP9  
16  
15  
14  
13  
12  
11  
10  
9
2.7K  
2.7K  
VCCB VCCA  
SDA  
1A2  
USB I2S  
JMP8  
OE1  
OE2  
1B1  
1B2  
2B1  
2B2  
GND  
DIR1  
DIR2  
1A1  
1A2  
2A1  
C31  
SW2  
U11  
2A1  
JPR-2X1  
SN74LVC1G125DBV  
2
7
8
5
6
2A2  
A0  
A1  
A2  
16  
15  
14  
1
2
3
4
5
6
7
8
VREF1 VREF2  
EN  
J6  
GND  
0.1uF  
R20  
75  
4
3
1
MCLK  
I2SDIN  
BCLK  
SN74AVC4T245PW  
2
4
1
3
SDA1  
SCL1  
GND  
SDA2  
SCL2  
7
8
USB I2S 13  
USB MCK 12  
USB SPI 11  
USB RST 10  
2A2  
GND  
EXTERNAL I2C  
SN74AVC4T245PW  
C35 C23  
PCA9306DCT  
+3.3VD  
LRCLK  
TP10  
U1  
+3.3VD  
IOVDD  
EXT MCK  
9
J14  
I2SDOUT  
SCL  
1
3
5
7
9
2
4
6
8
10  
SW DIP-8  
8
0.1uF  
0.1uF  
U5  
VCC  
C9  
6
4
5
1
3
2
VCCB VCCA  
0.1uF  
B
A
4
X1  
IOVDD  
C18  
33pF  
C19  
VSS  
DIR  
GND  
11 12  
SN74AVC1T45DBV  
EXTERNAL AUDIO DATA  
+3.3VD  
33pF  
C42  
0.1uF  
24LC64I/SN  
MA-505 6.000M-C0  
6.00 MHZ  
PWR_DWN  
IOVDD  
C26  
U8  
TAS1020BPFB  
U7  
USB RST  
0.1uF  
MISO  
MOSI  
SS  
6
4
1
3
2
VCCB VCCA  
C20  
100pF  
J7 USB SLAVE CONN  
46  
47  
48  
1
31  
30  
29  
27  
26  
25  
24  
23  
8
B
DIR  
A
GND  
XTALO  
XTALI  
PLLFILI  
PLLFILO  
MCLKI  
PUR  
DP  
DM  
DVSS  
DVSS  
DVSS  
AVSS  
P1.7  
P1.6  
P1.5  
P1.4  
P1.3  
P1.2  
P1.1  
P1.0  
DVDD  
DVDD  
DVDD  
AVDD  
IOVDD  
5
IOVDD  
C40  
4
C21  
GND  
D+  
D-  
SCLK  
RESET  
U17  
R9  
R12  
3
2
1
P1.3  
P1.2  
P1.1  
P1.0  
0.1uF  
4
SN74AVC1T45DBV  
+3.3VD  
C43  
SN74AUP1G125DBV  
2
3
5
6
7
1.5K  
R10  
3.09K  
.001uF  
VCC  
IOVDD  
C27  
0.1uF  
U4  
27.4  
J15  
897-30-004-90-000000  
4
16  
1
2
3
4
5
6
7
8
0.1uF  
16  
28  
45  
21  
33  
2
VCCB VCCA  
1
3
5
7
9
11  
2
4
6
8
10  
12  
R11  
27.4  
15  
14  
13  
12  
11  
10  
9
OE1  
OE2  
1B1  
1B2  
2B1  
2B2  
GND  
DIR1  
DIR2  
1A1  
1A2  
2A1  
C13  
47pF  
C14  
47pF  
+3.3VD  
JMP7  
JPR-1X3  
C24  
0.1uF  
C10  
0.1uF  
C11  
0.1uF  
C12  
0.1uF  
2A2  
GND  
EXTERNAL SPI  
SN74AVC4T245PW  
INT  
USB SPI  
TP11  
MRESET  
+3.3VD  
USB ACTIVE  
P3.5  
R25  
R26  
D2  
R13  
649  
P3.4  
P3.3  
22.1k  
R27  
137k  
R28  
SML-LX0603YW-TR  
YELLOW  
25.5k  
R29  
76.8k  
R30  
+3.3VD  
R17  
P3.1-P3.2  
+3.3VD  
28k  
56.2k  
R32  
100K  
IOVDD  
+3.3VD  
C38  
C36  
0.1uF  
C44  
1uF  
R31  
+3.3VD  
C39  
U13  
VCCA VCCB  
A
GND  
R24  
220  
32.4k  
R33  
48.7k  
R34  
1
3
2
6
4
5
0.1uF  
0.1uF  
+5VD  
B
DIR  
U16  
IOVDD  
2
D8  
39.2k  
R35  
36.5k  
R36  
4
R14  
390  
SN74AVC1T45DBV  
C25  
J8  
+1.8VD  
GREEN  
46.4k  
R37  
30.9k  
R18  
SN74LVC1G06DBV  
SML-LX0603GW-TR  
R4  
10  
U9  
5
C7  
ED555/2DS  
EXT PWR IN  
IOVDD  
D3  
GREEN  
28  
24  
TP6  
10uF  
1IN  
1IN  
1EN  
1RESET  
1OUT  
52.3k  
30.1k  
JMP6  
6
4
U14  
10uF  
D5  
RED  
PWR SELECT  
1
3
2
5
23  
IN  
EN  
GND  
OUT  
FB  
6VDC-10VDC IN  
1OUT  
SW3  
3
9
U2  
1GND  
2GND  
4
1.2V  
9
1.4V 10  
1.6V 11  
1.8V 12  
2.0V 13  
2.5V 14  
3.0V 15  
3.3V 16  
8
7
6
5
4
3
2
1
D1  
REG1117-5  
22  
J9  
2RESET  
C37  
0.1uF  
3
2
+3.3VD  
TPS73201DBV  
VIN  
VOUT  
10  
11  
12  
18  
17  
2EN  
2IN  
2IN  
2OUT  
2OUT  
DL4001  
C15  
0.1uF  
R15  
10K  
R16  
10K  
C16  
C6  
10uF  
R19  
220  
0.33uF  
ti  
CUI-STACK PJ102-BH  
2.5 MM  
C8  
10uF  
IOVDD  
R38  
DATA ACQUISITION PRODUCTS  
TPS767D318PWP  
SW1  
1
2
HIGH PERFORMANCE ANALOG DIVISION  
SEMICONDUCTOR GROUP  
D4  
10M  
4
3
3.3VD ENABLE  
1.8VD ENABLE  
SML-LX0603GW-TR  
IOVDD SELECT  
C17  
0.33uF  
6730 SOUTH TUCSON BLVD., TUCSON, AZ 85706 USA  
GREEN  
TITLE  
ENGINEER RICK DOWNS  
DRAWN BYROBERT BENJAMIN  
DOCUMENT CONTROL NO.6463996  
REGULATOR ENABLE  
USB-MODEVM INTERFACE  
SIZE B  
DATE 3-Apr-2007  
REV  
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REVISION HISTORY  
ENGINEERING CHANGE NUMBER  
REV  
APPROVED  
D
C
B
A
D
C
B
A
J11  
A0(-)  
A1(-)  
A2(-)  
J12  
CNTL  
CLKX  
CLKR  
FSX  
FSR  
DX  
DR  
JMP5  
1
3
5
7
9
11  
13  
15  
17  
19  
2
4
6
8
10  
12  
14  
16  
18  
20  
1
3
5
7
9
11  
13  
15  
17  
19  
2
4
6
8
10  
12  
14  
16  
18  
20  
A0(+)  
A1(+)  
A2(+)  
A3(+)  
A4  
A5  
A6  
A7  
REF-  
REF+  
GPIO0  
DGND  
GPIO1  
GPIO2  
DGND  
GPIO3  
GPIO4  
SCL  
A3(-)  
AGND  
AGND  
AGND  
VCOM  
AGND  
AGND  
IOVDD  
INT  
TOUT  
GPIO5  
DGND  
SDA  
+3.3VD  
C29  
RA2  
10k  
J13A (TOP) = SAM_TSM-105-01-L-DV-P  
J13B (BOTTOM) = SAM_SSW-105-22-F-D-VS  
+5VA  
DAUGHTER-SERIAL  
DAUGHTER-ANALOG  
R6  
0.1uF  
200k  
J13  
J11A (TOP) = SAM_TSM-110-01-L-DV-P  
J11B (BOTTOM) = SAM_SSW-110-22-F-D-VS  
1
3
5
7
9
2
4
6
8
-5VA  
SCLK  
SS  
U6  
GND GATE  
+VA  
+5VA  
DGND  
+1.8VD  
+3.3VD  
-VA  
-5VA  
AGND  
VD1  
IOVDD  
1
2
3
4
5
6
7
8
9
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
P3.3  
P3.4  
P3.5  
P1.0  
P1.1  
P1.2  
P1.3  
+5VA  
+5VD  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
A9  
A10  
A11  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
B8  
B9  
JMP1  
1
10  
J12A (TOP) = SAM_TSM-110-01-L-DV-P  
J12B (BOTTOM) = SAM_SSW-110-22-F-D-VS  
+5VD  
2
DAUGHTER-POWER  
TP8  
JPR-2X1  
TP7  
IOVDD  
AGND  
DGND  
+5VD  
RESET  
JMP2  
IOVDD  
JMP3  
10  
11  
12  
PWR_DWN  
1
2
IOVDD  
INT  
B10  
B11  
-5VA  
+5VA  
+5VD  
P3.1-P3.2  
R7  
C1  
C2  
C3  
JMP4  
TP1  
TP2  
TP3  
SN74TVC3010PW  
MISO  
MOSI  
TP4  
+3.3VD  
200k  
+3.3VD  
R8  
10uF  
10uF  
10uF  
R1  
2.7K  
SCL  
SDA  
200k  
R21  
390  
R22  
390  
J1  
-5VA  
J2  
+5VA  
J3  
+5VD  
R2  
+1.8VD  
C4  
10uF  
C5  
TP5  
2.7K  
D6  
D7  
SML-LX0603GW-TR  
GREEN  
SML-LX0603GW-TR  
10uF  
GREEN  
MCLK  
I2SDOUT  
I2SDIN  
LRCLK  
BCLK  
J4  
+1.8VD  
J5  
+3.3VD  
J16  
J17  
1
3
5
7
9
11  
13  
15  
17  
19  
2
4
6
8
10  
12  
14  
16  
18  
20  
1
3
5
7
9
11  
13  
15  
17  
19  
2
4
6
8
10  
12  
14  
16  
18  
20  
A0(-)  
A1(-)  
A2(-)  
A3(-)  
AGND  
AGND  
AGND  
VCOM  
AGND  
AGND  
A0(+)  
A1(+)  
A2(+)  
A3(+)  
A4  
A5  
A6  
A7  
REF-  
REF+  
CNTL  
CLKX  
CLKR  
FSX  
FSR  
DX  
DR  
INT  
TOUT  
GPIO5  
GPIO0  
DGND  
GPIO1  
GPIO2  
DGND  
GPIO3  
GPIO4  
SCL  
DGND  
SDA  
+5VA  
DAUGHTER-SERIAL  
DAUGHTER-ANALOG  
J17A (TOP) = SAM_TSM-110-01-L-DV-P  
J17B (BOTTOM) = SAM_SSW-110-22-F-D-VS  
J18  
+VA  
J16A (TOP) = SAM_TSM-110-01-L-DV-P  
J16B (BOTTOM) = SAM_SSW-110-22-F-D-VS  
1
3
5
7
9
2
4
6
8
-5VA  
-VA  
-5VA  
AGND  
VD1  
+5VA  
DGND  
+1.8VD  
+3.3VD  
10  
+5VD  
DAUGHTER-POWER  
+3.3VD  
+1.8VD  
IOVDD  
+5VD  
J18A (TOP) = SAM_TSM-105-01-L-DV-P  
J18B (BOTTOM) = SAM_SSW-105-22-F-D-VS  
ti  
DATA ACQUISITION PRODUCTS  
HIGH-PERFORMANCE ANALOG DIVISION  
SEMICONDUCTOR GROUP  
6730 SOUTH TUCSON BLVD., TUCSON, AZ 85706 USA  
TITLE  
ENGINEER RICK DOWNS  
USB-MODEVM INTERFACE  
DRAWN BY ROBERT BENJAMIN  
DOCUMENT CONTROL NO.6463996  
SIZE B  
DATE 3-Apr-2007  
REV  
D
SHEET  
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FCC Warnings  
This equipment is intended for use in a laboratory test environment only. It generates, uses, and can radiate radio frequency energy and  
has not been tested for compliance with the limits of computing devices pursuant to subpart J of part 15 of FCC rules, which are designed  
to provide reasonable protection against radio frequency interference. Operation of this equipment in other environments may cause  
interference with radio communications, in which case the user at his own expense will be required to take whatever measures may be  
required to correct this interference.  
EVALUATION BOARD/KIT IMPORTANT NOTICE  
Texas Instruments (TI) provides the enclosed product(s) under the following conditions:  
This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES  
ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have  
electronics training and observe good engineering practice standards. As such, the goods being provided are not intended to be complete  
in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including product safety and environmental  
measures typically found in end products that incorporate such semiconductor components or circuit boards. This evaluation board/kit does  
not fall within the scope of the European Union directives regarding electromagnetic compatibility, restricted substances (RoHS), recycling  
(WEEE), FCC, CE or UL, and therefore may not meet the technical requirements of these directives or other related directives.  
Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30 days from  
the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYER  
AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF  
MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE.  
The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims  
arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all  
appropriate precautions with regard to electrostatic discharge.  
EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY  
INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.  
TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not exclusive.  
TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or  
services described herein.  
Please read the User’s Guide and, specifically, the Warnings and Restrictions notice in the User’s Guide prior to handling the product. This  
notice contains important safety information about temperatures and voltages. For additional information on TI’s environmental and/or  
safety programs, please contact the TI application engineer or visit www.ti.com/esh.  
No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, or  
combination in which such TI products or services might be or are used.  
EVM WARNINGS AND RESTRICTIONS  
It is important to operate the EVM daughterboard within the input voltage range of 3.3 V to 5 V and the output voltage range of 0 V to 5 V  
and the EVM motherboard within the input voltage range of 6 VDC to 10 VDC when using an external AC/DC power supply. Refer to the  
USB-MODEVM Interface Power section of this manual when using lab power supplies.  
Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions  
concerning the input range, please contact a TI field representative prior to connecting the input power.  
Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the EVM.  
Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the load specification,  
please contact a TI field representative.  
During normal operation, some circuit components may have case temperatures greater than 30°C. The EVM is designed to operate  
properly with certain components above 85°C as long as the input and output ranges are maintained. These components include but are  
not limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types of devices can be identified  
using the EVM schematic located in the EVM User's Guide. When placing measurement probes near these devices during operation,  
please be aware that these devices may be very warm to the touch.  
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265  
Copyright 2008, Texas Instruments Incorporated  
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IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,  
and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should  
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are  
sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.  
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard  
warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where  
mandated by government requirements, testing of all parameters of each product is not necessarily performed.  
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and  
applications using TI components. To minimize the risks associated with customer products and applications, customers should provide  
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power.ti.com  
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