73M2901/5V
Advanced Single
Chip Modem
®
TDK SEMICONDUCTOR CORP.
August 2001
FEATURES
DESCRIPTION
The 73M2901/5V is a single-chip modem that
combines all the controller (DTE) and data pump
functions necessary to implement an intelligent
V.22bis data modem. This device is based on TDK
Semiconductor’s implementation of the industry
standard 8032 microcontroller core with a proprietary
multiply and accumulate (MAC) coprocessor; Sigma-
Delta A/D and D/A converters; and an analog front
end. The ROM and RAM necessary to operate the
modem are contained on the device. Additionally,
the 73M2901/5V provides an on-chip oscillator and
Hybrid driver.
·
·
Low overall system chip count. True one
chip solution for embedded systems
Low operating power (~250mW
@
5V,
automatic low power standby and power
down options available)
Internal ROM and RAM for normal operation
On chip optional hybrid driver
Designed for +5 volts (+/-10%)
Data speeds:
·
·
·
·
V.22bis – 2400bps
V.22, Bell 212 – 1200bps
V.21, Bell 103 – 300bps
The 73M2901/5V is a high performance, low
voltage, low power, single chip modem capable of
data transmission and reception through 2400bps.
The 73M2901/5V is intended for embedded
applications and battery operation. This device
offers options for a low power conventional 5 volt
design with optional internal hybrid and country
specific call progress support.
V.23 – 1200/75bps (w/ turnaround (PAVI))
Bell 202 – 1200bps
Bell 202 and V23 4-wire operations
Dynamic Range: -9dBm to –43 dBm
“AT” command set
Host access to modem port pins via AT
commands for custom I/O expansion
DTMF tone generation and detection
Call progress support with multinational
options (FCC68, CTR21, JATE…)
Caller ID capability
·
·
·
·
·
·
·
·
Blacklisting capability
Packaging: 32 pin PLCC or 44 pin TQFP
BLOCK DIAGRAM
ROM
RAM
ASRCH
RING
MAC
Hybrid
DTR
CPU
TxCLK
TxD
RxA
TxAP
TxAP
AFE
RxD
RxCLK
RI
CTS
DCD
DSR
RTS
HBDEN
USR10
USR11
RELAY
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73M2901/5V
Advanced Single
Chip Modem
RESET
ASYNCHRONOUS AND SYNCHRONOUS SERIAL
DATA INTERFACE
A reset is accomplished by holding the RESET pin
high. To ensure a proper power-on reset, the reset
pin must be held high for a minimum of 3ms. At
power on, the voltage at VPD, VPA, and RESET
must come up at the same time for a proper reset.
The serial data interface consists of the TXD and
RXD data paths (LSBit shifted in and out first,
respectively); and the TXCLK and RXCLK serial
clock outputs associated with the data pins;
CTS/RTS flow control; DCR, DSR and DTR. In
synchronous mode, the data is passed at the bit rate
(tolerance is +1%, -2.5%).
PIN DESCRIPTIONS
POWER PIN DESCRIPTION
PIN NAME
VPA
32-PIN 44-PIN TYPE DESCRIPTION
15
21
16
22
I
I
I
Positive analog voltage (+ Analog Supply)
VNA
Negative analog voltage. (Analog Ground)
Positive digital voltage (+ Digital Supply)
VPD
6, 25,
29
2,12,
27, 33
VND
5, 22, 11, 24,
26 44, 28
I
Negative digital voltage. (Digital Ground)
ANALOG INTERFACE PIN DESCRIPTION
PIN NAME
RXA
32-PIN 44-PIN TYPE DESCRIPTION
20
16
17
14
21
17
18
15
I
Receive analog data
Transmit Analog -
TXAN
O
O
I
TXAP
Transmit Analog +
HBDEN
2w/4w hybrid driver enable pin
0 = Driver configured for 50kWor greater load (Tie to VND)
1 = Driver configured for driving line-coupling transformer (Tie to
VPD)
VBG
19
18
20
19
O
O
Analog Band Gap voltage reference pin (0.1mF to VNA)
VREF
Analog reference voltage pin (0.1mF to VNA)
EXTERNAL INTERRUPTS PIN DESCRIPTIONS
PIN NAME
RING
32-PIN 44-PIN TYPE DESCRIPTION
2
1
39
38
37
I
I
I
External interrupt – Line interface ring detection circuitry input
External interrupt – Autobaud detection, connected to TXD
External interrupt – DTE DTR signal input
ASRCH
DTR
32
3
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73M2901/5V
Advanced Single
Chip Modem
PIN DESCRIPTIONS (continued)
OSCILLATOR PIN DESCRIPTION
PIN NAME
32-PIN 44-PIN TYPE DESCRIPTION
OSCIN
24
26
I
Crystal input for internal oscillator, also input for external
source.
OSCOUT
23
25
O
Crystal oscillator output.
DIGITAL INTERFACE PIN DESCRIPTION
PIN NAME
RESET
RXCLK
RXD
32-PIN 44-PIN TYPE DESCRIPTION
13
31
30
28
27
12
9
I
O
O
O
I
Resets 73M2901/5V
36
35
31
30
8
Receive Data Synchronous Clock
Serial output to DTE.
TXCLK
TXD
Transmit Data Synchronous Clock
Serial data input from DTE.
USR10
I/O
This pin can optionally be configured as an active low detect
pin. This can be used to implement such functions as “parallel-
pick-up”, “line-in-use”, or “seize” detect.
USR11
11
7
I/O
Programmable I/O port. This pin can ooptionnaly be used to
control an external switch for Caller ID decoding operations.
RTS (USR12)
CTS (USR13)
DSR (USR14)
DCD (USR15)
RI (USR16)
10
9
6
5
I
Request to Send
Clear to Send
O
O
O
O
O
8
4
Data Set Ready
Data Carrier Detect
Ring Indicator
7
3
4
43
40
RELAY (USR17)
3
Relay driver output
4
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73M2901/5V
Advanced Single
Chip Modem
ELECTRICAL SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
Operation above maximum rating may permanently damage the device.
PARAMETER
RATING
-0.5V to +7.0V
Supply Voltage
Pin Input Voltage
Storage Temperature
-0.5V to VPD + 0.5V
-55ºC to 150°C
RECOMMENDED OPERATING CONDITIONS
PARAMETER
RATING
Supply Voltage
+5.0V (+/-10%)
11.0592MHz +/- 50ppm
-40C to +85°C
Oscillator Frequency
Operating Temperature
TRANSMITTER
PARAMETER
CONDITIONS
MIN
-5
NOM
-3.5
MAX
-2
UNIT
dB
ITU Guard Tone Power
550Hz (relative to carrier)
1800Hz (relative to carrier)
1300Hz
-8
-6.5
-5
dB
Calling Tone
-11
-11
-8.0
-10
-9.0
-9.0
-6.0
-8.0
dBm01
dBm01
dBm01
Answer Tone Power
DTMF Transmit Power
2225/2100Hz
High band tones
Low band tones
1
dBm0 refers to the TDK recommended DAA ( 8dB loss from Transmit pins to the line and 5dB loss from the line to the Receive pin). Results
may vary depending on selected DAA. 0dBm = 0.775Vrms. dBm = 10log {Vrms2/[(1mW)(600O)]}
5
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73M2901/5V
Advanced Single
Chip Modem
ELECTRICAL SPECIFICATIONS (continued)
MAXIMUM TRANSMIT LEVELS
Vref=2.25V; VPA=5.0V
Transmit type
Maximum differential line
level (dBm0)
QAM
-5.5
-3.4
-1.2
-6.0
-8.0
-3.9
DPSK
FSK
DTMF (high tone)
DTMF (low tone)
DTMF (total)
Vref=1.25V; VPA=5.0V
QAM
-9.6
-7.4
-5.3
-7.9
-9.8
-5.7
DPSK
FSK
DTMF (high tone)
DTMF (low tone)
DTMF (total)
Note: The recommended DAA (see the TDK 73M2901 Reference Manual) will result in approximately 8dB loss from the transmit pins to the
phone line. This includes the loss through the line matching impedance (475W resistor), transformer, and solid state off-hook relay.
6
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73M2901/5V
Advanced Single
Chip Modem
ELECTRICAL SPECIFICATIONS (continued)
TRANSMITTER
PARAMETER
CONDITIONS
MIN
-0.3
4.8
NOM
0
MAX
0.3
UNIT
dB
Gain Adjust
Tolerance
By step
Transmit Gain Boost SFR 96h bit 1 (TXBOOST) = 1
5.1
5.4
dB
Total Harmonic
Distortion (THD)
1Khz sine wave at output (TXAP-TXAN)
1.5Vpk(2.7dBm) for Vref=1.25V
2.4Vpk (6.8dBm) for Vref=2.25V
THD = 2nd and 3rd harmonic.
-50
-33
dB
dB
Intermod Distortion
At output (TXAP-TXAN)
1.0kHz, 1.2 kHz sine waves summed
2.0Vpk for Vref=1.25V
each unwanted
frequency
component
2.4Vpk for Vref=2.25V
Refer to CTR21 specification for complete
description of requirements
sum of
unwanted
frequency
dB
below
low
-20
components in
pass band
tone
Power Supply
-30 dBm signal at VPA
Rejection Ratio
300Hz – 30kHz. Measured TXAP to TXAN.
30.0
dB
RECEIVER
PARAMETER
Carrier Detect On
Carrier Detect Off
CONDITIONS
Tip and Ring
Tip and Ring
MIN
-43.0
-48.0
NOM
MAX
UNIT
dBm01
dBm01
dB
Carrier Detect Hysteresis
Receive Level
Tip and Ring
Tip and Ring
0.2kHz - 4.0kHz
2.0
-70
-43.0
-9.0
-65
dBm01
Idle Channel Noise
dB
7
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73M2901/5V
Advanced Single
Chip Modem
ELECTRICAL SPECIFICATIONS (continued)
RECEIVER (continued)
PARAMETER
TEST CONDITION
RXA
MIN
150
2.7
NOM
---
MAX
---
UNITS
kW
Input Impedance
Receive Gain
Boost
SFR 96h bit 2 (Rxgain) = 1
3.0
3.3
dB
Maximum Input
Level at RXA
VREF=1.25V
0.587
1.069
-50
Vpk
Vpk
dB
VREF=2.25V
Total Harmonic
Distortion (THD)
1kHz 450mV-pk on RXA
THD = 2nd and 3rd harmonic.
-70
DC CHARACTERISTICS
PARAMETER
SYMBOL
CONDITION
MIN
NOM
MAX
UNIT
VIL
-0.5
0.2Vcc
V
Input Low Voltage
(Except OSCIN,RESET)
VIL
VIH
-0.5
0.2 Vcc
V
V
Input Low Voltage
OSCIN,RESET
0.5 Vcc
0.7 Vcc
Vcc + 0.5
Vcc + 0.5
0.45
Input High Voltage
(Except OSCIN,RESET)
VIH
V
Input High Voltage
OSCIN,RESET
VOL
IOL = 4mA
IOL = 3.0mA
IOH = -4mA
V
Output Low Voltage
(Except OSCOUT)
VOLOSC
VOH
VOHOSC
IIH
0.7
V
Output Low Voltage
OSCOUT
Vcc – 0.45
Vcc – 0.9
V
Output High Voltage
(Except OSCOUT)
IOH =-3.0mA
Vss < Vin < Vcc
Vss < Vin < Vcc
V
Output High Voltage
OSCOUT
1
mA
mA
Input Leakage Current
(Except OSCIN)
IIH
1
30
Input Leakage Current
OSCIN
8
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73M2901/5V
Advanced Single
Chip Modem
ELECTRICAL SPECIFICATIONS (continued)
DC CHARACTERISTICS
PARAMETER
5V Operations
SYMBOL
CONDITION
MIN
NOM
MAX
UNIT
Maximum Power Supply
Normal Operation @ 5V
HBDEN pulled high
IDD1
30pF/pin
51
62
mA
Maximum Power Supply
Normal Operation @ 5V
HBDEN pulled low
IDD1
30pF/pin
35
43
mA
Maximum Digital Power
Supply @ 5V
IDDd
30pF/pin
30pF/pin
31
20
37
25
mA
mA
Maximum Analog Power
supply @ 5V
IDDah1
HBDEN pulled high
Maximum Analog Power
Supply @ 5V
IDDah0
30pF/pin
4
6
mA
HBDEN pulled low
Maximum Power Supply
Idle Mode @ 5V
IDD2
IDD3
30pF/pin
30pF/pin
11
4
15
10
mA
Maximum Power Supply
Power Down Mode @ 5V
mA
DC CHARACTERISTICS
PARAMETER
CONDITION
Vcc=5V
MIN
1.19
1.19
2.14
3.8
NOM
MAX
UNIT
V
Vbg
1.25
1.25
2.25
4.2
1.31
1.31
2.36
4.5
Vref
Vcc=5V – no boost
V
Vref
Vcc=5V + internal boost
V
5 Volts detection threshold
V
9
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73M2901/5V
Advanced Single
Chip Modem
FIRMWARE DESCRIPTION2
FIRMWARE FEATURES
An “AT” command interpreter provides command
and configuration of the 73M2901/5V. This provides
the user a uniform interface to control the modem in
embedded applications.
·
·
·
“AT” command set
Supports data standards through V.22bis
Provides DAA control firmware (e.g. ring detect,
hook control, line in use detection support)
Multinational Call progress support (FCC68,
CTR21, JATE…)
·
·
The signal processing is performed by obtaining
data from and providing data to the integrated A/D
converter. A MAC hardware processor is provided
for computation.
Caller ID capability
FSK demodulation (V23 or Bell202)
Intra 1st/2nd ring CID data operations
Post Line reversal CID data operations
Interfaces with standard V.24/EIA-232 (3-5 volt
inverted level) serial interface using the built in
serial port and firmware control of port pins
Provides tone generation and detection, four
imprecise and four precise call progress detect
filters
To provide maximum flexibility, the system host
processor can access the internal RAM and Control
Register space in the modem. This will allow the
OEM user to modify parameters such as filter
response, transmit levels through the AT command
·
·
set using proprietary commands.
The host
processor can also access the modem I/O port pins,
providing extended I/O capability.
·
·
Host access to program RAM provided
User access to modem functions
FIRMWARE REQUIREMENTS
The modem always powers up in the idle (on hook)
mode. “AT” commands are issued via the serial
interface from the host. All modem configuration
commands are received in this manner. The data
modem firmware is contained in an internal ROM.
The firmware will automatically enter a power saving
idle mode if the modem is on hook and there are no
incoming host commands.
The modem
automatically powers up upon receiving the next
command. This power up sequence occurs without
delay to the host. This function, while saving power,
is transparent to the host processor and can be
disabled by the host via an “AT” command. The
host can also program the modem to power down
via external pin (DTR) or via a firmware command.
2
For a detailed description of the firmware consult the TDK
73M2901 User’s Manual.
10
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73M2901/5V
Advanced Single
Chip Modem
transformer directly (with the required impedance
matching series resistor). Used in this configuration,
there is loss associated in both the receive path and
transmit path.
DESIGN CONSIDERATIONS
TDK Semiconductor’s single chip modem solutions
include all the basic modem functions. This makes
these devices adaptable to a variety of applications.
The line interface circuit shown on the following
page represents the basic components and values3
for interfacing the TDK 73M2901/5V analog pins to
the telephone line.
Unlike digital logic circuitry, modem designs must
contend with precise frequency tolerances and verify
low level analog signals, to ensure acceptable
performance. Using good analog circuit design
practices will generally result in a sound design.
The crystal oscillator should be held to a 50ppm
MODEM PERFORMANCE
CHARACTERISTICS
tolerance.
Following
are
additional
recommendations that should be taken into
consideration when starting new designs.
The curves presented in this data sheet define
modem IC performance under a variety of line
conditions typical of those encountered over public
service telephone lines.
LAYOUT CONSIDERATIONS
Good analog/digital design rules must be used to
control system noise in order to obtain high
performance in modem designs. The more digital
circuitry present in the application, the more
attention to noise control is needed.
BER VS. SNR
This test represents the ability of the modem to
operate over noisy lines with a minimum amount of
data transfer errors. Since some noise is generated
in the best dial up lines, the modem must operate
with the lowest signal to noise ratio (SNR) possible.
Better modem performance is indicated by test
curves that are closest to the BER axis. A narrow
spread between curves representing the four line
High speed, digital devices should be locally
bypassed, and the telephone line interface and the
modem should be located next to each other near
where the telephone line connection is accessed. It
is recommended that power supplies and ground
traces should be routed separately to the analog and
digital portions on the board. Digital signals should
not be routed near low level analog or high
impedance analog traces.
parameters
indicates
minimal
variation
in
performance while operating over a range of
aberrant operating conditions. Typically a DPSK
modem will exhibit better BER performance test
curves receiving in the low band (answer mode)
than in the high band (originate mode).
The 73M2901/5V should be considered a high
performance analog device. A 10mF electrolytic
capacitor in parallel with a 0.1mF Ceramic capacitor
should be placed between VPD and VND as well as
between VPA and VNA. A 0.1mF ceramic capacitor
should be placed between VREF and VNA as well
as VBG and VNA. Use of ground planes and large
traces on power is recommended.
BER VS. RECEIVE LEVEL
This test measures the dynamic range of the
modem. Because signal levels vary widely over dial
up lines, the widest possible dynamic range is
desirable. The SNR is held constant at the indicated
values as the Receive level is lowered from very a
very high to a very low signal level. The width of the
bowl of these curves, taken at the BER point is the
measure of the dynamic range.
The 73M2901/5V is the first of a series of parts with
different and/or additional features. In order to insure
full lay out compatibility for all the series, it is
recommended to implement three additional
resistors in the schematics as shown in the
recommended schematics arrangement (R11, R12
and R13).
TELEPHONE LINE INTERFACE
Transmit levels at the line are dependent on the
interface used between the pins and the line. In
order to save having to provide external op-amps to
drive the line coupling transformer, the analog
outputs (TXAP and TXAN) have the capability to be
used as the hybrid drivers for connecting to the
3
TDK73M2901 Demo boards use the line interface shown on the
following page. Other designs may have different requirements
and thus will require different component values or a different
configuration. With the shown configuration, there is
approximately an 8dB loss in the transmit path, and approximately
a 5dB loss in the receive path.
11
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73M2901/5V
Advanced Single
Chip Modem
RXA
R3
R4
21K
5.1K
R1
T1
TXAP
TXAN
475
C1
0.033m
Telephone
Line
Midcom 671-8005
Recommended Line Interface
VCC
C1
GND
+
C2
Y1
27PF
C3
10uF
11.0592 MHZ
GND
R1
33PF
10K
VCC
GND
TTL V24
signals
interface
GND
U1
VCC
JP1
2901_P32
10
9
8
7
6
5
4
3
2
7
8
9
DCD
DSR
CTS
RI
RTS
DTR
RXC
RXD
TXD
ASRCH
TXC
To
15
--> RS232
level shifter
--> Host
VPA
VNA
VREF
VBG
VPA
4
21
18
19
14
VNA
10
32
31
30
27
1
C4
100nF
C5
microprocessor
100nF
R2
21K
HBDEN
VCC
20
17
16
1
RXA
TXAP
TXAN
28
HEADER 10
GND
R11 0R
R3
5.1K
T1
3
2
R4
470
C7
.033UF
SEC
4
PRI
1
R12
0R
R13
nc
671-8005
Recommended Schematics Arrangement
12
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73M2901/5V
Advanced Single
Chip Modem
TYPICAL USA APPLICATION SCHEMATICS
13
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73M2901/5V
Advanced Single
Chip Modem
BER VS SNR
BER VS RECEIVE LEVEL
V.22bis
V.22bis
3002A Line, 5.0V, 25C
3002A Line, 5.0V, 25C
1.00E+00
1.00E+00
1.00E-01
1.00E-02
1.00E-03
1.00E-04
1.00E-05
1.00E-06
1.00E-01
1.00E-02
1.00E-03
1.00E-04
1.00E-05
1.00E-06
Answer
Originate
Answer
Originate
4
8
12 16 20 24 28 32 36 40 44
Receive Level (dBm)
10 11 12 13 14 15 16 17 18 19
SNR (Rx Signal/3k Hz) (dB)
14
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73M2901/5V
Advanced Single
Chip Modem
32 PIN PLCC PIN-OUT
PIN
1
PIN NAME
ASRCH
RING
RELAY
RI
PIN
17
PIN NAME
TXAP
VREF
VBG
2
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
3
4
RXA
5
VND
VNA
6
VPD
VND
7
DCD
OSCOUT
OSCIN
VPD
8
DSR
9
CTS
10
11
12
13
14
15
16
RTS
VND
USR11
USR10
RESET
HBDEN
VPA
TXD
TXCLK
VPD
RXD
RXCLK
DTR
TXAN
44 PIN TQFP PIN-OUT
PIN
1
PIN NAME
N/C
PIN
12
13
14
15
16
17
18
19
20
21
22
PIN NAME
VPD
PIN
PIN NAME
PIN
34
35
36
37
38
39
40
41
42
43
44
PIN NAME
N/C
23
24
25
26
27
28
29
30
31
32
33
N/C
2
VPD
N/C
VND
RXD
3
DCD
N/C
OSCOUT
OSCIN
VPD
RXCLK
DTR
4
DSR
HBDEN
VPA
5
CTS
ASRCH
RING
RELAY
N/C
6
RTS
TXAN
TXAP
VREF
VBG
VND
7
USR11
USR10
RESET
N/C
N/C
8
TXD
9
TXCLK
N/C
N/C
10
11
RXA
RI
VND
VNA
VPD
VND
15
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73M2901/5V
Advanced Single
Chip Modem
MECHANICAL DRAWINGS
32-Pin PLCC
16
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73M2901/5V
Advanced Single
Chip Modem
MECHANICAL DRAWINGS (continued)
44-Pin TQFP (JEDEC LQFP)
17
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73M2901/5V
Advanced Single
Chip Modem
CAUTION: Use handling procedures necessary for a
PACKAGE PIN DESIGNATIONS
(Top View)
static sensitive component.
32-Lead PLCC
73M2901-32IH/5
44-Pin TQFP
73M2901-IGT/5
ORDERING INFORMATION
PART DESCRIPTION
ORDER NUMBER
PACKAGING MARK
73M2901/5V
73M2901-32IH/5
73M2901-32IH
32-Pin Plastic Leaded Chip Carrier
44-Pin Thin Quad Flat Pack
73M2901/5V
73M2901-IGT/5
73M2901-IGT
No responsibility is assumed by TDK Semiconductor Corporation for use of this product nor for any infringements of patents and trademarks
or other rights of third parties resulting from its use. No license is granted under any patents, patent rights or trademarks of
TDK Semiconductor Corporation, and the company reserves the right to make changes in specifications at any time without notice.
Accordingly, the reader is cautioned to verify that the data sheet is current before placing orders.
ÓTDK Semiconductor Corporation
08/30/01 Rev. D
Revision:
18
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73M2901/5V
Advanced Single
Chip Modem
August 22, 2001
August 30, 2001
Removed 5V pin callouts from package drawing.
Updated Mechanical Drawing
19
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