CDX-605
SERVICE MANUAL
US Model
Model Name Using Similar Mechanism
CDX-505RF
MG-250C-137
KSS-521A/J2N
CD Drive Mechanism Type
Optical Pick-up Name
SPECIFICATIONS
System
Compact disc digital audio system
10 – 20,000 Hz
Below the measurable limit
94 dB
Frequency response
Wow and flutter
Signal-to-noise ratio
Outputs
BUS control output (8 pins)
Analog audio output (RCA pin)
800 mA (during CD playback)
800 mA (during loading or ejecting a disc)
– 10 °C to + 55 °C (14 °F to 131 °F)
Approx. 262 × 90 × 181.5 mm
(103/8 × 35/8 × 71/4 in.) (w/h/d)
not incl. projecting parts and controls
Approx. 2.1 kg (4 lb 10 oz)
12 V DC car battery
Current drain
Operating temperature
Dimensions
Mass
Power requirement
(negative ground)
Supplied accessories
Disc magazine (1)
Parts for installation and connections
(1 set)
Design and specifications subject to change without notice.
COMPACT DISC CHANGER
MICROFILM
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CDX-605
7-3. SCHEMATIC DIAGRAM – RF Section – • See page 17 for Waveforms. • See page 31 for IC Block Diagrams.
(Page 27)
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CDX-605
7-6. SCHEMATIC DIAGRAM – MAIN Section (1/2) – • See page 17 for Waveforms. • See page 31 for IC Block Diagrams.
(Page 22)
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CDX-605
7-7. SCHEMATIC DIAGRAM – MAIN Section (2/2) – • See page 17 for Waveforms. • See page 31 for IC Block Diagrams.
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• IC Block Diagrams
IC52 BA6287F (RF BOARD)
IC301 BA6287F (MAIN BOARD)
IC11 CXA1992BR (RF BOARD)
OUT1
1
2
3
4
8
7
6
5
GND
OUT2
VREF
RIN
39
38
37
36
35
34
33
32
31
30
29
28
27
VEE
–
+
VM
RF SUMMING
AMP
PD2 IV
AMP
PD1 IV
AMP
+
DRIVER
DRIVER
–
FE_BIAS
SENS2
SENS1
40
41
26
25
TSD
VCC
+
–
APC
VCC
FIN
CONTROL LOGIC
IIL
↓
TTL
VEE
–
+
F
E
LASER POWER CONTROL
F IV AMP
VCC
POWER
SAVE
VCC
VCC
FE AMP
–
+
42
43
24 C. OUT
E IV AMP
VEE
+
–
DFCT
EI
XRST
23
+
–
VEE
LEVEL S
VEE
VEE
44
22 DATA
21 XLT
VEE
VEE
FO. BIAS
WINDOW
COMP.
VCC
IIL
MIRR
+
–
↓
IC101 CXD2530Q (MAIN BOARD)
TTL
TTL
↓
IIL
FOK
TEO 45
+
–
TRK. GAIN
WINDOW COMP.
+
+
–
–
80 79 78 77 76 75 74
70 69 68 67 66 65 64
60 59 58 57 56 55 54
63 62 61 53 52 51
73 72
71
E-F BALANCE
WINDOW COMP.
CLK
20
46
47
+
–
LPFI
TEI
+
–
FOH
FOL
TGH
50 LRCK
49 WDCK
NC 81
VSS 82
IIL DATA REGISTER
TGL
19 LOCK
18 VCC
48 ASYE
47 ASYO
INPUT SHIFT REGISTER
ADDRESS DECODER
SENS SELECTOR
VDD
83
NC 84
85
BALH
BALL
ATSC
–
+
ERROR
CORRECTOR
ASYMMETRY
CORRECTOR
46
45
44
43
ASYI
BIAS
RF
TES7
NC 86
OUTPUT DECODER
D / A
TZC
FZC
EFM
INTERFACE
ATSC 48
–
+
VSS
XVDD
VCC
87
88
DEMODULATOR
AVDD
ATSC
WINDOW
COMP.
42 CLTV
AVSS
41
40 FILI
XTAI 89
XTAO
XVSS 91
VSS 92
NC 93
DIGITAL
PLL
DIGITAL OUT
16K RAM
90
DFCTO
IFB1-6
BAL1-4
TOG1-4
FS1-4
TG1-2
TM1-7
PS1-4
49
–
+
ISET
17 ISET
16 SL_O
15 SL_M
TZC
39 FILO
DFCT
PCO
VCTL
V16M
38
37
36
TZC COMP.
SUB CODE
TM1
TES8 94
NC 95
OSC
PROCESSOR
VCC
TM6
VCC
TDFCT 50
TRACKING
VDD
96
35 VCKI
PHASE COMPENSATION
VCC
TG1
TM4
TM3
CLOCK
GENERATOR
VSS 97
NC 98
34 VPCO1
33 VPCO2
32 TES1
NC
99
+
–
TIMING
LOGIC
SERVO
AUTO
SEQUENCER
51
XRST 100
VC
CPU
INTERFACE
31
TES0
VCC
TM7
DIGITAL CLV
VEE
VCC
FOCUS
FS1
TM5
PHASE COMPENSATION
–
+
SL_P
14
FZC 52
+
–
1
2
4
5
8
12 13
3
6
11
14 15 16 17
21
22 23
24 25 26 27
7
9
10
18 19 20
28 29 30
VEE
VEE
TM2
+
–
FS2
DFCT
Charge
up
FSET
11
FZC COMP.
TG2
10
FS4
4
VEE
2
3
5
6
7
8
9
12
13
1
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7-8. IC PIN FUNCTION DESCRIPTION
• MAIN BOARD IC302 CXP84124-078Q (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Function
Sled limit in detect switch (SW1) input terminal
“L”: When the optical pick-up is inner position
1
LIM.SW
I
2
3
BUSON
EJECT
I
I
Bus on/off control signal input from the SONY bus interface (IC204) “H”: bus on
Eject switch (SW303) input terminal “H” active
Save end detect switch (SW12) input terminal
“L”: When completion of the disc chucking operation
4
5
LOAD1
LOAD2
I
I
Chucking end detect switch (SW11) input terminal
“L”: When completion of the disc chucking operation
6
7
A.MUTE
EMPH
O
O
Audio line muting on/off control signal output terminal “H”: muting on
Emphasis mode output to the D/A converter (IC401) “L”: emphasis on
Motor drive signal (save direction) output to the chucking motor drive (IC52)
“H” active *1
8
CH.R
O
Motor drive signal (load chucking direction) output to the chucking motor drive (IC52)
“H” active *1
9
CH.F
—
O
O
O
O
O
10
11
12
13
Not used (open)
Motor drive signal (elevator down direction) output to the elevator motor drive (IC301)
“L” active *2
ELV.R
ELV.ON
CD RST
Mechanism deck section power supply on/off control signal output “H”: power on
System reset signal output to the CXA1992AR (IC11), CXD2530Q (IC101) and SM5852FS
(IC102) “L”: reset
14
CDON
—
O
O
D/A converter and servo section power supply on/off control signal output “H”: power on
Not used (open)
15 to 23
Setting terminal for the automatic adjustment “L”: automatic adjustment, “H”: manual
adjustement (solder across the BP302 terminal) Normally: fixed at “L”
24
AUTO ON/OFF
—
I
25 to 29
O
Not used (open)
System reset signal input from the reset signal generator (IC202) and SONY bus interface
(IC204) “L”: reset
30
RESET
I
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
31
32
33
34
35
36
37
38
EXTAL
XTAL
VSS
I
O
—
O
I
Main system clock input terminal (8 MHz)
Main system clock output terminal (8 MHz)
Ground terminal
TX
Sub system clock output terminal Not used (open)
Sub system clock input terminal Not used (fixed at “L”)
Ground terminal (for A/D converter)
TEX
AVSS
AVREF
ATRIBT
—
I
Reference voltage (+5V) input terminal (for A/D converter)
Selection input of the custom file, D-BASS, etc.
I
Input of signal for the fine adjustment (linear position sensor adjustment; RV301) of elevator
position (A/D input)
39
MCK
I
40
41
EHS
H.TEMP
—
I
I
Elevator height position detect input from the RV302 (elevator height sensor) (A/D input)
High temperature sensor input terminal Not used (open)
Not used (open)
42
O
O
O
O
O
I
43
MODE1
MODE2
MODE3
—
D-BASS control signal output to the SM5852FS (IC102)
D-BASS control signal output to the SM5852FS (IC102)
D-BASS control signal output Not used (open)
Not used (open)
44
45
46, 47
48
SCK
Serial data transfer clock signal input from the SONY bus interface (IC204)
Serial data input from the SONY bus interface (IC204)
49
SI
I
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Pin No.
50
Pin Name
SO
I/O
O
O
I
Function
Serial data output to the SONY bus interface (IC204)
Subcode Q data reading clock signal output to the CXD2530Q (IC101)
Subcode Q data input from the CXD2530Q (IC101)
Not used (open)
51
SQCLK
SUBQ
—
52
53
O
I
54
—
Not used (fixed at “H”)
Magazine eject operation completion detect switch (SW301) input terminal
“L”: eject completed
55
MGLK
I
56
57
SCOR
I
I
Subcode sync (S0+S1) detection signal input from the CXD2530Q (IC101)
Internal status signal (sense signal) input from the CXA1992AR (IC11)
SENS2
Motor drive signal (elevator up direction) output to the elevator motor drive (IC301)
“L” active *2
58
PWM
O
59
60
61
62
63
64
65
66
67
—
O
I
Not used (open)
MAG.SW
BUCHECK
W.UP
Magazine in/out detect switch (SW302) input terminal “L”: magazine detected
Battery detection signal input terminal “H”: battery on
Bus on or eject switch (SW303) input terminal “H”: bus on or eject switch pushing
Track number count signal input from the CXA1992AR (IC11)
I
I
C.OUT
EEDATA
EECLK
EEINIT
—
I
I/O Two-way data bus with the EEPROM Not used (open)
O
I
Serial clock signal output to the EEPROM Not used (open)
Initialize signal input for the EEPROM “H”: format Fixed at “L” in this set
Not used (open)
O
Setting terminal for the single disc/multiple discs mode
“L”: single mode, “H”: multiple discs mode (fixed at “H”)
68
SINGLE
I
69
70
FOK
GFS
I
I
Focus OK signal input from the CXA1992AR (IC11) “L”: NG, “H”: OK
Guard frame sync signal input from the CXD2530Q (IC101) “L”: NG, “H”: OK
Internal status signal (sense signal) input from the CXD2530Q (IC101)
Power supply terminal (+5V)
71
SENS1
VDD
I
72
—
—
O
O
O
O
73
NC (VDD)
CDCLK
CDXLT
CDDATA
—
Connected to the power supply (+5V)
74
Serial data transfer clock signal output to the CXD2530Q (IC101)
Serial data latch pulse signal output to the CXD2530Q (IC101)
Serial data output to the CXD2530Q (IC101)
75
76
77 to 80
Not used (open)
*1 chucking motor (M103) control
Mode
LOAD
CHUCKING
STOP
SAVE
BRAKE
Terminal
CH.F (pin 9)
CH.R (pin 8)
“L”
“L”
“H”
“L”
“H”
“H”
“H”
“L”
*2 elevator motor (M104) control
Mode
ELEVATOR ELEVATOR
STOP
BRAKE
UP
“L”
“H”
DOWN
Terminal
PWM (pin %•)
ELV.R (pin !¡)
“H”
“H”
“H”
“L”
“L”
“L”
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