U S E R G U I D E
SYSTEM CONFIGURATION
for S900II robots
Software Version 1.0
WARNING - Reliance on this Manual Could Result in Severe Bodily Injury or Death!
This manual is out-of-date and is provided only for its technical information, data and capacities. Portions of this manual
detailing procedures or precautions in the operation, inspection, maintenance and repair of the product forming the subject
matter of this manual may be inadequate, inaccurate, and/or incomplete and cannot be used, followed, or relied upon.
Contact Conair at [email protected] or 1-800-654-6661 for more current information, warnings, and materials about
more recent product manuals containing warnings, information, precautions, and procedures that may be more adequate
than those contained in this out-of-date manual.
Corporate Office: 412.312.6000
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System Configuration
S900II
I – Memory
I – MEMOR
Y
I – 1. Accessing the memory
After accessing ”Memory Management” by pressing [Memo_M] (programming menu), pressing the
[M_Read] key gives access to the read (or modification) function of the user and system RAM or
EEPROM memory (at the address of the memory box by default if necessary).
The address of the area at which reading is to begin is given in hexadecimal (0 to F) using the numerical
keypad and the first row of alphanumerical keys of the keyboard.
Certain areas are directly accessible from the keyboard :
: beginning of the PRG editing area (0 x 006 430).
: beginning of the PLC editing area (0 x 009 430).
: beginning of the program storage in RAM area (0 x 00B 300).
: beginning of the MODULE where the programs are stored (0 x 800 000).
: transfer buffer PRG E17.
: robot serial number in RAM.
: RAM access password.
: beginning of parameters in RAM.
: beginning of the faults 200 to 204 message table in RAM.
For example : to access the beginning of the program storage area, the procedure is as follows :
[Memo_M] –> [M_Read] –> [Address] –>
*
The keys
:
" [ + ] or [ – ] to change addresses 2 by 2.
[ ]
[ ]
to change addresses 10 by 10 (hexadecimal).
"
or
" [PG DN] or [PG UP] to change addresses 100 by 100 (hexadecimal).
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System Configuration
S900II
I – Memory
* The function keys F1 to F5 :
" [Address]
" [Modif]
" [Search]
" [Print]
to change the address.
to change the contents of the memory area displayed (word).
to search for a particular word (e.g. : FA1B)
to print the memory contents from the displayed address (in order to search
for the incorrect instructions which will be printed as ????).
" [StopPr]
to stop sending the memory contents to the printer.
Note : T access the modification function, a password is necessary which remains valid as long as the
o
user does not exit the “M_Read” procedure. Certain critical system areas cannot be read and all requests
to modify them will be rejected.
By default, the value given after modification request is 0 x FFFF (useful to delete words in the
memory).
As for the other functions, the EXIT key is used to abandon a request or to exit the procedure.
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System Configuration
S900II
I – Memory
I – 2. Memory areas
I – 2. 1.Data saved in RAM (512 K x 8) 0 to 7 FFFF
Address in
Hexadecimal
00000
Contents
Variables used by Philips (BOOT)
027FF
02800
“Fixed” SEPRO variables, see table below for
details of the variables
0A4FF
0A500
SEPRO parameters in RAM
0B2FF
0B300
PRG storage area (128 K × 8)
2A6FF
2A700
SEPRO variables / work tables
Temporary transfer area (128 K x 8)
Piles and heaps used by the ERM kernel
37FFF
38000
57FFF
58000
7FFFF
02800 En Ordre = RAM contents correct indicator (GIRLAFRIDOU).
02810 Bit_U_S = System and user bits table.
02890 Bit_Tpo = PLC timer bits table.
028A0 Imag_S = Images of the 255 ON/OFF outputs.
029A0 Imag_E = Image of the 255 ON/OFF inputs.
02AA0 Word_U = User words table (16–bit WORD).
02AE0 Word_S = System words table (see Programming Level 2 manual for description).
02B20 Tpo_Aut = PLC timers table.
02B40 Compt = Counters table (standard and stacking).
04AA0 Pile_Def = Pile of historic faults.
04BC0 Comptime = Times basic counter.
04BC4 Dir_RAM = PRG / PLC directory in editing area.
04C04 Dir_PP = PRG directory in save area.
05254 Dir_PLC = PLC directory in save area.
05710 Mod_PP = PRG directory in the module.
05D60 Mod_PLC = PLC directory in the module.
0621C Tab_temps = Robot times table.
06230 WWord_U = Double words table (32 bits).
06430 Ram_PP = PRG editing area.
09430 Ram_PLC = PLC editing area.
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System Configuration
S900II
I – Memory
I – 2. 2.Program addressing in memory
The PRG and PLC programs are stored in the RAM memory, starting from the address 0xB300.
The maximum length of a PRG is 12286 bytes ; 4096 bytes for a PLC.
This area reserved for the permanent storage varies depending on the option 32 to 128 Kbytes.
So that it remains compatible with previous software versions, the RAM if formatted with 0xFFFF like
an EEPROM. This formatting is carried out when the robot is first started up (for the 128 Kbytes) or
when the memory is totally set to 0 [ RsMEM ] (on the size provided for in the options)
The parameters are stored in FLASHPROM at the address 0xF10E0000. An image of this address is
stored in RAM at the address 0xA500. The length of the parameters is fixed at 2800 bytes.
The “SAP message” file is stored in FLASHPROM at the address 0xF10E1200. Its length is fixed at
4590 bytes.
The programs, parameters and SAP messages are transferred via a temporary buffer of 12286 bytes
at the address 0x38000. (This buffer can be extended to 128 Kbytes).
I – 2. 3.Data in Flashprom (1 M x 8) F10 00000 to F10 FFFFF
Block
number
Address in
Hexadecimal
F10 00000
Contents
ERM kernel + SEPRO program
SEPRO code (1)
1st block
F10 0FFFF
F10 10000
F10 1FFFF
F10 20000
2nd block
3rd block
4th block
5th block
6th block
SEPRO code (2)
F10 3FFFF
F10 40000
SEPRO code (3)
F10 5FFFF
F10 60000
SEPRO code (4)
F10 7FFFF
F10 80000
SEPRO code (5)
F10 9FFFF
F10 A0000
Reserved for extension of SEPRO code
F10 BFFFF
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System Configuration
S900II
I – Memory
Block
number
Address in
Hexadecimal
F10 C0000
Contents
Messages in language 1
Messages in language 2
Font robot 1
F10 CEBEF
F10 CEBF0
F10 DD7DF
F10 DD7E0
F10 DE7EF
F10 DE7F0
Font robot 2
7th block
Messages
F10 DF7FF
F10 DF800
Code converter table IMM 1
Code converter table IMM 2
Code converter table Printer 1
Code converter table Printer 2
SEPRO parameters
F10 DF9FF
F10 DFA00
F10 DFBFF
F10 DFC00
F10 DFDFF
F10 DFE00
F10 DFFFF
F10 E0000
8th block
F10 E0DFF
F10 E1200
Parameters
and SAP
SAP messages
F10 E2256
F10 E2400
Reserved for SEPRO
F10 FFFFF
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System Configuration
S900II
I – Memory
I – 3. Specific information
These are directly accessed using the Memory Read function followed by the request [Address] and
a letter :
–
–
to access the memory area containing the passwords.
to access the memory area containing the serial number and the type of robot.
15
0
B2A0
B2A2
Password to access edition (....)
Password to access parameters (....)
Password to access maintenance (....)
Password to block the modes (....)
00
00
00
04
00
00
00
00
00
00
00
D2
00
00
00
00
00
00
B2A4
B2A6
B2A8
B2AA
B2AC
B2AE
B2B0
B2B4
Password to block the selection of the PRG N° to be
executed (....)
00
00
B2E0
B2E2
B2E4
B2E6
Operating time.
Operating time in automatic.
B2E8
B2EA
B2EC
B2EE
00 00
04 00
00 35
73 98
Robot serial number :
E.g. 1024
Robot type :
E.g. 350 BB (000) –> 3503000–D –> 357398–H
Model
Type Specific
0 BX
1 BY
2 BZ
3 BB
4 BC
5 AX
6 AY
7 AZ
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System Configuration
S900II
II – Instruction codes
II – INSTRUCTION CODES
II – 1. Part programs
Type
Display
Codop (hexadecimal)
Examples
of Instruction
ACTION
OUTPUT
ACT 00 (to 99) *
A000 [oper. 16 bits] A000000C = ACT12
Action No.
OUT 000 (to 255) * A001 [oper. 16 bits] A0010050 = OUT080
Output No.
INPUT
Normal
IN 000 (to 255)
IN/000 (to 255)
TIME 001 to 999
A002 [oper. 16 bits] A002000A = IN010
Input No.
INPUT
Reverse
A003 [oper. 16 bits] A0030020 = IN/032
Input No.
TIMER
A004[oper.4bits]0[oper.11bits] A004000A = TIME010
A004300A = TIME010
SAP marker
No.
V
alue
Marker P03
in 1/10s
TIME W_00 à 15
BIT 000 (to 127)
A004 0000 1 [oper.11bits]
A004080A = TIMEW10
A004080F = TIMEW15
Word No.
BIT
A005 [oper. 16 bits] A0050063 = BIT 99
Bit No.
/ BIT 000 (to 127) A006 [oper. 16 bits] A006007D = BIT 127
* The actions and outputs replaced by text (e.g.: part grip 1) keep the same CODOP
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System Configuration
S900II
II – Instruction codes
Type
Display
Codop (hexadecimal)
Examples
of Instruction
FUNCTIONS (FUNC)
SPEED
in % of the
parametered speed
VEL.X 001 to 100 B000[oper.4bits][oper.12bits] B0000062 = VEL.X 098
VEL.Y 001 to 100 B001[oper.4bits][oper.12bits] B001000A = VEL.Y 010
VEL.Z 001 to 100 B002[oper.4bits][oper.12bits] B0020012 = VEL.Z 018
VEL.B 001 to 100 B003[oper.4bits][oper.12bits] B0030064 = VEL.B 100
VEL.C 001 to 100 B004[oper.4bits][oper.12bits] B004A032 = VEL.C 050
Marker P10
SAP marker
Value in
N°
1/10s
VEL.X WW_*nn
VEL.Y WW_*nn
VEL.Z WW_*nn
VEL.B WW_*nn
VEL.C WW_*nn
B050 0000 [oper.12bits]
B051 0000 [oper.12bits]
B052 0000 [oper.12bits]
B053 0000 [oper.12bits]
B054 0000 [oper.12bits]
B0500042 = VEL.X
B0510043 = VEL.Y
B0520042 = VEL.Z
B0530042 = VEL.B
B0540043 = VEL.C
WW066
WW067
WW066
WW066
WW067
*(nn = 00 to 55
Word No.
and 66 to 67)
ACCELERATION
ACC.X 001 to 100 B010 [oper. 16 bits] B010000F = ACC.X 015
in % of the parametered ACC.Y 001 to 100 B011 [oper. 16 bits] B0110064 = ACC.Y 100
acceleration
ACC.Z 001 to 100 B012 [oper. 16 bits] B0120044 = ACC.Z 068
ACC.B 001 to 100 B013 [oper. 16 bits] B0130005 = ACC.B 005
ACC.C 001 to 100 B014 [oper. 16 bits] B0140032 = ACC.C 050
Value in %
Master MOVEMENT
MASTER.X
MASTER.Y
MASTER.Z
MASTER.B
MASTER.C
B030
B031
B032
B033
B034
IMPRECISION
IMP.X
IMP.Y
IMP.Z
IMP.B
IMP.C
B040
B041
B042
B043
B044
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System Configuration
S900II
II – Instruction codes
Type
of Instruction
Display
Codop (hexadecimal)
Examples
MOTORIZED
MOTIONS
SLOW APPROACH
in % of the maximum
parametered speed
SLA.X 001 to 100 B020 [oper. 16 bits] B0200026 = SLA.X 026
SLA.Y 001 to 100 B021 [oper. 16 bits] B0210034 = SLA.Y 034
SLA.Z 001 to 100 B022 [oper. 16 bits] B0220090 = SLA.Z 090
SLA.B 001 to 100 B023 [oper. 16 bits] B0230100 = SLA.B 100
SLA.C 001 to 100 B024 [oper. 16 bits] B0240010 = SLA.C 010
Value in %
LINEAR
ABSOLUTE
(Numerical operands)
X.ABS_L distance C000[oper.8bits][oper.24bits] C00000000664=X.ABS.L00163.6
Y.ABS_L distance C001[oper.8bits][oper.24bits] C001000F423F=Y.ABS.L99999.9
Z.ABS_L distance C002[oper.8bits][oper.24bits] C00200000320=Z.ABS.L00080.0
B.ABS_L distance C003[oper.8bits][oper.24bits] C0030000003F=B.ABS.L00006.3
C.ABS_L distance C004[oper.8bits][oper.24bits] C0040000050C=C.ABS.L00150.0
STACKING
RELATIVE
CHECKING
X.STK_L distance C010[oper.8bits][oper.24bits] C01000008ACF=X.STK.L03453.5
Y.STK_L distance C011[oper.8bits][oper.24bits] C01100030DE3=Y.STK.L20016.3
Z.STK_L distance C012[oper.8bits][oper.24bits] C01200000159=Z.STK.L00034.5
B.STK_L distance C053
C.STK_L distance C054
Reserved for general STKs
Absolute distances from the header
X.REL_L distance C020[oper.8bits][oper.24bits] C020800000A0=X.REL.L–0016.0
Y.REL_L distance C021[oper.8bits][oper.24bits] C021000000A0=Y.REL.L–0016.0
Z.REL_L distance C022[oper.8bits][oper.24bits] C0228001869F=Z.REL.L–9999.9
B.REL_L distance C023[oper.8bits][oper.24bits] C02300002706=B.REL.L+0999.9
C.REL_L distance C024[oper.8bits][oper.24bits] C0240000000A=C.REL.L+0001.0
X.CTL_L distance C030[oper.8bits][oper.24bits] C03000000664=X.CTL.L00163.6
Y.CTL_L distance C031[oper.8bits][oper.24bits] C031000F423F=Y.CTL.L9999.9
Z.CTL_L distance C032[oper.8bits][oper.24bits] C03200000320=Z.CTL.L00080.0
B.CTL_L distance C033[oper.8bits][oper.24bits] C0330000003F=B.CTL.L00006.3
C.CTL_L distance C034[oper.8bits][oper.24bits] C0340500050C=C.CTL.L00150.0
Marker P05
SAP marker No.
Distance in 1/10 mm
ROTATING
ABSOLUTE
(Numerical operands)
X.ABS_R Angle
Y.ABS_R Angle
Z.ABS_R Angle
B.ABS_R Angle
C.ABS_R Angle
C100[oper.8bits][oper.24bits] C10000000664=X.ABS.R00163.6
C101[oper.8bits][oper.24bits] C101000005DC=Y.ABS.R00150.0
C102[oper.8bits][oper.24bits] C10200000320=Z.ABS.R00080.0
C103[oper.8bits][oper.24bits] C1030000003F=B.ABS.R00006.3
C104[oper.8bits][oper.24bits] C10400000159=C.ABS.R00034.5
STACKING
RELATIVE
X.STK_R Angle
Y.STK_R Angle
Z.STK_R Angle
C110[oper.8bits][oper.24bits] C11000008ACF=X.STK.R03453.5
C111[oper.8bits][oper.24bits] C11100030DE3=Y.STK.R20016.3
C112[oper.8bits][oper.24bits] C11200000159=Z.STK.R00034.5
X.REL_R Angle
Y.REL_R Angle
Z.REL_R Angle
B.REL_R Angle
C120[oper.8bits][oper.24bits] C12000000384=X.REL.R+90.0
C121[oper.8bits][oper.24bits] C12180000320=Y.REL.R–90.0
C122[oper.8bits][oper.24bits] C12200000320=Z.REL.R+80.0
C123[oper.8bits][oper.24bits] C12380000159=B.REL.R–34.5
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C.REL_R Angle
C124[oper.8bits][oper.24bits] C1240000003F=C.REL.R+06.3
System Configuration
S900II
II – Instruction codes
Type
Display
Codop (hexadecimal) Examples
of Instruction
CHECKING
X.CTL_R Angle
Y.CTL_R Angle
Z.CTL_R Angle
B.CTL_R Angle
C.CTL_R Angle
C130[oper.8bits][oper.24bits] C13000000664=X.CTL.R00163.6
C131[oper.8bits][oper.24bits] C131000F423F=Y.CTL.R9999.9
C132[oper.8bits][oper.24bits] C13200000320=Z.CTL.R00080.0
C133[oper.8bits][oper.24bits] C1330000003F=B.CTL.R00006.3
C134[oper.8bits][oper.24bits] C1340000050C=C.CTL.R00150.0
Angle in
1/10 deg.
SAP Marker No.
TEACHING
Teach
C
[oper.8bits]AAAAAA C01000AAAAAA=X.STK.LTeach
C10200AAAAAA=Z.ABS.RTeach
Previous instruction
Instruction code
SAP marker No.
MOTORIZED
MOTIONS (cont’d)
LINEAR
ABSOLUTE
(Words)
X.ABS_L WW *nn
Y.ABS_L WW *nn
Z.ABS_L WW *nn
B.ABS_L WW *nn
C.ABS_L WW *nn
C200 [oper. 16 bits]
C201 [oper. 16 bits]
C202 [oper. 16 bits]
C203 [oper. 16 bits]
C204 [oper. 16 bits]
C200000A = X.ABS.L WW10
STACKING
RELATIVE
X.STK_L WW *nn
Y.STK_L WW *nn
Z.STK_L WW *nn
C210 [oper. 16 bits]
C211 [oper. 16 bits]
C212 [oper. 16 bits]
C210000B = X.STK.L WW11
C2200041 = X.REL.L WW65
X.REL_L WW *nn
Y.REL_L WW *nn
Z.REL_L WW *nn
B.REL_L WW *nn
C.REL_L WW *nn
C220 [oper. 16 bits]
C221 [oper. 16 bits]
C222 [oper. 16 bits]
C223 [oper. 16 bits]
C224 [oper. 16 bits]
CHECKING
ROTATING
X.CTL_L WW *nn
Y.CTL_L WW *nn
Z.CTL_L WW *nn
B.CTL_L WW *nn
C.CTL_L WW *nn
C230 [oper. 16 bits]
C231 [oper. 16 bits]
C232 [oper. 16 bits]
C233 [oper. 16 bits]
C234 [oper. 16 bits]
C2300010 = X.CTL.L WW16
ABSOLUTE
(Words)
X.ABS_R WW *nn
Y.ABS_R WW *nn
Z.ABS_R WW *nn
B.ABS_R WW *nn
C.ABS_R WW *nn
C300 [oper. 16 bits]
C301 [oper. 16 bits]
C302 [oper. 16 bits]
C303 [oper. 16 bits]
C304 [oper. 16 bits]
C300000A = X.ABS.R WW10
C3100020 = X.STK.R WW32
STACKING
X.STK_R WW *nn
Y.STK_R WW *nn
Z.STK_R WW *nn
C310 [oper. 16 bits]
C311 [oper. 16 bits]
C312 [oper. 16 bits]
*(nn = 00 to 55 and 64 to 65)
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System Configuration
S900II
II – Instruction codes
Type
Display
Codop (hexadecimal)
Examples
of Instruction
RELATIVE
X.REL_R WW *nn
Y.REL_R WW *nn
Z.REL_R WW *nn
B.REL_R WW *nn
C.REL_R WW *nn
C320 [oper. 16 bits]
C321 [oper. 16 bits]
C322 [oper. 16 bits]
C323 [oper. 16 bits]
C324 [oper. 16 bits]
C3200001 = X.REL.R WW01
CHECKING
X.CTL_R WW *nn
Y.CTL_R WW *nn
Z.CTL_R WW *nn
B.CTL_R WW *nn
C.CTL_R WW *nn
*(nn = 00 to 55 and 64 to 65)
C330 [oper. 16 bits]
C331 [oper. 16 bits]
C332 [oper. 16 bits]
C333 [oper. 16 bits]
C334 [oper. 16 bits]
C3300041 = X.CTL.R WW65
WWORD No.
FREE
LINE
X. FREE
Y. FREE
Z. FREE
B. FREE
C. FREE
C040
C041
C042
C043
C044
LIN.
B046
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System Configuration
S900II
II – Instruction codes
Type
Display
Codop (hexadecimal)
Examples
of Instruction
LINEAR
POS_ANA
X = POS ANA + distance
Y = POS ANA + distance
Z = POS ANA + distance
B = POS ANA + distance
C = POS ANA + distance
C060 [oper. 32 bits]
C061 [oper. 32 bits]
C062 [oper. 32 bits]
C063 [oper. 32 bits]
C064 [oper. 32 bits]
POS_NUM
X = POS NUM + distance
Y = POS NUM + distance
Z = POS NUM + distance
B = POS NUM + distance
C = POS NUM + distance
C070 [oper. 32 bits]
C071 [oper. 32 bits]
C072 [oper. 32 bits]
C073 [oper. 32 bits]
C074 [oper. 32 bits]
VEL ANA NORMAL
X = VEL ANA_N + distance C080 [oper. 32 bits]
Y = VEL ANA_N + distance C081 [oper. 32 bits]
Z = VEL ANA_N + distance C082 [oper. 32 bits]
B = VEL ANA_N + distance C083 [oper. 32 bits]
C = VEL ANA_N + distance C084 [oper. 32 bits]
VEL ANA INTEGRAL X = VEL ANA_I + distance
Y = VEL ANA_I + distance
C090 [oper. 32 bits]
C091 [oper. 32 bits]
C092 [oper. 32 bits]
C093 [oper. 32 bits]
C094 [oper. 32 bits]
Z = VEL ANA_I + distance
B = VEL ANA_I + distance
C = VEL ANA_I + distance
VEL NUM NORMAL
X = VEL NUM_N + distance C0A0[oper. 32 bits]
Y = VEL NUM_N + distance C0A1 [oper. 32 bits]
Z = VEL NUM_N + distance C0A2 [oper. 32 bits]
B = VEL NUM_N + distance C0A3 [oper. 32 bits]
C = VEL NUM_N + distance C0A4 [oper. 32 bits]
VEL NUM INTEGRAL X = VEL NUM_I + distance C0B0[oper. 32 bits]
Y = VEL NUM_I + distance C0B1 [oper. 32 bits]
Z = VEL NUM_I + distance
B = VEL NUM_I + distance
C = VEL NUM_I + distance
C0B2 [oper. 32 bits]
C0B3 [oper. 32 bits]
C0B4 [oper. 32 bits]
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System Configuration
S900II
II – Instruction codes
Type
Display
Codop (hexadecimal)
Examples
of Instruction
ROTATING
POS_ANA
X = POS ANA + angle
Y = POS ANA + angle
Z = POS ANA + angle
B = POS ANA + angle
C = POS ANA + angle
C160 [oper. 32 bits]
C161 [oper. 32 bits]
C162 [oper. 32 bits]
C163 [oper. 32 bits]
C164 [oper. 32 bits]
POS_NUM
X = POS NUM + angle
Y = POS NUM + angle
Z = POS NUM + angle
B = POS NUM + angle
C = POS NUM + angle
C170 [oper. 32 bits]
C171 [oper. 32 bits]
C172 [oper. 32 bits]
C173 [oper. 32 bits]
C174 [oper. 32 bits]
VEL ANA NORMAL
X = VEL ANA_N + angle
Y = VEL ANA_N + angle
Z = VEL ANA_N + angle
B = VEL ANA_N + angle
C = VEL ANA_N + angle
C180 [oper. 32 bits]
C181 [oper. 32 bits]
C182 [oper. 32 bits]
C183 [oper. 32 bits]
C184 [oper. 32 bits]
VEL ANA INTEGRAL X = VEL ANA_I + angle
Y = VEL ANA_I + angle
C190 [oper. 32 bits]
C191 [oper. 32 bits]
C192 [oper. 32 bits]
C193 [oper. 32 bits]
C194 [oper. 32 bits]
Z = VEL ANA_I + angle
B = VEL ANA_I + angle
C = VEL ANA_I + angle
VEL NUM NORMAL
X = VEL NUM_N + angle
Y = VEL NUM_N + angle
Z = VEL NUM_N + angle
B = VEL NUM_N + angle
C = VEL NUM_N + angle
C1A0[oper. 32 bits]
C1A1 [oper. 32 bits]
C1A2 [oper. 32 bits]
C1A3 [oper. 32 bits]
C1A4 [oper. 32 bits]
VEL NUM INTEGRAL X = VEL NUM_I + angle
Y = VEL NUM_I + angle
C1B0[oper. 32 bits]
C1B1 [oper. 32 bits]
C1B2 [oper. 32 bits]
C1B3 [oper. 32 bits]
C1B4 [oper. 32 bits]
Z = VEL NUM_I + angle
B = VEL NUM_I + angle
C = VEL NUM_I + angle
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System Configuration
S900II
II – Instruction codes
Type
Display
Codop (hexadecimal) Examples
of Instruction
TEST, CONDITIONS
. 1 Operand
on Bit
IF BIT 000 (to 127)
IF/BIT 000 (to 127)
IF OUT 000 (to 255)
IF/OUT 000 (to 255)
IF IN/000 (to 255)
IF IN 000 (to 255)
IF/IN 000 (to 255)
IF TIM 00 (to 15)
IF/TIM 00 (to 15)
D000 [oper. 16 bits]
D010 [oper. 16 bits]
D001 [oper. 16 bits]
D011 [oper. 16 bits]
D002 [oper. 16 bits]
D003 [oper. 16 bits]
D013 [oper. 16 bits]
D004 [oper. 16 bits]
D014 [oper. 16 bits]
on Output
on Input
on Timer
Operand No.
. 2 Operands
* on Word (16 bits)
–> 1st Operand
IF WRD 000 (to 4095)
IF/WRD 000 (to 4095)
D300 [oper. 16 bits]
D310 [oper. 16 bits]
with decimal value
= 0000 (to 9999)
D400 [oper. 16 bits]
D401 [oper. 16 bits]
D402 [oper. 16 bits]
D403 [oper. 16 bits]
> = 0000 (to 9999)
< = 0000 (to 9999)
AND 0000 (to 9999)
Note : If the decimal
value cannot exceed
9,999, the hexadecimal
value goes up to 65,535.
with hexadecimal value = 0000 (to FFFF)
> = 0000 (to FFFF)
D410 [oper. 16 bits]
D411 [oper. 16 bits]
D412 [oper. 16 bits]
D413 [oper. 16 bits]
< = 0000 (to FFFF)
AND 0000 (to FFFF)
with Counter
= CNT 00 (to 15)
D420 [oper. 16 bits]
D421 [oper. 16 bits]
D422 [oper. 16 bits]
D423 [oper. 16 bits]
> = CNT 00 (to 15)
< =CNT 00 (to 15)
AND CNT 00 (to 15)
with Inputs (modulo 16) =IN 000 (to 112)
> =IN 000 (to 112)
D430 [oper. 16 bits]
D431 [oper. 16 bits]
D432 [oper. 16 bits]
D433 [oper. 16 bits]
< =IN 000 (to 112)
AND IN 000 (to 112)
with Word (16 bits)
= WRD 0000 (to 4095)
D440 [oper. 16 bits]
> = WRD 0000 (to 4095) D441 [oper. 16 bits]
< = WRD 0000 (to 4095) D442 [oper. 16 bits]
AND WRD 0000(to 4095) D443 [oper. 16 bits]
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System Configuration
S900II
II – Instruction codes
Type
Display
Codop (hexadecimal) Examples
of Instruction
* on WWord (32 bits)
IF WWRD 000 (to 127) D320 [oper. 16 bits]
–> 1st Operand
IF/WWRD 000 (to 127) D330 [oper. 16 bits]
with decimal value
= 00000000 (to 09999999)
D500 [oper. 32 bits]
> = 00000000 (to 09999999) D501 [oper. 32 bits]
< = 00000000 (to 09999999) D502 [oper. 32 bits]
AND 00000000 (to 09999999) D503 [oper. 32 bits]
Note : If the decimal
value cannot exceed
9,999,999, the hexadeci
-
with hexadecimal value
with Counter
=
00000000 (to FFFFFFFF)
D510 [oper. 32 bits]
mal value goes up to
4,294,967,295.
> = 00000000 (to FFFFFFFF) D511 [oper. 32 bits]
< = 00000000 (to FFFFFFFF) D512 [oper. 32 bits]
AND00000000 (to FFFFFFFF) D513 [oper. 32 bits]
= CNT 00 (to 15)
D520 [oper. 16 bits]
D521 [oper. 16 bits]
D522 [oper. 16 bits]
D523 [oper. 16 bits]
> = CNT 00 (to 15)
< = CNT 00 (to 15)
AND CNT 00 (to 15)
with Inputs (modulo 16) = IN 000 (to 112)
> = IN 000 (to 112)
D530 [oper. 16 bits]
D531 [oper. 16 bits]
D532 [oper. 16 bits]
D533 [oper. 16 bits]
< = IN 000 (to 112)
AND IN 000 (to 112)
with Word (16 bits)
= WRD 0000 (to 4095)
D540 [oper. 16 bits]
> = WRD 0000 (to 4095) D541 [oper. 16 bits]
< = WRD 0000 (to 4095) D542 [oper. 16 bits]
AND WRD 0000(to 4095) D543 [oper. 16 bits]
with WWord (32 bits)
= WWRD 000 (to 127)
D550 [oper. 16 bits]
> = WWRD 000 (to 127) D551 [oper. 16 bits]
< = WWRD 000 (to 127) D552 [oper. 16 bits]
AND WWRD 000(to 127) D553 [oper. 16 bits]
* on Counter
–> 1st Operand
IF CNT 00 (to 15)
IF/CNT 00 (to 15)
D340 [oper. 16 bits]
D350 [oper. 16 bits]
with decimal value
= 0000 (to 9999)
D900 [oper. 16 bits]
D901 [oper. 16 bits]
D902 [oper. 16 bits]
D903 [oper. 16 bits]
> = 0000 (to 9999)
< = 0000 (to 9999)
AND 0000 (to 9999)
with hexadecimal value = 0000 (to FFFF)
> = 0000 (to FFFF)
D910 [oper. 16 bits]
D911 [oper. 16 bits]
D912 [oper. 16 bits]
D913 [oper. 16 bits]
< = 0000 (to FFFF)
AND 0000 (to FFFF)
with Counter
= CNT 00 (to 15)
> = CNT 00 (to 15)
< = CNT 00 (to 15)
D920 [oper. 16 bits]
D921 [oper. 16 bits]
D922 [oper. 16 bits]
AND CNT 00 (to 15)
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System Configuration
S900II
II – Instruction codes
Type
Display
Codop (hexadecimal)
Examples
of Instruction
with Inputs (modulo 16) = IN 000 (to 112)
> = IN 000 (to 112)
D930 [oper. 16 bits]
D931 [oper. 16 bits]
D932 [oper. 16 bits]
D933 [oper. 16 bits]
< = IN 000 (to 112)
AND IN 000 (to 112)
with Word (16 bits)
= WRD 0000 (to 4095)
D940 [oper. 16 bits]
> = WRD 0000 (to 4095) D941 [oper. 16 bits]
< = WRD 0000 (to 4095) D942 [oper. 16 bits]
AND WRD 0000(to 4095) D943 [oper. 16 bits]
INITIALIZATION
. 1 Operand
* on Bit –> 1
on Bit –> 0
SET.BIT 032 (to 127)
RST.BIT 032 (to 127)
D015 [oper. 16 bits]
D017 [oper. 16 bits]
* on Output –> 1
on Output –> 0
SET.OUT 000 (to 127)
RST.OUT 000 (to 127)
D016 [oper. 16 bits]
D018 [oper. 16 bits]
* on Word –> 0
RST.WRD 0000 (to 4095) D019 [oper. 16 bits]
Variable number
* on WWord –> 0
* on Counter –> 0
RST.WWRD 00 (to 63)
D01D [oper. 16 bits]
Variable number
RST.CNT 0000 (to 0015) D01A 00 [oper. 8 bits]
Counter number
RST.CNT 0041 (to 9980) D01A[oper. 8 bits] [oper. 8 bits]
PRG No. SP No.
. 2 Operands
* on Word (16 bits)
–> 1st Operand
SET.WRD 0000 (to 4095) D600 [oper. 16 bits]
with decimal value
= 0000 (to 9999)
+ 0000 (to 9999)
– 0000 (to 9999)
x 0000 (to 9999)
/ 0000 (to 9999)
AND 0000 (to 9999)
OR 0000 (to 9999)
D700 [oper. 16 bits]
D701 [oper. 16 bits]
D702 [oper. 16 bits]
D703 [oper. 16 bits]
D704 [oper. 16 bits]
D705 [oper. 16 bits]
D706 [oper. 16 bits]
with hexadecimal value = 0000 (to FFFF)
+ 0000 (to FFFF)
D710 [oper. 16 bits]
D711 [oper. 16 bits]
D712 [oper. 16 bits]
D713 [oper. 16 bits]
D714 [oper. 16 bits]
D715 [oper. 16 bits]
D716 [oper. 16 bits]
– 0000 (to FFFF)
x 0000 (to FFFF)
/ 0000 (to FFFF)
AND 0000 (to FFFF)
OR 0000 (to FFFF)
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System Configuration
S900II
II – Instruction codes
Type
Display
Codop (hexadecimal)
Examples
of Instruction
with Counter
= CNT 00 (to 15)
+ CNT 00 (to 15)
– CNT 00 (to 15)
x CNT 00 (to 15)
/ CNT00 (to 15)
AND CNT 00 (to 15)
OR CNT 00 (to 15)
D720 [oper. 16 bits]
D721 [oper. 16 bits]
D722 [oper. 16 bits]
D723 [oper. 16 bits]
D724 [oper. 16 bits]
D725 [oper. 16 bits]
D726 [oper. 16 bits]
with Inputs (modulo 16) = IN 000 (to 112)
+ IN 000 (to 112)
D730 [oper. 16 bits]
D731 [oper. 16 bits]
D732 [oper. 16 bits]
D733 [oper. 16 bits]
D734 [oper. 16 bits]
D735 [oper. 16 bits]
D736 [oper. 16 bits]
– IN 000 (to 112)
x IN 000 (to 112)
/ IN 000 (to 112)
AND IN 000 (to 112)
OR IN 000 (to 112)
with Word (16 bits)
= WRD 0000 (to 4095)
+ WRD 0000 (to 4095)
– WRD 0000 (to 4095)
x WRD 0000 (to 4095)
/ WRD 0000 (to 4095)
D740 [oper. 16 bits]
D741 [oper. 16 bits]
D742 [oper. 16 bits]
D743 [oper. 16 bits]
D744 [oper. 16 bits]
AND WRD 0000 (to 4095)D745 [oper. 16 bits]
OR WRD 0000 (to 4095) D746 [oper. 16 bits]
* on WWord (32 bits)
–> 1st Operand
SET.WWRD 000 (to 127) D620 [oper. 16 bits]
with decimal value
= 00000000 (to 09999999)
+ 00000000 (to 09999999)
– 00000000 (to 09999999)
x 00000000 (to 09999999)
/ 00000000 (to 09999999)
D800 [oper. 32 bits]
D801 [oper. 32 bits]
D802 [oper. 32 bits]
D803 [oper. 32 bits]
D804 [oper. 32 bits]
AND 00000000 (to 09999999) D805 [oper. 32 bits]
OR 00000000 (to 09999999) D806 [oper. 32 bits]
with hexadecimal value = 00000000 (to FFFFFFFF)
+ 00000000 (to FFFFFFFF)
D810 [oper. 32 bits]
D811 [oper. 32 bits]
D812 [oper. 32 bits]
D813 [oper. 32 bits]
D814 [oper. 32 bits]
– 00000000 (to FFFFFFFF)
x 00000000 (to FFFFFFFF)
/ 00000000 (to FFFFFFFF)
AND 00000000 (to FFFFFFFF)D815 [oper. 32 bits]
OR 00000000 (to FFFFFFFF) D816 [oper. 32 bits]
with Counter
= CNT 00 (to 15)
+ CNT 00 (to 15)
– CNT 00 (to 15)
x CNT 00 (to 15)
/ CNT 00 (to 15)
AND CNT 00 (to 15)
OR CNT 00 (to 15)
D820 [oper. 16 bits]
D821 [oper. 16 bits]
D822 [oper. 16 bits]
D823 [oper. 16 bits]
D824 [oper. 16 bits]
D825 [oper. 16 bits]
D826 [oper. 16 bits]
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System Configuration
S900II
II – Instruction codes
Type
Display
Codop (hexadecimal)
Examples
of Instruction
with Inputs (modulo 16) = IN *nn
D830 [oper. 16 bits]
D831 [oper. 16 bits]
D832 [oper. 16 bits]
D833 [oper. 16 bits]
D834 [oper. 16 bits]
D835 [oper. 16 bits]
D836 [oper. 16 bits]
+ IN *nn
– IN *nn
*nn = 00 to 112
and 136 to 240
x IN *nn
/ IN *nn
AND IN *nn
OR IN *nn
with Word (16 bits)
= WRD 0000 (to 4095)
+ WRD 0000 (to 4095)
– WRD 0000 (to 4095)
x WRD 0000 (to 4095)
/ WRD 0000 (to 4095)
D840 [oper. 16 bits]
D841 [oper. 16 bits]
D842 [oper. 16 bits]
D843 [oper. 16 bits]
D844 [oper. 16 bits]
AND WRD 0000 (to 4095) D845 [oper. 16 bits]
OR WRD 0000 (to 4095) D846 [oper. 16 bits]
with WWord (32 bits)
= WWRD *nn and 200–202 D850 [oper. 16 bits]
+ WWRD *nn
– WWRD *nn
x WWRD *nn
/ WWRD *nn
AND WWRD*nn
OR WWRD *nn
D851 [oper. 16 bits]
D852 [oper. 16 bits]
D853 [oper. 16 bits]
D854 [oper. 16 bits]
D855 [oper. 16 bits]
D856 [oper. 16 bits]
*nn = 0 to 127
* on Counter
SET.CNT 0000 (to 0015) D640 [oper. 8 bits]
Standard counter
–> 1st Operand
SET.CNT 0041 (to 9980) D640[oper. 8 bits] [oper. 8 bits] Stacking counter
PRG No. SP No.
with decimal value
= 0000 (to 9999)
+ 0000 (to 9999)
– 0000 (to 9999)
x 0000 (to 9999)
/ 0000 (to 9999)
AND 0000 (to 9999)
OR 0000 (to 9999)
DA00 [oper. 16 bits]
DA01 [oper. 16 bits]
DA02 [oper. 16 bits]
DA03 [oper. 16 bits]
DA04 [oper. 16 bits]
DA05 [oper. 16 bits]
DA06 [oper. 16 bits]
with hexadecimal value = 0000 (to FFFF)
+ 0000 (to FFFF)
DA10 [oper. 16 bits]
DA11 [oper. 16 bits]
DA12 [oper. 16 bits]
DA13 [oper. 16 bits]
DA14 [oper. 16 bits]
DA15 [oper. 16 bits]
DA16 [oper. 16 bits]
– 0000 (to FFFF)
x 0000 (to FFFF)
/ 0000 (to FFFF)
AND 0000 (to FFFF)
OR 0000 (to FFFF)
with Counter
= CNT 00 (to 15)
+ CNT 00 (to 15)
– CNT 00 (to 15)
x CNT 00 (to 15)
/ CNT 00 (to 15)
AND CNT 00 (to 15)
D920 [oper. 16 bits]
D921 [oper. 16 bits]
D922 [oper. 16 bits]
D922 [oper. 16 bits]
D922 [oper. 16 bits]
D923 [oper. 16 bits]
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OR CNT 00 (to 15)
D923 [oper. 16 bits]
System Configuration
S900II
II – Instruction codes
Type
Display
Codop (hexadecimal)
Examples
of Instruction
with Inputs (modulo 16) = IN 000 (to 112)
+ IN 000 (to 112)
DA30 [oper. 16 bits]
DA31 [oper. 16 bits]
DA32 [oper. 16 bits]
DA33 [oper. 16 bits]
DA34 [oper. 16 bits]
DA35 [oper. 16 bits]
DA36 [oper. 16 bits]
– IN 000 (to 112)
x IN 000 (to 112)
/ IN 000 (to 112)
AND IN 000 (to 112)
OR IN 000 (to 112)
with Word (16 bits)
= WRD 0000 (to 4095)
+ WRD 0000 (to 4095)
– WRD0000 (to 4095)
x WRD 0000 (to 4095)
/ WRD 0000 (to 4095)
DA40 [oper. 16 bits]
DA41 [oper. 16 bits]
DA42 [oper. 16 bits]
DA43 [oper. 16 bits]
DA44 [oper. 16 bits]
AND WRD 0000 (to 4095)DA45 [oper. 16 bits]
OR WRD 0000 (to 4095) DA46 [oper. 16 bits]
–> + 1
–> – 1
INC.CNT 0000 (to 0015) D01B 00 [oper. 8 bits]
Standard No.
INC.CNT 0041 (to 9980) D01B[oper. 8 bits] [oper. 8 bits]
SP No.
PRG No.
DEC.CNT 0000 (to 0015) D01C 00 [oper. 8 bits]
Standard No.
DEC.CNT 0041 (to 9980) D01C[oper. 8 bits] [oper. 8 bits]
PRG No.
SP No.
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System Configuration
S900II
II – Instruction codes
II – 2. PLC programs
Type
Display
PLC xx
Codop (hexadecimal)
of Instruction
PROG.PLC xx header (num)
FC [oper. 16 bits]
PLC No.
TEST CONDITION
INITIALISATION
IF ...
See part programs
See part programs
SET ...
RST ...
INC ...
DEC ...
COMPARISON xxxx > = xxxx
TIMER xx VALUE xxxx
CMP 0000 (to 0015) VAL 0000 (to FFFF) D020 [oper. 16 bits] [oper. 16 bits]
0000 (to 0015)
Counter No.
Value
TIMER 00 (to 15) VAL 0000 (to 9999) D021 [oper. 16 bits] [oper. 16 bits]
Pre–selection No.
Timer No.
AND FUNCTION on BIT
AND FUNCTION on OUTPUT
AND FUNCTION on BIT
OR FUNCTION on OUTPUT
AND BIT 000 (to 127)
AND OUT 000 (to 127)
OR BIT 000 (to 127)
OR OUT 000 (to 127)
D022 [oper. 16 bits]
D023 [oper. 16 bits]
D024 [oper. 16 bits]
D025 [oper. 16 bits]
Variables No.
END OF PROGRAM
END
F5 [oper. 16 bits]
PLC No.
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System Configuration
S900II
III – Program codes
III – PROGRAM CODES
III – 1. Declaration of programs, subroutines and PLCs
" Header codes of PRG, SP,..., SR, PLC
G F9b xn
= Main program
G b = 0, standard PRG (encoded on 15 bits)
b = 1 , SAP PRG (encoded on 15 bits)
G FAnn
G FBnn
G FCnn
G FEnn
= STD, STK.. // subroutine (see stacking header)
= Return subroutine (see home return header)
= PLC program
= FREE
" STEP TRANSITION codes
G EC00 + Step number 0 to 999
G E.g. : EC12 => Step number 18 (decimal)
G E.g. : ED00 => Step number 256 (decimal)
" END of PRG, SP..., SR, PLC codes
G F0nn
G F1nn
G F2nn
G F3nn
G F4nn
G F8nn
G F5nn
G F7nn
= End of ”standard” SP nn.
= End of ”standard” stacking SP nn.
= End of ”general” stacking SP nn.
= End of SP // nn.
= End of simple or total SR nn.
= End of simple or total SR with return to step 0 of PRG 00.
= End of PLC nn.
= End of main program (PRG) nn.
" PRG architecture in the memory area
previous program
F9 nn
PRG (text)
F7 nn
FA xx
SP
SR
PRG nn
F1 xx
FB pp
F4 pp
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F9 mm
following PRG
System Configuration
S900II
III – Program codes
III – 2. Subroutine and program calls
" SPECIFIC codes for SP, SR, PLC as an instruction
G E000 [oper. 16 bits] :
Standard SP
SP nn Lmm (nn = 01 to 40) (mm = 00 to 99)
Regular Stacking SP SP nn D Lmm (or I Lmm) (nn = 41 to 60) (mm = 00 to 99)
General Stacking SP SP nn D Lmm (or I Lmm) (nn = 61 to 80) (mm = 00 to 99)
Parallel SP
SP nn L00 (nn = 81 to 99)
The operand contains :
. high order word –> the LABEL number
–> bit 0 x 8000 at 0 indicates DIRECT
–> bit 0 x 8000 at 1 indicates REVERSE
. low order word –> the SP number.
E.g. : E000 0103 –> SP 03 L01
E.g. : E000 8229 –> SP 41 I L02
G E100 [oper. 16 bits] : PLC prog. – Display : PLC 00 (to 99)
G E500 [oper. 16 bits] : Home Return – Display : SR 01 (to 99)
" Return label
G E600 [oper. 16 bits] : Labels ”L” for SP – Display : L00 to L99
G E700 [oper. 16 bits] : Labels ”R” for SR – Display : R00 to R99
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System Configuration
S900II
IV – Variable addressing
IV – VARIABLE ADDRESSING
IV – 1. Output – OUT –
Accessible in read and write.
Number
(logical address)
Physical
address
Structures / Functions
not used
OUT 000
OUT 255
28A0
299F
2 A1D
Forcing
(Extended monitor)
OUT 125
Continuous status
(See Param. No 14)
IV – 2. Input – IN –
Accessible in read.
Number
(logical address)
Physical
address
Structures / Functions
not used
IN 000
29A0
2A9F
2 9AB
IN 255
IN 01
1
IV – 3. User and system bits – BIT –
Each address corresponds to an 8 bit structure in memory.
not used
0281x
Forcing
(Extended monitor)
BIT 0
x = bit number in hexadecimal (e.g.: Bit 31, address = 0282F).
Only the low order word is used.
– System bits accessible in Read – No. 0 to 30.
– System bits accessible in Read and Write – No. 31 to 33.
– User bits accessible in Read and Write – No. 34 to 127.
For the definition of these bits, see the Programming Level 2 manual, paragraph I3.
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System Configuration
S900II
IV – Variable addressing
IV – 4. 16 bits user and system words – WRD –
Number
(logical address)
Physical
address
Structures / Functions
32 user Words (read/write) with no predefined functions.
WRD 0000
2AA0
B15
0
WRD 0031
WRD 0032
2ADF
2AE0
16 bit structure available
32 system Words (read only). For the definition of these
words, see the Programming Level 2 manual, paragraph
I4
WRD 0063
WRD 0064
2B1E
2B20
16 user Words (read/write) supporting the PLC timers
(TIM 00 to TIM 15).
WRD 0079
WRD 0080
2B3F
2B40
16 user Words (read/write) supporting the standard
counters (CNT 00 to CNT 15).
WRD 0095
WRD 0096
2B5F
2B60
4000 user Words (read/write) supporting the stacking
subroutine counters (CNT 0041 to CNT 9980).
WRD 4096
3A9F
IV – 5. 32 bit user and system words – WWRD –
Number
(logical address)
Physical
address
Structures / Functions
64 user Words (read/write) with no predefined functions.
WWRD 000
6230
b31
0
WWRD 063
WWRD 064
6327
6328
32 bit structure available
64 system Words (read only). For the definition of these
words, see the Programming Level 2 manual, paragraph
I5
WWRD 127
642C
Specific words
WWRD 0116
WWRD 0117
6400
6404
Values for calculating the automatic anticipated restart.
Values for calculating the automatic anticipated restart.
See chapter VI – page 28.
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System Configuration
S900II
IV – Variable addressing
IV – 6. Counters
Each address corresponds to a 16 bit structure in the memory.
WRD0088
b15
b0
2 B4x
CNT0008
. values from 0000 to 9999 in decimal
. values from 0000 to FFFF in hexadecimal
x = bit number in hexadecimal (e.g.: CNT 0008, address = 2 B50).
– Standard counters – No. 0000 to 0015 (0x2B40 to 0x2B5E).
– Regular stacking counters – No. 0041 to 9960 (as from 0x2 B60).
– General stacking counters – No 0061 to 9980.
For the definition of these counters, see the Programming Level 2 manual, paragraph I6.
IV – 7. Timers
IV – 7. 1.End of timer for part program
Accessible in read and write.
Number
(logical address)
Physical
address
Structures / Functions
TIM00
TIM01
TIM02
TIM03
TIM04
TIM05
TIM06
TIM07
TIM08
TIM09
TIM10
TIM11
TIM12
TIM13
TIM14
TIM15
2 890
2 891
2 892
2 893
2 894
2 895
2 896
2 897
2 898
2 899
2 89A
2 89B
2 89C
2 89D
2 89E
2 89F
2 897
TIM07
not used
Only the low order word is used
IV – 7. 2.PLC timer
TIM00 to 15 = WRD 0064 to 0079 see chapter IV – 4.
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System Configuration
S900II
V – CPU fault signalling
V – CPU FAULT SIGNALLING
V – 1. Flashing Leds
These signal a CAN network fault by displaying the problem number in binary on the LEDs at the
bottom of the CPU, and the node number (if concerned) on the LEDs at the top if the pendant is not
functioning.
1 = CAN driver initialization fault
3
0
2 = Write problem in Flashprom
5 = A double (or more) node on the network (code + node)
6 = Problem during the CONNECTION phase (code + node)
7 = Problem during the PREPARATION phase (code + node)
8 = Problem during the START phase (code + node)
9
= The network does not correspond to the parametered configuration (code + node)
10 = “Node–guarding” problem (code + node). Communication fault with the pendant ;
this may be due to the CAN speed being too great for the length of the cable used, or a bad
line adaptation, or interference, etc.
11 = CPU emission problem
12 = CPU reception problem
13 = Topology fault of the remote I/O
15 = EMERGENCY message received (code + node). Problem on the pendant or with
communication between the pendant and the CPU (see 10)
Note : In the event of a NODE GUARDING fault, fault 15 may appear alternately with fault 10.
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System Configuration
S900II
V – CPU fault signalling
V – 2. Fixed Leds
These signal a fault when powering up by giving the problem number in binary on the LEDs at the
bottom of the CPU, and the node number (if concerned) on the LEDs at the top if the pendant is not
functioning.
1 = Problem with recovering the parameters in Flashprom
2 = Problem during the opening of the PC link
3 = Problem during the opening of the EUROMAP 17 link
4 = Problem during the opening of the printer 2 link
5 = Problem during the opening of the CAN link
6 = Message not present in Flashprom
7 = Problem with the CPU’s RAM
8 = Problem with the Flashprom’s checksum
9 = Problem with the axes declared and the axes’ boards present
10 = The configuration has changed
11 = Problem during the initialization of the axes’ boards by the CPU
15 = Communication problem with the pendant during powering up. The CAN speed
may be changed by transfering the parameters with the PC at 2400 Bds, slave = 1.
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System Configuration
S900II
VI – IMM Anticipated Restart
VI – IMM ANTICIPATED RESTART
" Parameter 174 : type of IMM anticipated restart
G 0 : no anticipated restart
G 1 : anticipated restart
G 2 : programmed delay anticipated restart –> WWRD 63 programmed in step 0.
" Parameter 175 : basic value of the auto–adaptative delay and double the minimum value of
the programmed delay
" Parameter 176 : minimum value of the auto–adaptative delay (safety margin)
Anticipated restart effective if :
G offset wait is not valid (parameter 451)
G and if the robot is in automatic
G and if Kv equals 100 %
in the case of
restart with
programmed
delay
G and if there is a SET WWRD63 in step 0 of the program
parameter 175
G and if the value of WWRD63 is greater than or equal to
2
VCM
programmed
VCM
BHM
Tr = WWRD 116
P176
Tm = WWRD 117
MO
Tr = robot disengaging time in 1/10 s (WWRD 116)
Tm = IMM motion start time in 1/10 s (WWRD 117)
Rt = theoretical delay = Tr – Tm + P176 or 0 if the result is negative
Rapp = Applied delay
yes
Rapp > Rt
no
Rapp = Rt
Rapp = 66% of (Rt – Rapp)
There is a fault if mould open (or OPA) goes to 0 and BHM = 0
D_5 : MOVEMENT OUTSIDE CAMS(if there is no anticipated restart running)
D_32: PREMATURE MACHINE RESTART(if there is an anticipated restart running)
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System Configuration
S900II
VI – IMM Anticipated Restart
" Safety circuit principle.
A hard–wired circuit controls the respective positions of the moving mould (“MO” = Mould Open
signal) and of the robot (“ZBD” = Arm Free Area / “ZHM” = Outside Mould Area signal).
The output of this hard–wired circuit (”MO” + ”ZBD” + ”ZHM” = ”KA301”) activates a power relay
(KA301 contactor).
During normal operation, the KA301 relay is activated. The KA301 contacts are used in series with
the SBD relay contact from the interface board, which therefore means that the software safety that
manages the SBD relay with a hard–wired safety device is doubled.
When there is a fault (robot position not conform compared to the moving mould position), the KA301
relay falls, which in turn activates the control relay KA16A, which is self–powered and which stops
the KA301 relay becoming active (the blocking of KA301 prohibits the IMM cycle).
You must power down the robot cabinet to cancel this fault.
FOR 32 OUTPUT BOARDS : as OUTxx active at power up
ANCILLARY “ARM
FREE” SAFETY
“KA301” relay
CONTROL
ANCILLARY “ARM
FREE” SAFETY
“KA301” relay
CONTROL
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System Configuration
S900II
VI – IMM Anticipated Restart
IF IN XX
SET WORD 62 = 200
Until a parameter for the control input for the anticipated restart safety circuit is integrated into the
software, this input must be monitored and a fault must be generated using the monitoring PLC.
RELANCE ANTICIPEE NON CONFORME : in French
ANTICIPATED RESTART NOT CONFORM : in English
REARME ANTICIPADO NO CONFORME : in Spanish
VORAUSB. NEUSTART FEHLERHAFT : in German
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