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MVME3100
Single-Board Computer
Installation and Use
V3100A/IH1
January 2006 Edition
Safety Summary
The following general safety precautions must be observed during all phases of operation, service, and repair of
this equipment. Failure to comply with these precautions or with specific warnings elsewhere in this manual
could result in personal injury or damage to the equipment.
The safety precautions listed below represent warnings of certain dangers of which Motorola is aware. You, as
the user of the product, should follow these warnings and all other safety precautions necessary for the safe
operation of the equipment in your operating environment.
Ground the Instrument.
To minimize shock hazard, the equipment chassis and enclosure must be connected to an electrical ground. If the
equipment is supplied with a three-conductor AC power cable, the power cable must be plugged into an approved
three-contact electrical outlet, with the grounding wire (green/yellow) reliably connected to an electrical ground
(safety ground) at the power outlet. The power jack and mating plug of the power cable meet International
Electrotechnical Commission (IEC) safety standards and local electrical regulatory codes.
Do Not Operate in an Explosive Atmosphere.
Do not operate the equipment in any explosive atmosphere such as in the presence of flammable gases or fumes.
Operation of any electrical equipment in such an environment could result in an explosion and cause injury or
damage.
Keep Away From Live Circuits Inside the Equipment.
Operating personnel must not remove equipment covers. Only Factory Authorized Service Personnel or other
qualified service personnel may remove equipment covers for internal subassembly or component replacement
or any internal adjustment. Service personnel should not replace components with power cable connected. Under
certain conditions, dangerous voltages may exist even with the power cable removed. To avoid injuries, such
personnel should always disconnect power and discharge circuits before touching components.
Use Caution When Exposing or Handling a CRT.
Breakage of a Cathode-Ray Tube (CRT) causes a high-velocity scattering of glass fragments (implosion). To
prevent CRT implosion, do not handle the CRT and avoid rough handling or jarring of the equipment. Handling
of a CRT should be done only by qualified service personnel using approved safety mask and gloves.
Do Not Substitute Parts or Modify Equipment.
Do not install substitute parts or perform any unauthorized modification of the equipment. Contact your local
Motorola representative for service and repair to ensure that all safety features are maintained.
Observe Warnings in Manual.
Warnings, such as the example below, precede potentially dangerous procedures throughout this manual.
Instructions contained in the warnings must be followed. You should also employ all other safety precautions
which you deem necessary for the operation of the equipment in your operating environment.
Warning
To prevent serious injury or death from dangerous voltages, use extreme
caution when handling, testing, and adjusting this equipment and its
components.
Warning
Flammability
All Motorola PWBs (printed wiring boards) are manufactured with a flammability rating
of 94V-0 by UL-recognized manufacturers.
EMI Caution
Caution
This equipment generates, uses and can radiate electromagnetic energy. It
may cause or be susceptible to electromagnetic interference (EMI) if not
installed and used with adequate EMI protection.
!
Caution
Lithium Battery Caution
This product contains a lithium battery to power the clock and calendar circuitry.
Caution
Danger of explosion if battery is replaced incorrectly. Replace battery only
with the same or equivalent type recommended by the equipment
manufacturer. Dispose of used batteries according to the manufacturer’s
instructions.
!
Caution
Caution
Il y a danger d’explosion s’il y a remplacement incorrect de la batterie.
Remplacer uniquement avec une batterie du même type ou d’un type
équivalent recommandé par le constructeur. Mettre au rebut les batteries
usagées conformément aux instructions du fabricant.
!
Attention
Caution
Explosionsgefahr bei unsachgemäßem Austausch der Batterie. Ersatz nur
durch denselben oder einen vom Hersteller empfohlenen Typ. Entsorgung
gebrauchter Batterien nach Angaben des Herstellers.
!
Vorsicht
CE Notice (European Community)
Warning
This is a Class A product. In a domestic environment, this product may
cause radio interference, in which case the user may be required to take
adequate measures.
!
Warning
Motorola products with the CE marking comply with the EMC Directive (89/336/EEC).
Compliance with this directive implies conformity to the following European Norms:
EN55022 “Limits and Methods of Measurement of Radio Interference Characteristics
of Information Technology Equipment”; this product tested to Equipment Class A
EN55024 “Information technology equipment—Immunity characteristics—Limits and
methods of measurement”
Board products are tested in a representative system to show compliance with the above
mentioned requirements. A proper installation in a CE-marked system will maintain the
required EMC performance.
In accordance with European Community directives, a “Declaration of Conformity” has
been made and is available on request. Please contact your sales representative.
Notice
While reasonable efforts have been made to assure the accuracy of this document,
Motorola, Inc. assumes no liability resulting from any omissions in this document, or from
the use of the information obtained therein. Motorola reserves the right to revise this
document and to make changes from time to time in the content hereof without obligation
of Motorola to notify any person of such revision or changes.
Electronic versions of this material may be read online, downloaded for personal use, or
referenced in another document as a URL to the Motorola Web site. The text itself may not
be published commercially in print or electronic form, edited, translated, or otherwise
altered without the permission of Motorola, Inc.
It is possible that this publication may contain reference to or information about Motorola
products (machines and programs), programming, or services that are not available in your
country. Such references or information must not be construed to mean that Motorola
intends to announce such Motorola products, programming, or services in your country.
Limited and Restricted Rights Legend
If the documentation contained herein is supplied, directly or indirectly, to the U.S.
Government, the following notice shall apply unless otherwise agreed to in writing by
Motorola, Inc.
Use, duplication, or disclosure by the Government is subject to restrictions as set forth in
subparagraph (b)(3) of the Rights in Technical Data clause at DFARS 252.227-7013 (Nov.
1995) and of the Rights in Noncommercial Computer Software and Documentation clause
at DFARS 252.227-7014 (Jun. 1995).
Motorola, Inc.
Embedded Communications Computing
2900 South Diablo Way
Tempe, Arizona 85282
Contents
About This Manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xv
Overview of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xv
Comments and Suggestions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xvi
Conventions Used in This Manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xvi
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Overview of Startup Procedures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Unpacking Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Hardware Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
MVME3100 Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Configuration Switch (S4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Geographical Address Switch (S3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
PMC I/O Voltage Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
RTM SEEPROM Address Switch (S1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Hardware Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Connection to Peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Startup and Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Applying Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Switches and Indicators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
MOTLoad Firmware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
MOTLoad Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
MOTLoad Utility Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Using MOTLoad . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Command Line Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Command Line Help . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
MVME3100 Installation and Use (V3100A/IH1)
vii
Contents
Command Line Rules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Firmware Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Displaying VME Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Restoring Default VME Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Remote Start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Alternate Boot Images and Safe Start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Firmware Startup Sequence Following Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Firmware Scan for Boot Image . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Valid Boot Images . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Checksum Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
MOTLoad Image Flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
USER Images . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Alternate Boot Data Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Block Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Local Bus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Flash Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Control and Timers Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
I2C Serial Interface and Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
TSi148 VME Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Serial ATA Host Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
PCI Mezzanine Card Slots . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
USB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
General-Purpose Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Reset Control Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Pin Assignments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
MVME3100 Installation and Use (V3100A/IH1)
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Contents
PMC Expansion Connector (J4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Ethernet Connectors (GENET1/J41B, GENET2/J2B, ENET1/J2A) . . . . . . . . . . . . . . . . . . . . . . 50
PCI Mezzanine Card (PMC) Connectors (J11 – J14, J21 – J23) . . . . . . . . . . . . . . . . . . . . . . . . 51
Serial Port Connectors (COM1/J41A, COM2–COM5/J2A-D) . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
VMEbus P1 Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
VMEbus P2 Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
MVME721 PMC I/O Module (PIM) Connectors (J10, J14) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Planar sATA Power Connector (J30) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
USB Connector (J27) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
sATA Connectors (J28 and J29) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Headers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Boundary Scan Header (J24) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Processor COP Header (J25) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Supply Current Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Motorola Computer Group Documents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Manufacturers’ Documents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Related Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
MVME3100 Installation and Use (V3100A/IH1)
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List of Figures
Figure 1-1. MVME3100 Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 4-1. MVME3100 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Figure 4-2. MVME721 RTM Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
MVME3100 Installation and Use (V3100A/IH1)
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List of Tables
Table 1-1. Startup Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Table 1-2. Configuration Switch (S4) Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 1-3. Geographical Address Switch Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 1-4. Slot Geographical Address Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 1-5. RTM EEPROM Address Switch Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 1-6. EEPROM Address Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 1-7. MVME3100 Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 1-8. MVME721 Rear Transition Module Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 2-1. Front-Panel LED Status Indicators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 2-2. MVME721 LED Status Indicators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 2-3. Additional Onboard Status Indicators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 3-1. MOTLoad Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 3-2. MOTLoad Image Flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Table 4-1. MVME3100 Features Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 4-2. MVME721 RTM Features Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Table 5-1. PMC Expansion Connector (J4) Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Table 5-2. Ethernet Connectors Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Table 5-3. PMC Slot 1 Connector (J11) Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Table 5-4. PMC Slot 1 Connector (J12) Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Table 5-5. PMC Slot 1 Connector (J13) Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Table 5-6. PMC Slot 1 Connector (J14) Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Table 5-7. PMC Slot 2 Connector (J21) Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Table 5-8. PMC Slot 2 Connector (J22) Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Table 5-9. PMC Slot 2 Connector (J23) Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Table 5-10. COM Port Connector Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Table 5-11. VMEbus P1 Connector Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Table 5-12. VME P2 Connector Pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Table 5-13. MVME721 Host I/O Connector (J10) Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . 61
Table 5-14. Planar sATA Power Connector (J30) Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Table 5-15. USB Connector (J27) Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Table 5-16. sATA Connectors (J28 and J29) Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Table 5-17. Boundary Scan Header (J24) Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Table 5-18. Processor COP Header (J25) Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Table A-1. Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Table A-2. MVME3100 Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Table B-1. Motorola Computer Group Documents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Table B-2. Manufacturers’ Documents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Table B-3. Related Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
MVME3100 Installation and Use (V3100A/IH1)
xiii
About This Manual
The MVME3100 Single-Board Computer Installation and Use manual provides the information
you will need to install and configure your MVME3100 single-board computer and MVME721
rear transition module (RTM). It provides specific preparation and installation information, and
data applicable to the board.
As of the printing date of this manual, the MVME3100 supports the models listed below.
Model Number
Description
MVME3100-1152
677 MHz MPC8540 PowerQUICC III™ integrated processor,
256MB DDR SDRAM, 64MB flash, Gigabit Ethernet, SATA, IEEE
handles
MVME3100-1263
MVME721-101
833 MHz MPC8540 PowerQUICC III integrated processor, 512MB
DDR SDRAM, 128MB flash, Gigabit Ethernet, SATA, USB, PCI
expansion connector, IEEE handles
Rear Transition Module, direct connect, 75mm, PIM socket for
PMC-1 I/O, four serial, 10/100/1000 Enet, 10/100 Enet
Overview of Contents
This manual is divided into the following chapters and appendices:
installation instructions, as well as ESD precautionary notes.
and indicators on the MVMEM3100.
product.
block diagram level.
the MMVE3100 single-board computer.
documentation, and industry specifications.
MVME3100 Installation and Use (V3100A/IH1)
xv
About This Manual
Comments and Suggestions
Motorola welcomes and appreciates your comments on its documentation. We want to know
what you think about our manuals and how we can make them better. Mail comments to:
Motorola, Inc.
Embedded Communications Computing
Reader Comments DW278
2900 S. Diablo Way
Tempe, Arizona 85282
You can also submit comments to the following e-mail address:
In all your correspondence, please list your name, position, and company. Be sure to include
the title and part number of the manual and tell how you used it. Then tell us your feelings about
its strengths and weaknesses and any recommendations for improvements.
Conventions Used in This Manual
The following typographical conventions are used in this document:
bold
is used for user input that you type just as it appears; it is also used for commands, options
and arguments to commands, and names of programs, directories and files.
italic
is used for names of variables to which you assign values, for function parameters, and for
structure names and fields. Italic is also used for comments in screen displays and
examples, and to introduce new terms.
courier
is used for system output (for example, screen displays, reports), examples, and system
prompts.
<Enter>, <Return> or <CR>
represents the carriage return or Enter key.
Ctrl
represents the Control key. Execute control characters by pressing the Ctrl key and the
letter simultaneously, for example, Ctrl-d.
MVME3100 Installation and Use (V3100A/IH1)
xvi
Hardware Preparation and Installation
1
Introduction
This chapter contains the following information:
■
■
Board preparation and installation instructions
ESD precautionary notes
Description
The MVME3100 is a single-slot, single-board computer based on the MPC8540 PowerQUICC
III™ integrated processor. The MVME3100 provides serial ATA (sATA), USB 2.0, 2eSST
VMEbus interfaces, dual 64-bit/100 MHz PMC sites, up to 128MB of Flash, dual 10/100/1000
Ethernet, one 10/100 Ethernet, and five serial ports. This board supports front and rear I/O and
a single SODIMM module for DDR memory. Access to rear I/O is available with the MVME721
rear transition module (RTM).
Front-panel connectors on the MVME3100 board include: one RJ-45 connector for the Gigabit
Ethernet, one RJ-45 connector for the asynchronous serial port, one USB port with one type A
connector, one sATA port with one external sATA connector, and a combined reset and abort
switch.
Rear-panel connectors on the MVME721 board include: one RJ-45 connector for each of the
10/100 and 10/100/1000 BaseT Ethernets and four RJ-45 connectors for the asynchronous
serial ports. The RTM also provides two planar connectors for one PIM with rear I/O.
Getting Started
This section provides an overview of the steps necessary to install and power up the
MVME3100 and a brief section on unpacking and ESD precautions.
MVME3100 Installation and Use (V3100A/IH1)
1
Chapter 1 Hardware Preparation and Installation
Overview of Startup Procedures
The following table lists the things you will need to do before you can use this board and tells
where to find the information you need to perform each step. Be sure to read this entire chapter,
including all Caution and Warning notes, before you begin.
Table 1-1. Startup Overview
What you need to do...
Refer to...
Unpack the hardware.
Identify various components on the board.
Install the MVME3100 board in a chassis.
Connect any other equipment you will be using
Verify the hardware is installed.
Unpacking Guidelines
Unpack the equipment from the shipping carton. Refer to the packing list and verify that all items
are present. Save the packing material for storing and reshipping of equipment.
Note If the shipping carton is damaged upon receipt, request that the carrier’s agent be present
during the unpacking and inspection of the equipment.
Caution
Avoid touching areas of integrated circuitry; static discharge can damage circuits.
!
Caution
ESD
Motorola strongly recommends that you use an antistatic wrist strap and a conductive
foam pad when installing or upgrading a system. Electronic components, such as disk
drives, computer boards, and memory modules can be extremely sensitive to
electrostatic discharge (ESD). After removing the component from its protective
wrapper or from the system, place the component flat on a grounded, static-free
surface (and, in the case of a board, component side up). Do not slide the component
over any surface.
Use ESD
Wrist Strap
If an ESD station is not available, you can avoid damage resulting from ESD by wearing
an antistatic wrist strap (available at electronics stores) that is attached to an active
electrical ground. Note that a system chassis may not be grounded if it is unplugged.
Caution
Inserting or removing modules with power applied may result in damage to module
components.
!
Caution
MVME3100 Installation and Use (V3100A/IH1)
2
Chapter 1 Hardware Preparation and Installation
Warning
Dangerous voltages, capable of causing death, are present in this equipment. Use
extreme caution when handling, testing, and adjusting.
Warning
Hardware Configuration
This section discusses certain hardware and software tasks that may need to be performed
prior to installing the board in a chassis.
To produce the desired configuration and ensure proper operation of the MVME3100, you may
need to carry out certain hardware modifications before installing the module.
Most options on the MVME3100 are software configurable. Configuration changes are made by
setting bits in control registers after the board is installed in a system.
Jumpers/switches are used to control those options that are not software configurable. These
jumper settings are described further on in this section. If you are resetting the board jumpers
from their default settings, it is important to verify that all settings are reset properly.
MVME3100 Layout
Figure 1-1 on page 4 illustrates the placement of the jumpers, headers, connectors, switches,
and various other components on the MVME3100.
MVME3100 Installation and Use (V3100A/IH1)
3
Chapter 1 Hardware Preparation and Installation
The MVME3100 is factory tested and shipped with the configuration described in the following
sections.
Figure 1-1. MVME3100 Board Layout
J25
J24
J28
J30
J22
U1014
J21
U1050
U1049
U1020
U1019
P1
J23
U1025
U1026
U1027
U1052
U1046
U1047
U1008
J11
J13
J12
U21
U1051
J14
U1003
U1007
P2
U1010
U1012
U1000
J2
U1012
U1024
J4
4381 0106
MVME3100 Installation and Use (V3100A/IH1)
4
Chapter 1 Hardware Preparation and Installation
Configuration Switch (S4)
An 8-position SMT configuration switch controls the VME SCON setting, Flash bank write-
protect, and the safe start ENV settings. It also selects the Flash boot image. The default setting
on all switch positions is OFF.
Table 1-2. Configuration Switch (S4) Settings
Setting
Switch
Pos.
OFF (Factory Default)
ON
Notes
SAFE_START
1
Normal ENV settings
should be used.
Safe ENV settings
should be used.
This switch status is
readable from System
Status register 1, bit 5.
Software may check
this bit and act
accordingly.
BOOT BLOCK
SELECT
2
3
Flash memory map is
normal and boot block A is selected and mapped
selected.
Boot block B is
to the highest
address.
FLASH BANK WP
Reserved
Entire Flash is not write-
protected.
Flash is write-
protected.
4
5
VME SCON
AUTO/MANUAL
MODE
Auto-SCON mode.
Non-SCON mode.
Manual SCON mode. Manual SCON mode
works in conjunction
with the VME SCON
SELECT switch.
MANUAL VME
SCON SELECT
6
Always SCON mode.
sATA Mode
This switch is only
effective when the
VME SCON
AUTO/MANUAL
MODE switch is ON.
sATA Mode
7
8
Legacy Mode
Sets GD31244 to
legacy or sATA mode
during reset
TRST SELECT
Normal MPC8540 TRST
mode where the board
HRESET will assert
TRST.
Isolates the board
HRESET from TRST
and allows the board
to reset without
This switch should
remain in the OFF
position unless a
MPC8540 emulator is
attached.
resetting the
MPC8540 JTAG/COP
interface.
MVME3100 Installation and Use (V3100A/IH1)
5
Chapter 1 Hardware Preparation and Installation
Geographical Address Switch (S3)
The TSi148 VMEbus Status register provides the VMEbus geographical address of the
MVME3100. This switch reflects the inverted states of the geographical address signals.
Applications not using the 5-row backplane can use the geographical address switch to assign
a geographical address.
1
16
1
16
ON
ON
1
2
3
4
5
6
7
8
Not used
1
2
3
4
5
6
7
8
Not used
PCI mode
GAP#=0
GA4#=0
GA3#=0
GA2#=0
GA1#=0
GA0#=0
PCI-X mode
GAP#=1
GA4#=1
GA3#=1
GA2#=1
GA1#=1
GA0#=1
4389 0106
Table 1-3. Geographical Address Switch Assignments
Position
Function
SW1
SW21
SW3
SW4
SW5
SW6
SW7
SW8
Not
Used
PCIBus GAP
A mode
GA4
GA3
GA2
GA1
GA0
(Factory)
OFF
X
PCI-X
mode
1
1
1
1
1
1
1
Note SW2 configures the operating mode of PCI Bus A during power up. In the default (OFF)
position, the bus is configured for PCI-X mode. In the ON position, the bus is configured for PCI
mode.
Table 1-4. Slot Geographical Address Settings
Slot
GAP
Address
GA(4:0)
SW3
OFF
OFF
ON
SW4
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
SW5
OFF
OFF
OFF
OFF
OFF
OFF
OFF
ON
SW6
OFF
OFF
OFF
ON
SW7
OFF
ON
SW8
ON
1
2
3
4
5
6
7
8
9
1 11110
1 11101
0 11100
1 11011
0 11010
0 11001
1 11000
1 10111
0 10110
OFF
ON
ON
OFF
ON
OFF
OFF
ON
OFF
ON
ON
ON
ON
OFF
ON
OFF
OFF
ON
ON
ON
OFF
OFF
OFF
OFF
OFF
ON
ON
MVME3100 Installation and Use (V3100A/IH1)
6
Chapter 1 Hardware Preparation and Installation
Table 1-4. Slot Geographical Address Settings (continued)
Slot
GAP
Address
GA(4:0)
SW3
ON
SW4
OFF
OFF
OFF
OFF
OFF
OFF
ON
SW5
ON
SW6
OFF
OFF
ON
SW7
ON
SW8
OFF
ON
10
11
12
13
14
15
16
17
18
19
20
21
0 10101
1 10100
0 10011
1 10010
1 10001
0 10000
1 01111
0 01110
0 01101
1 01100
0 01011
1 01010
OFF
ON
ON
ON
ON
OFF
OFF
ON
OFF
ON
OFF
OFF
ON
ON
ON
ON
ON
OFF
ON
ON
ON
ON
OFF
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
ON
OFF
OFF
ON
OFF
ON
ON
ON
ON
OFF
ON
OFF
ON
ON
ON
ON
OFF
OFF
OFF
ON
OFF
ON
ON
PMC I/O Voltage Configuration
The onboard PMC sites may be configured to support 3.3V or 5.0V I/O PMC modules. To
support 3.3V or 5.0V I/O PMC modules, both PMC I/O keying pins must be installed in the
holes. If both keying pins are not in the same location or if the keying pins are not installed, the
PMC sites will not function. Note that setting the PMC I/O voltage to 5.0V forces the PMC sites
to operate in PCI mode instead of PCI-X mode. The default factory configuration is for 3.3V
PMC I/O voltage.
RTM SEEPROM Address Switch (S1)
A 4-position SMT configuration switch is located on the RTM to set the device address of the
RTM serial EEPROM device. The switch settings are defined in the following table.
Table 1-5. RTM EEPROM Address Switch Assignments
Position
Function
OFF
SW1
A0
1
SW2
A1
1
SW3
A2
1
SW4
Not Used
MVME3100 Installation and Use (V3100A/IH1)
7
Chapter 1 Hardware Preparation and Installation
Table 1-6. EEPROM Address Settings
Device Address
A(2:0)
000
001
010
011
100
101
110
111
SW1
ON
SW2
ON
SW3
ON
$A0
$A2
OFF
ON
ON
ON
$A4
OFF
OFF
ON
ON
$A6
OFF
ON
ON
$A8
OFF
OFF
OFF
OFF
$AA (Factory)
$AC
OFF
ON
ON
OFF
OFF
$AE
OFF
Note The RTM EEPROM address switches must be set for address $AA in order for this device
to be accessible by MotLoad.
Hardware Installation
Installing the MVME3100 into a Chassis
Use the following steps to install the MVME3100 into your computer chassis.
1. Attach an ESD strap to your wrist. Attach the other end of the ESD strap to an electrical ground
throughout the procedure.
2. Remove any filler panel that might fill that slot.
3. Install the top and bottom edge of the MVME3100 into the guides of the chassis.
Warning
Only use injector handles for board insertion to avoid damage/deformation to the front
panel and/or PCB. Deformation of the front panel can cause an electrical short or other
board malfunction.
!
Warning
4. Ensure that the levers of the two injector/ejectors are in the outward position.
5. Slide the MVME3100 into the chassis until resistance is felt.
6. Simultaneously move the injector/ejector levers in an inward direction.
7. Verify that the MVME3100 is properly seated and secure it to the chassis using the two screws
located adjacent to the injector/ejector levers.
8. Connect the appropriate cables to the MVME3100.
MVME3100 Installation and Use (V3100A/IH1)
8
Chapter 1 Hardware Preparation and Installation
To remove the board from the chassis, press the red locking tabs (IEEE handles only) and
reverse the procedure.
Connection to Peripherals
When the MVME3100 is installed in a chassis, you are ready to connect peripherals and apply
power to the board.
connectors listed below.
Table 1-7. MVME3100 Connectors
Connector
Function
J4
PMC expansion connector
PCI mezzanine card (PMC) slot 1 connector
PCI mezzanine card (PMC) slot 2 connector
Boundary scan header
J11, J12, J13, J14
J21, J22, J23
J24
J25
COP header
J27
USB connector
J28
Front panel sATA connector
Planar sATA connector
J29
J30
Planar sATA power connector
10/100/1000Mb/s Ethernet connector
COM port connector
J41B
J41A
P1, P2
VME backplane connectors
Table 1-8. MVME721 Rear Transition Module Connectors
Connector
Function
J1A, J1B, J1C, J1D COM port connectors
J2A
J2B
J10
J14
P2
10/100/1000Mb/s Ethernet connector
10/100Mb/s Ethernet connector
PIM power/ground
PIM I/O
VME backplane connector
MVME3100 Installation and Use (V3100A/IH1)
9
Chapter 1 Hardware Preparation and Installation
Completing the Installation
Verify that hardware is installed and the power/peripheral cables connected are appropriate for
your system configuration.
Replace the chassis or system cover, reconnect the system to the AC or DC power source, and
turn the equipment power on.
MVME3100 Installation and Use (V3100A/IH1)
10
Startup and Operation
2
Introduction
This chapter gives you information about the:
■
■
Power-up procedure
Runtime switches and indicators
Applying Power
After you verify that all necessary hardware preparation is complete and all connections are
made correctly, you can apply power to the system.
When you are ready to apply power to the MVME3100:
■
Verify that the chassis power supply voltage setting matches the voltage present in the
country of use (if the power supply in your system is not auto-sensing)
■
On powering up, the MVME3100 brings up the MOTLoad prompt, MVME3100>
Switches and Indicators
The MVME3100 board provides a single push button switch that provides both abort and reset
(ABT/RST) functions. When the switch is pressed for less than five seconds, an abort interrupt
is generated to the processor. If the switch is held for more than five seconds, a board hard reset
is generated. The board hard reset will reset the MPC8540, local PCI/PCI-X buses, Ethernet
PHYs, serial ports, Flash devices, and PLD(s). If the MVME3100 is configured as the VME
system controller, the VME bus and local TSi148 reset input are also reset.
The MVME3100 has four front-panel indicators. The following table describes these indicators:
Table 2-1. Front-Panel LED Status Indicators
Function
Label
Color
Description
Board Fail
FAIL
Yellow
Board has a failure. After Power On or reset,
this LED is ON until extinguished by
firmware or software.
User Defined
USER 1
Green
This indicator is illuminated by software
assertion of its corresponding register bit.
MVME3100 Installation and Use (V3100A/IH1)
11
Chapter 2 Startup and Operation
Table 2-1. Front-Panel LED Status Indicators (continued)
Function
Label
Color
Description
GENET 1 Link / SPEED
Speed
Off
No link
Yellow
Green
Blinking Green
Off
10/100Base-T operation
1000Base-T operation
Activity proportional to bandwidth utilization.
No activity
GENET 1
Activity
ACT
The MVME721 rear transition module also has four status indicators. The following table
describes these indicators:
Table 2-2. MVME721 LED Status Indicators
Function
Label
Color
Description
GENET 2 Link/Speed
SPEED
Off
No link
Yellow
10/100Base-T operation
1000Base-T operation
Activity proportional to bandwidth utilization.
No activity
Green
GENET 2 Activity
ENET 1 Link/Speed
ENET 1 Activity
ACT
Blinking Green
Off
SPEED
ACT
Off
No link
Yellow
10/100Base-T operation
Activity proportional to bandwidth utilization.
No activity
Blinking Green
Off
Table 2-3. Additional Onboard Status Indicators
Function
Label
Color
Description
User Defined DS7
Green
This indicator is illuminated by software assertion of its
corresponding register bit.
LED 2
(silkscreen)
User Defined DS8
Green
Red
This indicator is illuminated by software assertion of its
corresponding register bit.
LED 3
(silkscreen)
Power Supply DS1
This indicator is illuminated to indicate a power supply fail
condition.
Fail
(silkscreen)
sATA 0
Activity
DS4
(silkscreen)
Green
sATA 0 or 1 activity in legacy mode (default). sATA 0 activity in
DPA mode.
MVME3100 Installation and Use (V3100A/IH1)
12
Chapter 2 Startup and Operation
Table 2-3. Additional Onboard Status Indicators (continued)
Function
Label
Color
Description
sATA 1
Activity
DS5
(silkscreen)
Green
No function in legacy mode (default). sATA 1 activity in DPA
mode.
MPC8540
Ready
DS3
(silkscreen)
Green
Indicates that the MPC8540 has completed the reset
operation and is not in a power-down state. The MPC8540
Ready is multiplexed with the MPC8540 TRIG_OUT so the
LED can be programmed to indicate one of three trigger
events based on the value in the MPC8540 TOSR register.
GENET 1
DS2
Off
Extremely poor Signal to Noise ratio - cannot receive data
Link Quality
(silkscreen)
Slow Blink Green Poor SNR - receive errors detected
Fast Blink Green
Green
Fair SNR - close to data error threshold
Good SNR on link
GENET 2
DS3
[Same as DS2}
Link Quality
MVME3100 Installation and Use (V3100A/IH1)
13
MOTLoad Firmware
3
Introduction
This chapter describes the basic features of the MOTLoad firmware product, designed by
Motorola as the next generation initialization, debugger, and diagnostic tool for high-
performance embedded board products using state-of-the-art system memory controllers and
bridge chips, such as the MPC8540 processor.
In addition to an overview of the product, this chapter includes a list of standard MOTLoad
commands, the default VME and firmware settings that are changeable by the user, remote
start, and the alternate boot procedure.
Overview
The MOTLoad firmware package serves as a board power-up and initialization package, as well
as a vehicle from which user applications can be booted. A secondary function of the MOTLoad
firmware is to serve in some respects as a test suite providing individual tests for certain
devices.
MOTLoad is controlled through an easy-to-use, UNIX-like, command line interface. The
MOTLoad software package is similar to many end-user applications designed for the
embedded market, such as the real time operating systems currently available.
Documentation, for more details.
MOTLoad Implementation and Memory Requirements
The implementation of MOTLoad and its memory requirements are product specific. The
MVME3100 single-board computer (SBC) is offered with a range of memory (for example,
DRAM or flash). Typically, the smallest amount of on-board DRAM that a Motorola SBC has is
32MB. Each supported Motorola product line has its own unique MOTLoad binary image(s).
Currently the largest MOTLoad compressed image is less than 1MB in size.
MOTLoad Commands
MOTLoad supports two types of commands (applications): utilities and tests. Both types of
commands are invoked from the MOTLoad command line in a similar fashion. Beyond that,
MOTLoad utilities and MOTLoad tests are distinctly different.
MVME3100 Single-Board Computer Installation and Use (V3100A/IH1)
15
Chapter 3 MOTLoad Firmware
MOTLoad Utility Applications
The definition of a MOTLoad utility application is very broad. Simply stated, it is considered a
MOTLoad command, if it is not a MOTLoad test. Typically, MOTLoad utility applications are
applications that aid the user in some way (that is, they do something useful). From the
perspective of MOTLoad, examples of utility applications are: configuration, data/status
displays, data manipulation, help routines, data/status monitors, etc.
Operationally, MOTLoad utility applications differ from MOTLoad test applications in several
ways:
■
Only one utility application operates at any given time (that is, multiple utility applications
cannot be executing concurrently)
■
Utility applications may interact with the user. Most test applications do not.
MOTLoad Tests
A MOTLoad test application determines whether or not the hardware meets a given standard.
Test applications are validation tests. Validation is conformance to a specification. Most
MOTLoad tests are designed to directly validate the functionality of a specific SBC subsystem
or component. These tests validate the operation of such SBC modules as: dynamic memory,
external cache, NVRAM, real time clock, etc.
All MOTLoad tests are designed to validate functionality with minimum user interaction. Once
launched, most MOTLoad tests operate automatically without any user interaction. There are a
few tests where the functionality being validated requires user interaction (that is, switch tests,
interactive plug-in hardware modules, etc.). Most MOTLoad test results (error-data/status-data)
are logged, not printed. All MOTLoad tests/commands have complete and separate
descriptions (refer to the MOTLoad Firmware Package User’s Manual for this information).
All devices that are available to MOTLoad for validation/verification testing are represented by
a unique device path string. Most MOTLoad tests require the operator to specify a test device
at the MOTLoad command line when invoking the test.
A listing of all device path strings can be displayed through the devShow command. If an SBC
device does not have a device path string, it is not supported by MOTLoad and can not be
directly tested. There are a few exceptions to the device path string requirement, like testing
RAM, which is not considered a true device and can be directly tested without a device path
string. Refer to the devShow command description page in the MOTLoad Firmware Package
User’s Manual.
Most MOTLoad tests can be organized to execute as a group of related tests (a testSuite)
through the use of the testSuite command. The expert operator can customize their testing by
defining and creating a custom testSuite(s). The list of built-in and user-defined MOTLoad
testSuites, and their test contents, can be obtained by entering testSuite -d at the MOTLoad
prompt. All testSuites that are included as part of a product specific MOTLoad firmware
package are product specific. For more information, refer to the testSuite command description
page in the MOTLoad Firmware Package User’s Manual.
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Chapter 3 MOTLoad Firmware
Test results and test status are obtained through the testStatus, errorDisplay, and taskActive
commands. Refer to the appropriate command description page in the MOTLoad Firmware
Package User’s Manual for more information.
Using MOTLoad
Interaction with MOTLoad is performed via a command line interface through a serial port on
the SBC, which is connected to a terminal or terminal emulator (for example, Window’s
Hypercomm). The default MOTLoad serial port settings are: 9600 baud, 8 bits, no parity.
Command Line Interface
The MOTLoad command line interface is similar to a UNIX command line shell interface.
Commands are initiated by entering a valid MOTLoad command (a text string) at the MOTLoad
command line prompt and pressing the carriage-return key to signify the end of input. MOTLoad
then performs the specified action. An example of a MOTLoad command line prompt is shown
below. The MOTLoad prompt changes according to what product it is used on (for example,
MVME6100, MVME3100).
Example:
MVME3100>
If an invalid MOTLoad command is entered at the MOTLoad command line prompt, MOTLoad
displays a message that the command was not found.
Example:
MVME3100>mytest
"mytest" not found
MVME3100>
If the user enters a partial MOTLoad command string that can be resolved to a unique valid
MOTLoad command and presses the carriage-return key, the command is executed as if the
entire command string had been entered. This feature is a user-input shortcut that minimizes
the required amount of command line input. MOTLoad is an ever changing firmware package,
so user-input shortcuts may change as command additions are made.
Example:
MVME3100>version
Copyright: Motorola Inc.1999-2005, All Rights Reserved
MOTLoad RTOS Version 2.0, PAL Version 1.0 RM01
Mon Aug 29 15:24:13 MST 2005
MVME3100>
Example:
MVME3100>ver
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Chapter 3 MOTLoad Firmware
Copyright: Motorola Inc.1999-2005, All Rights Reserved
MOTLoad RTOS Version 2.0, PAL Version 1.0 RM01
Mon Aug 29 15:24:13 MST 2005
MVME3100>
If the partial command string cannot be resolved to a single unique command, MOTLoad
informs the user that the command was ambiguous.
Example:
MVME3100>te
"te" ambiguous
MVME3100>
Command Line Help
Each MOTLoad firmware package has an extensive, product-specific help facility that can be
accessed through the help command. The user can enter help at the MOTLoad command line
to display a complete listing of all available tests and utilities.
Example
MVME3100>help
For help with a specific test or utility the user can enter the following at the MOTLoad prompt:
help <command_name>
The help command also supports a limited form of pattern matching. Refer to the help
command page.
Example
MVME3100>help testRam
Usage: testRam [-aPh] [-bPh] [-iPd] [-nPh] [-tPd] [-v]
Description: RAM Test [Directory]
Argument/Option Description
-a Ph: Address to Start (Default = Dynamic Allocation)
-b Ph: Block Size (Default = 16KB)
-i Pd: Iterations (Default = 1)
-n Ph: Number of Bytes (Default = 1MB)
-t Ph: Time Delay Between Blocks in OS Ticks (Default = 1)
-v O : Verbose Output
MVME3100>
Command Line Rules
There are a few things to remember when entering a MOTLoad command:
■
■
Multiple commands are permitted on a single command line, provided they are separated
by a single semicolon (;)
Spaces separate the various fields on the command line (command/arguments/options)
MVME3100 Single-Board Computer Installation and Use (V3100A/IH1)
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Chapter 3 MOTLoad Firmware
■
■
■
■
The argument/option identifier character is always preceded by a hyphen (-) character
Options are identified by a single character
Option arguments immediately follow (no spaces) the option
All commands, command options, and device tree strings are case sensitive
Example:
MVME3100>flashProgram –d/dev/flash0 –n00100000
For more information on MOTLoad operation and function, refer to the MOTLoad Firmware
Package User’s Manual.
MOTLoad Command List
The following table provides a list of all current MOTLoad commands. Products supported by
MOTLoad may or may not employ the full command set. Typing help at the MOTLoad command
prompt will display all commands supported by MOTLoad for a given product.
Table 3-1. MOTLoad Commands
Command
Description
One-Line Instruction Assembler
as
bcb bch bcw
bdTempShow
bfb bfh bfw
blkCp
Block Compare Byte/Halfword/Word
Display Current Board Temperature
Block Fill Byte/Halfword/Word
Block Copy
blkFmt
Block Format
blkRd
Block Read
blkShow
blkVe
Block Show Device Configuration Data
Block Verify
blkWr
Block Write
bmb bmh bmw
br
Block Move Byte/Halfword/Word
Assign/Delete/Display User-Program Break-Points
Block Search Byte/Halfword/Word
Block Verify Byte/Halfword/Word
ISO9660 File System Directory Listing
ISO9660 File System File Load
Clear the Specified Status/History Table(s)
Turns on Concurrent Mode
bsb bsh bsw
bvb bvh bvw
cdDir
cdGet
clear
cm
csb csh csw
devShow
diskBoot
Calculates a Checksum Specified by Command-line Options
Display (Show) Device/Node Table
Disk Boot (Direct-Access Mass-Storage Device)
MVME3100 Single-Board Computer Installation and Use (V3100A/IH1)
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Chapter 3 MOTLoad Firmware
Table 3-1. MOTLoad Commands (continued)
Command
downLoad
Description
Down Load S-Record from Host
ds
One-Line Instruction Disassembler
Echo a Line of Text
echo
elfLoader
errorDisplay
eval
ELF Object File Loader
Display the Contents of the Test Error Status Table
Evaluate Expression
execProgram
fatDir
Execute Program
FAT File System Directory Listing
fatGet
FAT File System File Load
fdShow
flashLock
flashProgram
flashShow
flashUnlock
gd
Display (Show) File Discriptor
Flash Memory Sector Lock
Flash Memory Program
Display Flash Memory Device Configuration Data
Flash Memory Sector Unlock
Go Execute User-Program Direct (Ignore Break-Points)
Global Environment Variable Delete
Global Environment Variable(s) Dump (NVRAM Header + Data)
Global Environment Variable Edit
gevDelete
gevDump
gevEdit
gevInit
Global Environment Variable Area Initialize (NVRAM Header)
Global Environment Variable Labels (Names) Listing
Global Environment Variable Show
Go Execute User-Program to Next Instruction
Go Execute User-Program
gevList
gevShow
gn
go
gt
Go Execute User-Program to Temporary Break-Point
Display History Buffer
hbd
hbx
Execute History Buffer Entry
help
Display Command/Test Help Strings
Display state of L2 Cache and L2CR register contents
Display state of L3 Cache and L3CR register contents
Memory Display Bytes/Halfwords/Words
Display Memory Allocation
l2CacheShow
l3CacheShow
mdb mdh mdw
memShow
mmb mmh mmw
netBoot
netShow
netShut
Memory Modify Bytes/Halfwords/Words
Network Boot (BOOT/TFTP)
Display Network Interface Configuration Data
Disable (Shutdown) Network Interface
MVME3100 Single-Board Computer Installation and Use (V3100A/IH1)
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Chapter 3 MOTLoad Firmware
Table 3-1. MOTLoad Commands (continued)
Command
netStats
Description
Display Network Interface Statistics Data
Turns off Concurrent Mode
noCm
pciDataRd
pciDataWr
pciDump
pciShow
pciSpace
ping
Read PCI Device Configuration Header Register
Write PCI Device Configuration Header Register
Dump PCI Device Configuration Header Register
Display PCI Device Configuration Header Register
Display PCI Device Address Space Allocation
Ping Network Host
portSet
Port Set
portShow
rd
Display Port Device Configuration Data
User Program Register Display
Reset System
reset
rs
User Program Register Set
Set Date and Time
set
sromRead
sromWrite
sta
SROM Read
SROM Write
Symbol Table Attach
stl
Symbol Table Lookup
stop
Stop Date and Time (Power-Save Mode)
Display the Contents of the Active Task Table
Trace (Single-Step) User Program
Trace (Single-Step) User Program to Address
Test Disk
taskActive
tc
td
testDisk
testEnetPtP
testNvramRd
testNvramRdWr
testRam
Ethernet Point-to-Point
NVRAM Read
NVRAM Read/Write (Destructive)
RAM Test (Directory)
testRamAddr
testRamAlt
testRamBitToggle
testRamBounce
testRamCodeCopy
testRamEccMonitor
testRamMarch
testRamPatterns
RAM Addressing
RAM Alternating
RAM Bit Toggle
RAM Bounce
RAM Code Copy and Execute
Monitor for ECC Errors
RAM March
RAM Patterns
MVME3100 Single-Board Computer Installation and Use (V3100A/IH1)
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Chapter 3 MOTLoad Firmware
Table 3-1. MOTLoad Commands (continued)
Command
testRamPerm
Description
RAM Permutations
RAM Quick
testRamQuick
testRamRandom
testRtcAlarm
testRtcReset
testRtcRollOver
testRtcTick
testSerialExtLoop
testSeriallntLoop
testStatus
RAM Random Data Patterns
RTC Alarm
RTC Reset
RTC Rollover
RTC Tick
Serial External Loopback
Serial Internal Loopback
Display the Contents of the Test Status Table
Execute Test Suite
testSuite
testSuiteMake
testThermoOp
testThermoQ
testThermoRange
testWatchdogTimer
tftpGet
Make (Create) Test Suite
Thermometer Temp Limit Operational Test
Thermometer Temp Limit Quick Test
Tests That Board Thermometer is Within Range
Tests the Accuracy of the Watchdog Timer Device
TFTP Get
tftpPut
TFTP Put
time
Display Date and Time
transparentMode
tsShow
Transparent Mode (Connect to Host)
Display Task Status
upLoad
Up Load Binary Data from Target
Display Version String(s)
Manages user specified VME configuration parameters
VPD Display
version
vmeCfg
vpdDisplay
vpdEdit
VPD Edit
waitProbe
Wait for I/O Probe to Complete
MVME3100 Single-Board Computer Installation and Use (V3100A/IH1)
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Chapter 3 MOTLoad Firmware
Default VME Settings
As shipped from the factory, the MVME3100 has the following VME configuration programmed
via Global Environment Variables (GEVs) for the Tsi148 VME controller. The firmware allows
certain VME settings to be changed in order for the user to customize the environment. The
following is a description of the default VME settings that are changeable by the user. For more
information, refer to the MOTLoad User’s Manual and Tundra’s Tsi148 User Manual, listed in
■ MVME3100> vmeCfg –s –m
Displaying the selected Default VME Setting
- interpreted as follows:
VME PCI Master Enable [Y/N] = Y
MVME3100>
The PCI Master is enabled.
■ MVME3100> vmeCfg –s –r234
Displaying the selected Default VME Setting
- interpreted as follows:
VMEbus Master Control Register = 00000003
MVME3100>
The VMEbus Master Control Register is set to the default (RESET) condition.
■ MVME3100> vmeCfg –s –r238
Displaying the selected Default VME Setting
- interpreted as follows:
VMEbus Control Register = 00000008
MVME3100>
The VMEbus Control Register is set to a Global Timeout of 2048 μseconds.
■ MVME3100> vmeCfg –s –r414
Displaying the selected Default VME Setting
- interpreted as follows:
CRG Attribute Register = 00000000
CRG Base Address Upper Register = 00000000
CRG Base Address Lower Register = 00000000
MVME3100>
The CRG Attribute Register is set to the default (RESET) condition.
■ MVME3100> vmeCfg –s –i0
Displaying the selected Default VME Setting
- interpreted as follows:
Inbound Image 0 Attribute Register = 000227AF
Inbound Image 0 Starting Address Upper Register = 00000000
Inbound Image 0 Starting Address Lower Register = 00000000
Inbound Image 0 Ending Address Upper Register = 00000000
Inbound Image 0 Ending Address Lower Register = 1FFF0000
Inbound Image 0 Translation Offset Upper Register = 00000000
Inbound Image 0 Translation Offset Lower Register = 00000000
MVME3100>
MVME3100 Single-Board Computer Installation and Use (V3100A/IH1)
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Chapter 3 MOTLoad Firmware
Inbound window 0 (ITAT0) is not enabled; Virtual FIFO at 256 bytes, 2eSST timing at
SST320, respond to 2eSST, 2eVME, MBLT, and BLT cycles, A32 address space, respond
to Supervisor, User, Program, and Data cycles. Image maps from 0x00000000 to
0x1FFF0000 on the VMbus, translates 1x1 to the PCI-X bus (thus 1x1 to local memory). To
enable this window, set bit 31 of ITAT0 to 1.
Note For Inbound Translations, the Upper Translation Offset Register needs to be set to
0xFFFFFFFF to ensure proper translations to the PCI-X Local Bus.
■ MVME3100> vmeCfg –s –o1
Displaying the selected Default VME Setting
- interpreted as follows:
Outbound Image 1 Attribute Register = 80001462
Outbound Image 1 Starting Address Upper Register = 00000000
Outbound Image 1 Starting Address Lower Register = 91000000
Outbound Image 1 Ending Address Upper Register = 00000000
Outbound Image 1 Ending Address Lower Register = AFFF0000
Outbound Image 1 Translation Offset Upper Register = 00000000
Outbound Image 1 Translation Offset Lower Register = 70000000
Outbound Image 1 2eSST Broadcast Select Register = 00000000
MVME3100>
Outbound window 1 (OTAT1) is enabled, 2eSST timing at SST320, transfer mode of 2eSST,
A32/D32 Supervisory access. The window accepts transfers on the PCI-X Local Bus from
0x91000000-0xAFFF0000 and translates them onto the VMEbus using an offset of
0x70000000, thus an access to 0x91000000 on the PCI-X Local Bus becomes an access
to 0x01000000 on the VMEbus.
■ MVME3100> vmeCfg –s –o2
Displaying the selected Default VME Setting
- interpreted as follows:
Outbound Image 2 Attribute Register = 80001061
Outbound Image 2 Starting Address Upper Register = 00000000
Outbound Image 2 Starting Address Lower Register = B0000000
Outbound Image 2 Ending Address Upper Register = 00000000
Outbound Image 2 Ending Address Lower Register = B0FF0000
Outbound Image 2 Translation Offset Upper Register = 00000000
Outbound Image 2 Translation Offset Lower Register = 40000000
Outbound Image 2 2eSST Broadcast Select Register = 00000000
MVME3100>
Outbound window 2 (OTAT2) is enabled, 2eSST timing at SST320, transfer mode of SCT,
A24/D32 Supervisory access. The window accepts transfers on the PCI-X Local Bus from
0xB0000000-0xB0FF0000 and translates them onto the VMEbus using an offset of
0x40000000, thus an access to 0xB0000000 on the PCI-X Local Bus becomes an access
to 0xF0000000 on the VMEbus.
■ MVME3100> vmeCfg –s –o3
Displaying the selected Default VME Setting
- interpreted as follows:
Outbound Image 3 Attribute Register = 80001061
Outbound Image 3 Starting Address Upper Register = 00000000
Outbound Image 3 Starting Address Lower Register = B3FF0000
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Chapter 3 MOTLoad Firmware
Outbound Image 3 Ending Address Upper Register = 00000000
Outbound Image 3 Ending Address Lower Register = B3FF0000
Outbound Image 3 Translation Offset Upper Register = 00000000
Outbound Image 3 Translation Offset Lower Register = 4C000000
Outbound Image 3 2eSST Broadcast Select Register = 00000000
MVME3100>
Outbound window 3 (OTAT3) is enabled, 2eSST timing at SST320, transfer mode of SCT,
A16/D32 Supervisory access. The window accepts transfers on the PCI-X Local Bus from
0xB3FF0000-0xB3FF0000 and translates them onto the VMEbus using an offset of
0x4C000000, thus an access to 0xB3FF0000 on the PCI-X Local Bus becomes an access
to 0xFFFF0000 on the VMEbus.
■ MVME3100> vmeCfg –s –o7
Displaying the selected Default VME Setting
- interpreted as follows:
Outbound Image 7 Attribute Register = 80001065
Outbound Image 7 Starting Address Upper Register = 00000000
Outbound Image 7 Starting Address Lower Register = B1000000
Outbound Image 7 Ending Address Upper Register = 00000000
Outbound Image 7 Ending Address Lower Register = B1FF0000
Outbound Image 7 Translation Offset Upper Register = 00000000
Outbound Image 7 Translation Offset Lower Register = 4F000000
Outbound Image 7 2eSST Broadcast Select Register = 00000000
MVME3100>
Outbound window 7 (OTAT7) is enabled, 2eSST timing at SST320, transfer mode of SCT,
CR/CSR Supervisory access. The window accepts transfers on the PCI-X Local Bus from
0xB1000000-0xB1FF0000 and translates them onto the VMEbus using an offset of
0x4F000000, thus an access to 0xB1000000 on the PCI-X Local Bus becomes an access
to 0x00000000 on the VMEbus.
Firmware Settings
The following sections provide additional information pertaining to the VME firmware settings
of the MVME3100. A few VME settings are controlled by hardware jumpers while the majority
of the VME settings are managed by the firmware command utility vmeCfg.
CR/CSR Settings
The CR/CSR base address is initialized to the appropriate setting based on the Geographical
address; that is, the VME slot number. See the VME64 Specification and the VME64
Extensions for details. As a result, a 512K byte CR/CSR area can be accessed from the
VMEbus using the CR/CSR AM code.
Displaying VME Settings
To display the changeable VME setting, type the following at the firmware prompt:
■
To display Master Enable state
vmeCfg –s –m
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Chapter 3 MOTLoad Firmware
■
■
■
■
■
■
■
■
To display selected Inbound Window state
vmeCfg –s –i(0 - 7)
To display selected Outbound Window state
vmeCfg –s –o(0 - 7)
To display PCI Miscellaneous Register state
vmeCfg –s –r184
To display Special PCI Target Image Register state
vmeCfg –s –r188
To display Master Control Register state
vmeCfg –s –r400
To display Miscellaneous Control Register state
vmeCfg –s –r404
To display User AM Codes Register state
vmeCfg –s –r40C
To display VMEbus Register Access Image Control Register state
vmeCfg –s –rF70
Editing VME Settings
To edit the changeable VME setting, type the following at the firmware prompt:
■
■
■
■
■
■
■
■
Edits Master Enable state
vmeCfg –e –m
Edits selected Inbound Window state
vmeCfg –e –i(0 - 7)
Edits selected Outbound Window state
vmeCfg –e –o(0 - 7)
Edits PCI Miscellaneous Register state
vmeCfg –e –r184
Edits Special PCI Target Image Register state
vmeCfg –e –r188
Edits Master Control Register state
vmeCfg –e –r400
Edits Miscellaneous Control Register state
vmeCfg –e –r404
Edits User AM Codes Register state
vmeCfg –e –r40C
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Chapter 3 MOTLoad Firmware
■
Edits VMEbus Register Access Image Control Register state
vmeCfg –e –rF70
Deleting VME Settings
To delete the changeable VME setting (restore default value), type the following at the firmware
prompt:
■
■
■
■
■
■
■
■
■
Deletes Master Enable state
vmeCfg –d –m
Deletes selected Inbound Window state
vmeCfg –d –i(0 - 7)
Deletes selected Outbound Window state
vmeCfg –d –o(0 - 7)
Deletes PCI Miscellaneous Register state
vmeCfg –d –r184
Deletes Special PCI Target Image Register state
vmeCfg –d –r188
Deletes Master Control Register state
vmeCfg –d –r400
Deletes Miscellaneous Control Register state
vmeCfg –d –r404
Deletes User AM Codes Register state
vmeCfg –d –r40C
Deletes VMEbus Register Access Image Control Register state
vmeCfg –d –rF70
Restoring Default VME Settings
To restore all of the changeable VME setting back to their default settings, type the following at
the firmware prompt:
vmeCfg –z
Remote Start
Documentation, remote start allows the user to obtain information about the target board,
download code and/or data, modify memory on the target, and execute a downloaded program.
These transactions occur across the VMEbus in the case of the MVME3100. MOTLoad uses
one of four mailboxes in the Tsi148 VME controller as the inter-board communication address
(IBCA) between the host and the target.
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Chapter 3 MOTLoad Firmware
CR/CSR slave addresses configured by MOTLoad are assigned according to the installation
slot in the backplane, as indicated by the VME64 Specification. For reference, the following
values are provided:
Slot Position
CS/CSR Starting Address
0x0008.0000
0x0010.0000
0x0018.0000
0x0020.0000
0x0028.0000
0x0030.0000
0x0038.0000
0x0040.0000
0x0048.0000
0x0050.0000
0x0058.0000
0x0060.0000
1
2
3
4
5
6
7
8
9
A
B
C
For further details on CR/CSR space, please refer to the VME64 Specification, listed in
The MVME3100 uses a TSi148 for its PCI/X-to-VME bus bridge. The offsets of the mailboxes
in the TSi148 are defined in the TSi148 VMEBus PCI/X-to-VME User Manual, listed in
Mailbox 0 is at offset 7f610 in the CR/CSR space
Mailbox 1 is at offset 7f614 in the CR/CSR space
Mailbox 2 is at offset 7f618 in the CR/CSR space
Mailbox 3 is at offset 7f61C in the CR/CSR space
The selection of the mailbox used by remote start on an individual MVME3100 is determined
by the setting of a global environment variable (GEV). The default mailbox is zero. Another GEV
controls whether remote start is enabled (default) or disabled. Refer to the Remote Start
appendix in the MOTLoad Firmware Package User’s Manual for remote start GEV definitions.
The MVME3100’s IBCA needs to be mapped appropriately through the master’s VMEbus
bridge. For example, to use remote start using mailbox 0 on an MVME3100 installed in slot 5,
the master would need a mapping to support reads and writes of address 0x002ff610 in VME
CR/CSR space (0x280000 + 0x7f610).
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Chapter 3 MOTLoad Firmware
Alternate Boot Images and Safe Start
Some later versions of MOTLoad support Alternate Boot Images and a Safe Start recovery
procedure. If Safe Start is available on the MVME3100, Alternate Boot Images are supported.
With Alternate Boot Image support, the bootloader code in the boot block examines the upper
8MB of the flash bank for Alternate Boot images. If an image is found, control is passed to the
image.
Firmware Startup Sequence Following Reset
The firmware startup sequence following reset of MOTLoad is to:
■
■
■
Initialize cache, MMU, FPU, and other CPU internal items
Initialize the memory controller
Search the active flash bank, possibly interactively, for a valid POST image. If found, the
POST images executes. Once completed, the POST image returns and startup continues.
■
■
Search the active flash bank, possibly interactively, for a valid USER boot image. If found,
the USER boot image executes. A return to the boot block code is not anticipated.
If a valid USER boot image is not found, search the active flash bank, possibly interactively,
for a valid Alternate MOTLoad boot image; anticipated to be an upgrade of Alternate
MOTLoad firmware. If found, the image is executed. A return to the boot block code is not
anticipated.
■
Execute the recovery image of the firmware in the boot block if no valid USER or alternate
MOTLoad image is found
During startup, interactive mode may be entered by either setting the Safe Start jumper/switch
or by sending an <ESC> to the console serial port within five seconds of the board reset. During
interactive mode, the user has the option to display locations at which valid boot images were
discovered, specify which discovered image is to be executed, or specify that the recovery
image in the boot block of the active Flash bank is to be executed.
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Chapter 3 MOTLoad Firmware
Firmware Scan for Boot Image
The scan is performed by examining each 1MB boundary for a defined set of flags that identify
the image as being Power On Self Test (POST), USER, or Alternate MOTLoad. POST is a user-
developed Power On Self Test that would perform a set of diagnostics and then return to the
bootloader image. USER would be a boot image, such as the VxWorks bootrom, which would
perform board initialization. A bootable VxWorks kernel would also be a USER image. Boot
images are not restricted to being MB or less in size; however, they must begin on a 1MB
boundary within the 8MB of the scanned flash bank. The Flash Bank Structure is shown below:
Address
Usage
0xFFF00000 to 0xFFFFFFFF
0xFFE00000 to 0XFFFFFFFF
Boot block. Recovery code
Reserved.
(MOTLoad update image)
0xFFD00000 to 0xFFDFFFFF
0xFFC00000 to 0xFFCFFFFF
First possible alternate image
(Bank B / Bank A actual)
Second possible alternate image
(Bank B / Bank A actual)
....
Alternate boot images
0xFF899999 to 0xFF8FFFFF
Bottom of Flash
(Flash size varies per product)
The scan is performed downwards beginning at the location of the first possible alternate image
and searches first for POST, then USER, and finally Alternate MOTLoad images. In the case of
multiple images of the same type, control is passed to the first image encountered in the scan.
Safe Start, whether invoked by hitting ESC on the console within the first five seconds following
power-on reset or by setting the Safe Start jumper, interrupts the scan process. The user may
then display the available boot images and select the desired image. The feature is provided to
enable recovery in cases when the programmed Alternate Boot Image is no longer desired. The
following output is an example of an interactive Safe Start:
ABCDEInteractive Boot Mode Entered
boot> ?
Interactive boot commands:
’d’:show directory of alternate boot images
’c’:continue with normal startup
’q’:quit without executing any alternate boot image
’r [address]’:execute specified (or default) alternate image
’p [address]’:execute specified (or default) POST image
’?’:this help screen
’h’:this help screen
boot> d
Addr FFE00000 Size 00100000 Flags 00000003 Name: MOTLoad
Addr FFD00000 Size 00100000 Flags 00000003 Name: MOTLoad
boot> c
NOPQRSTUVabcdefghijk#lmn3opqrsstuvxyzaWXZ
Copyright Motorola Inc. 1999-2004, All Rights Reserved
MOTLoad RTOS Version 2.0, PAL Version 0.b EA02
MVME3100 Single-Board Computer Installation and Use (V3100A/IH1)
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Chapter 3 MOTLoad Firmware
...
MVME3100>
Valid Boot Images
Valid boot images whether POST, USER, or Alternate MOTLoad, are located on 1MB
boundaries within flash. The image may exceed 1MB in size. An image is determined valid
through the presence of two "valid image keys" and other sanity checks. A valid boot image
begins with a structure as defined in the following table:
Name
Type
Size
8
Notes
UserDefined
ImageKey 1
ImageKey 2
ImageChecksum
ImageSize
unsigned integer
unsigned integer
unsigned integer
unsigned integer
unsigned integer
unsigned character
User defined
1
0x414c5420
1
0x424f4f54
1
Image checksum
Must be a multiple of 4
User defined
1
ImageName
20
1
ImageRamAddress unsigned integer
RAM address
ImageOffset
ImageFlags
ImageVersion
Reserved
unsigned integer
unsigned integer
unsigned integer
unsigned integer
1
Offset from header start to entry
User defined
1
1
8
Reserved for expansion
Checksum Algorithm
The checksum algorithm is a simple unsigned word add of each word (4 byte) location in the
image. The image must be a multiple of 4 bytes in length (word-aligned). The content of the
checksum location in the header is not part of the checksum calculation. The calculation
assumes the location to be zero. The algorithm is implemented using the following code:
Unsigned int checksum(
Unsigned int *startPtr,/* starting address */
Unsigned int endPtr/* ending address */
) {
unsigned int checksum=0;
while (startPtr < endPtr) {
checksum += *startPtr;
startPtr++;
}
return(checksum);
}
MVME3100 Single-Board Computer Installation and Use (V3100A/IH1)
31
Chapter 3 MOTLoad Firmware
MOTLoad Image Flags
The image flags of the header define various bit options that control how the image will be
executed.
Table 3-2. MOTLoad Image Flags
Name
Value
Interpretation
COPY_TO_RAM
0x00000001
Copy image to RAM at ImageRamAddress
before execution
IMAGE_MCG
0x00000002
0x00000004
0x00000008
Alternate MOTLoad image
POST image
IMAGE_POST
DONT_AUTO_RUN
Image not to be executed
COPY_TO_RAM
If set, this flag indicates that the image is to be copied to RAM at the address specified in
the header before control is passed. If not set, the image will be executed in Flash. In both
instances, control will be passed at the image offset specified in the header from the base
of the image.
IMAGE_MCG
If set, this flag defines the image as being an Alternate MOTLoad, as opposed to USER,
image. This bit should not be set by developers of alternate boot images.
IMAGE_POST
If set, this flag defines the image as being a power-on self-test image. This bit flag is used
to indicate that the image is a diagnostic and should be run prior to running either USER or
MCG boot images. POST images are expected, but not required, to return to the boot block
code upon completion.
DONT_AUTO_RUN
If set, this flag indicates that the image is not to be selected for automatic execution. A user,
through the interactive command facility, may specify the image to be executed.
Note MOTLoad currently uses an Image Flag value of 0x3, which identifies itself as an
Alternate MOTLoad image that executes from RAM. MOTLoad currently does not support
execution from flash.
USER Images
These images are user-developer boot code; for example, a VxWorks bootrom image. Such
images may expect the system software state to be as follows upon entry:
■
■
The MMU is disabled.
L1 instruction cache has been initialized and is enabled.
MVME3100 Single-Board Computer Installation and Use (V3100A/IH1)
32
Chapter 3 MOTLoad Firmware
■
■
■
■
■
■
■
L1 data cache has been initialized (invalidated) and is disabled.
L2 cache is disabled.
L3 cache is disabled.
RAM has been initialized and is mapped starting at CPU address 0.
If RAM ECC or parity is supported, RAM has been scrubbed of ECC or parity errors.
The active Flash bank (boot) is mapped from the upper end of the address space.
If specified by COPY_TO_RAM, the image has been copied to RAM at the address
specified by ImageRamAddress.
■
■
CPU register R1 (the stack pointer) has been initialized to a value near the end of RAM.
CPU register R3 is added to the following structure:
typedef struct altBootData {
unsigned int ramSize;/* board’s RAM size in MB */
void flashPtr;/* ptr to this image in flash */
char boardType[16];/* name string, eg MVME3100 */
void globalData;/* 16K, zeroed, user defined */
unsigned int reserved[12];
} altBootData_t;
Alternate Boot Data Structure
The globalData field of the alternate boot data structure points to an area of RAM which was
initialized to zeroes by the boot loader. This area of RAM is not cleared by the boot loader after
execution of a POST image, or other alternate boot image, is executed. It is intended to provide
a user a mechanism to pass POST image results to subsequent boot images.
The boot loader performs no other initialization of the board than that specified prior to the
transfer of control to either a POST, USER, or Alternate MOTLoad image. Alternate boot
images need to initialize the board to whatever state the image may further require for its
execution.
POST images are expected, but not required, to return to the boot loader. Upon return, the boot
loader proceeds with the scan for an executable alternate boot image. POST images that return
control to the boot loader must ensure that upon return, the state of the board is consistent with
the state that the board was in at POST entry. USER images should not return control to the
boot loader.
MVME3100 Single-Board Computer Installation and Use (V3100A/IH1)
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Chapter 3 MOTLoad Firmware
MVME3100 Single-Board Computer Installation and Use (V3100A/IH1)
34
Functional Description
4
This chapter describes the MVME3100 and the MVME721 rear transition module (RTM) on a
block diagram level.
Features
The following tables list the features of the MVME3100 and its RTM.
Table 4-1. MVME3100 Features Summary
Feature
Description
Processor/Host
Controller/Memory
Controller
– Single 833 MHz MPC8540 PowerQUICC III™ integrated
processor (e500 core)
– Integrated 256KB L2 cache/SRAM
– Integrated four-channel DMA controller
– Integrated PCI/PCI-X controller
– Two integrated 10/100/1000 Ethernet controllers
– Integrated 10/100 Ethernet controller
– Integrated dual UART
– Integrated I2C controller
– Integrated programmable interrupt controller
– Integrated local bus controller
– Integrated DDR SDRAM controller
System Memory
I2C Interface
– One SODIMM socket
– Up to DDR333, ECC
– One or two banks of memory on a single SODIMM
– One 8KB VPD serial EEPROM
– Two 64KB user configuration serial EEPROMs
– One real-time clock (RTC) with removable battery
– One temperature sensor
– Interface to SPD(s) on SODIMM and P2 for RTM VPD
Flash
– 128MB soldered Flash with two alternate 1MB boot sectors
selectable via a hardware switch
– Hardware switch or software bit write protection for entire logical
bank
MVME3100 Installation and Use (V3100A/IH1)
35
Chapter 4 Functional Description
Table 4-1. MVME3100 Features Summary (continued)
Feature
Description
PCI Interface
Bus A:
– 66 MHz PCI or PCI-X mode (switch selectable)
– One TSi148 VMEbus controller
– One serial ATA (sATA) controller
– One MPC8540
– Two PCI6520 PCI-X-to-PCI-X bridges (primary side)
Bus B:
– 33/66/100 MHz PCI/PCI-X (PCI 2.2 and PCI-X 1.0b compliant)
– Two +3.3V/5V selectable VIO, 64-bit, single-wide PMC sites or
one double-wide PMC site (PrPMC ANSI/VITA 32-2003 and PCI-X
Auxiliary ANSI/VITA 39-2003 compliant)
– One PCI6520 PCI-X-to-PCI-X bridge (secondary side)
Bus C (-1263 version):
– 33 MHz PCI (PCI 2.2 compliant)
– One USB 2.0 controller
– One PCI expansion connector for interface to PMCspan
– One PCI6520 PCI-X-to-PCI-X bridge (secondary side)
I/O
– One front panel RJ45 connector with integrated LEDs for front I/O:
one serial channel
– One front panel RJ45 connector with integrated LEDs for front I/O:
one 10/100/1000 Ethernet channel
– One front panel external sATA data connector for front I/O: one
sATA channel
– One front panel USB Type A upright receptacle for front I/O: one
USB 2.0 channel (-1263 version)
– PMC site 1 front I/O and rear P2 I/O
– PMC site 2 front I/O
Serial ATA
– One four-channel sATA controller: one channel for front-panel I/O,
one channel for planar I/O, one channel for future rear P0 I/O, and
one channel is not used
– One planar data connector and one planar power connector for
an interface to the sATA hard disk drive
USB (-1263 version)
Ethernet
– One four-channel USB 2.0 controller: one channel for front panel
– Two 10/100/1000 MPC8540 Ethernet channels for front-panel I/O
and rear P2 I/O
– One 10/100 MPC8540 Ethernet channel for rear P2 I/O
Serial Interface
– One 16550-compatible, 9.6 to 115.2 KBAUD, MPC8540,
asynchronous serial channel for front-panel I/O
– One quad UART controller to provide four 16550-compatible, 9.6
to 115.2 KBAUD, asynchronous serial channels for rear P2 I/O
Timers
– Four 32-bit MPC8540 timers
– Four 32-bit timers in a PLD
Watchdog Timer
– One MPC8540 watchdog timer
MVME3100 Installation and Use (V3100A/IH1)
36
Chapter 4 Functional Description
Table 4-1. MVME3100 Features Summary (continued)
Feature
Description
VME Interface
– VME64 (ANSI/VITA 1-1994) compliant
– VME64 Extensions (ANSI/VITA 1.1-1997) compliant
– 2eSST (ANSI/VITA 1.5-2003) compliant
– VITA 41.0, version 0.9 compliant
– Two five-row P1 and P2 backplane connectors
– One TSi148 VMEbus controller
Form Factor
– Standard 6U VME
Miscellaneous
– One front-panel reset/abort switch
– Four front-panel status indicators: 10/100/1000 Ethernet
link/speed and activity, board fail, and user software controlled LED
– Six planar status indicators: one power supply status LED, two
user software controlled LEDs, three sATA activity LEDs (one per
channel)
– One standard 16-pin COP header
– Boundary scan support
– Switches for VME geographical addressing in a three-row
backplane
Software Support
– VxWorks operating system
– Linux operating system
Table 4-2. MVME721 RTM Features Summary
Feature
Description
I/O
– One five-row P2 backplane connector for serial and Ethernet I/O
passed from the MVME3100
– Four RJ-45 connectors for rear-panel I/O: four asynchronous
serial channels
– Two RJ-45 connectors with integrated LEDs for rear panel I/O:
one 10/100/1000 Ethernet channel and one 10/100 Ethernet
channel
– One PIM site with rear-panel I/O
Miscellaneous
– Four status indicators: 10/100/1000 and 10/100 Ethernet
link/speed and activity LEDs
MVME3100 Installation and Use (V3100A/IH1)
37
Chapter 4 Functional Description
Block Diagrams
diagram of the MVME721 rear transition module architecture.
Figure 4-1. MVME3100 Block Diagram
Front Panel
RST/ABORT
sATA
U
S
B
GigE
RJ45
COM1
RJ45
PMC 1 Front IO
PMC 2 Front IO
166 MHz Memory Bus
XCVR
RS232
SODIMM - Up to
1GB DDR Memory
PHY
5461
Serial Port 0
GigE 1
DUART
TSEC1
TSEC2
FEC
DDR MC
User
128KB
RTC
DS1375
VPD
8KB
2
I C Bus
MPC8540
Processor
833 MHz
GigE 2
I2C
Device
Bus
CPLD
Decode
Timers/Regs
10/100
RTC
DS1621
LBC
PCIX
PHY
5461
Serial Ports 1-4
Quart
Flash
16C554
128MB
Bus A
De-pop in -1152
PCI-X 66MHz
PHY
5221
Clock
Distribution
P2P
P2P
PCI6520
PCI6520
Reset
Control
Bus B
PCI-X 66/100 MHz
PCI 33/66 MHz
PMCSpan
Power
Supplies
Bus C
PCI 33 MHz
USB
uPD720101
sATA
GD31244
PMC 1
PMC 2
VME
TSI148
USB 1 USB 2
sATA 1
sATA 0
Planar
Connector
XCVR
22501
XCVR
RS232
VME Bus
2
GigE 2
10/100
COM2 - COM5
P2
PMC 1 Jn4 IO
I
C Bus
USB 2
sATA 2
P0
Future Option
P1
4377 0106
MVME3100 Installation and Use (V3100A/IH1)
38
Chapter 4 Functional Description
Figure 4-2. MVME721 RTM Block Diagram
Rear Panel
Future Option
U
S
B
GigE
RJ45
10/100
RJ45
Serial
RJ45
Serial
RJ45
Serial
RJ45
Serial
RJ45
PIM 10
sATA
PIM
GigE 2
10/100
Serial Port 4
Serial Port 3
Serial Port 2
Serial Port 1
PMC 1 Jn4 10
VPD
8K8
sATA 3
USB 2
I2C Bus
P2
P0
Future Option
4390 0106
Processor
The MVME3100 supports the MPC8540 processor. The processor core frequency runs at 833
or 667 MHz. The MPC8540 has integrated 256KB L2 cache.
System Memory
The MPC8540 provides one standard DDR SDRAM SODIMM socket. This socket supports
standard single or dual bank, unbuffered, SSTL-2 DDR-I, JESD8-9B compliant, SODIMM
module with ECC. The MPC8540 DDR memory interface supports up to 166 MHz (333 MHz
data rate) operation.
Local Bus Interface
The MVME3100 uses the MPC8540 local bus controller (LBC) for access to on-board Flash and
I/O registers. The LBC has programmable timing modes to support devices of different access
times, as well as device widths of 8, 16, and 32 bits.
The MVME3100 uses the LBC in GPCM (general purpose chip select machine) mode to
interface to two physical banks of on-board Flash, an on-board quad UART (QUART), on-board
32-bit timers, and the System Control/Status registers. Refer to the MVME3100 Single-Board
LBC bank and chip select assignments.
MVME3100 Installation and Use (V3100A/IH1)
39
Chapter 4 Functional Description
Flash Memory
The MVME3100 provides one physical bank of soldered-on Flash memory. The bank is
composed of two physical Flash devices configured to operate in 16-bit mode to form a 32-bit
Flash bank. The default configuration for the MVME3100-1263 is 128MB using two 512Mb
devices, and for the MVME3100-1152 it is 64MB using two 256Mb devices.
Refer to the MVME3100 Single-Board Computer Programmer’s Reference Guide listed in
Control and Timers Logic
The MVME3100 control and timers logic resides on the local bus. This logic provides the
following functions on the board:
■
■
■
■
■
Local bus address latch
Chip selects for Flash banks and QUART
System Control and Status registers
Four 32-bit tick timers
Real-time clock (RTC) 1 MHz reference clock
Refer to the MVME3100 Single-Board Computer Programmer’s Reference Guide listed in
I2C Serial Interface and Devices
The MVME3100 provides the following on-board I2C serial devices connected to the MPC8540
I2C controller interface:
■
■
■
■
■
■
8KB serial EEPROM for VPD
Two 64KB serial EEPROMs for user configuration data storage
256 byte serial EEPROM on SODIMM for SPD
Maxim DS1375 RTC
Maxim DS1621 temperature sensor
8KB serial EEPROM on RTM VPD
The Maxim DS1375 RTC implemented on the MVME3100 provides an alarm interrupt routed
to the MPC8540 programmable interrupt controller (PIC). A Maxim DS32KHz temperature
controlled crystal oscillator provides the RTC reference. A battery backup circuit for the RTC is
provided on board.
The Maxim DS1621 digital temperature sensor provides a measure of the temperature of the
board.
MVME3100 Installation and Use (V3100A/IH1)
40
Chapter 4 Functional Description
The I2C interface is also routed to the on-board SODIMM socket. This allows the serial
presence detect (SPD) in the serial EEPROM, which is located on the memory module, to be
read and used to configure the memory controller accordingly. Similarly, the I2C interface is
routed to the P2 connector for access to the serial EEPROM located on the RTM. The device
address for the RTM serial EERPOM is user-selectable using configuration switches on the
RTM.
Ethernet Interfaces
The MVME3100 provides one 10/100 and two 10/100/1000 Mb/s full duplex Ethernet interfaces
using the MPC8540 Fast Ethernet Controller (FEC) and two Triple Speed Ethernet Controllers
(TSEC). A Broadcom BCM5461S PHY is used for each TSEC interface, and each TSEC
interface and PHY is configured to operate in GMII mode. One Gigabit Ethernet interface is
routed to a front-panel RJ-45 connector with integrated LEDs for speed and activity indication.
The other Gigabit Ethernet interface is routed to P2 for rear I/O.
A Broadcom BCM5221 PHY is used for the FEC interface. The Fast Ethernet interface is routed
to P2 for rear I/O. Isolation transformers are provided on-board for each interface. The assigned
PHY addresses for the MPC8540 MII management (MIIM) interface can be found in the
MVME3100 Single-Board Computer Programmer’s Reference Guide, listed in Appendix B,
Each Ethernet interface is assigned an Ethernet Station Address. The address is unique for
each device. The Ethernet Station Addresses are displayed on labels attached to the PMC
front-panel keep-out area.
Asynchronous Serial Ports
The MVME3100 board contains one front-access asynchronous serial port interface using
serial port 0 from the MPC8540 dual UART (DUART) device. This serial port is routed to the
RJ-45 front-panel connector.
This board also contains one quad UART (QUART) device connected to the MPC8540 device
controller bus to provide additional asynchronous serial ports. The QUART provides four
asynchronous serial ports,
SP1 – SP4, which are routed to the P2 connector. Refer to the ST16C554D Datasheet listed in
MVME3100 Installation and Use (V3100A/IH1)
41
Chapter 4 Functional Description
PCI/PCI-X Interfaces and Devices
The MVME3100 provides three separate PCI/PCI-X bus segments. Bus segment A operates in
66 MHz PCI or PCI-X mode and is connected to the MPC8540, the TSi148 VME controller, the
serial ATA (sATA) controller, and two PCI-X-to-PCI-X bridges. Bus segment B is bridged
between bus A and the two PMC sites and operates in 33/66 MHz PCI or 66/100 MHz PCI-X
mode depending on the slowest speed PMC installed. Bus segment C is bridged between bus
A, the USB controller, and the PMCspan connector. Bus C operates at 33 MHz PCI mode.
MPC8540 PCI-X Interface
The MPC8540 PCI-X controller operates in PCI or PCI-X, host bridge mode depending on the
state of the Bus A mode switch. The mode cannot be changed by software. Refer to the
details and/or programming information.
TSi148 VME Controller
The VMEbus interface for the MVME3100 is provided by the TSi148 ASIC. The TSi148 provides
the required VME, VME extensions, and 2eSST functions. Transceivers are used to buffer the
VME signals between the TSi148 and the VME backplane. Refer to the TSi148 User’s Manual
information.
Serial ATA Host Controller
The sATA host controller uses the Intel GD31244 PCI-X to sATA controller. This device provides
four sATA channels at 1.5Gb/s and is compliant with the Serial ATA: High speed serialized AT
Attachment Specification, Revision 1.0e. It also supports the native command queuing feature
of sATA II.
The MVME3100 uses two of the four sATA channels. Channel 0 is routed to a sATA connector
mounted on the front panel for an external drive connection. Channel 1 is routed to a planar
sATA connector for an "inside the chassis" drive connection. Colocated with the planar
connector is a sATA power connector. At power-up, the controller is configured to operate in
either legacy (Native PCI IDE) mode or Direct Port Access (DPA) mode, controlled by the sATA
mode switch. The mode cannot be changed by software.
The MVME3100 provides two LEDs to indicate sATA channel activity. The function of the LEDs
depends on the operating mode of the 31244 (legacy or DPA mode).
Refer to the 31244 PCI-X to Serial ATA Controller Datasheet and 31244 PCI-X to Serial ATA
details and/or programming information
MVME3100 Installation and Use (V3100A/IH1)
42
Chapter 4 Functional Description
PCI-X-to-PCI-X Bridges
The MVME3100 uses two PLX PCI6520 PCI-X-to-PCI-X bridges to isolate the primary PCI bus,
bus A. These bridges isolate bus A from bus B with the PMC sites and from bus C with the USB
controller and PMCspan interface. The PCI6520 is a 64-bit, 133 MHz, PCI-X r1.0b compliant
device. It operates asynchronously between 33 MHz and 133 MHz on either primary or
Documentation, for additional details and/or programming information.
PCI Mezzanine Card Slots
The MVME3100 provides two PMC sites that support standard PMCs or PrPMCs. Both PMC
sites are located on PCI bus B and operate at the same speed and mode as determined by the
slowest PMC module. The board routing supports a maximum of 100 MHz PCI-X operation on
each site. Signaling voltage (Vio) for the two PMC sites is dependent on keying pin installation
options and can be configured for 5V or 3.3V. Both sites must be configured for the same Vio
voltage or the Vio voltage will be disabled. Each PMC site has enough 3.3V and 5V power
allocated to support a 25 watt (max) PMC or PrPMC from either supply.
PMC slot 1 supports:
Mezzanine Type:
Mezzanine Size:
PMC = PCI Mezzanine Card
S1B = Single width and standard depth
(75mm x 150mm) with front panel
PMC Connectors:
Signaling Voltage:
J11, J12, J13, and J14 (32/64-bit PCI with front and
rear I/O)
VIO = +3.3V (+5V tolerant) or +5V, selected by keying
pin
PMC slot 2 supports:
Mezzanine Type:
Mezzanine Size:
PMC = PCI Mezzanine Card
S1B = Single width and standard depth
(75mm x 150mm) with front panel
PMC Connectors:
Signalling Voltage:
J21, J22, and J23 (32/64-bit PCI with front I/O)
VIO = +3.3V (+5V tolerant) or +5V, selected by keying
pin
Note You cannot use 3.3V and 5V PMCs together; the voltage keying pin on slots 1 and 2 must
be identical. When in 5V mode, the bus runs at 33 MHz.
In addition, the PMC connectors are located such that a double-width PMC may be installed in
place of the two single-width PMCs.
MVME3100 Installation and Use (V3100A/IH1)
43
Chapter 4 Functional Description
In this case, the MVME3100 supports:
Mezzanine Type:
Mezzanine Size:
PMC = PCI Mezzanine Card
Double width and standard depth
(150mm x 150mm) with front panel
PMC Connectors:
Signaling Voltage:
J11, J12, J13, J14, J21, J22, and J23
(32/64-bit PCI with front and rear I/O) on J14 only
VIO = +3.3V (+5V tolerant) or +5V, selected by keying
pin
Note On PMC site 1, the user I/O – J14 signals will only support the low-current, high-speed
signals and are not to be used for any current bearing power supply usage. The maximum
current rating of each pin/signal is 100 mA.
USB
The USB 2.0 host controller provides USB ports with integrated transceivers for connectivity
with any USB-compliant device or hub. USB channel 1 is routed to a single USB connector
located at the front panel. DC power to the front panel USB port is supplied via a USB power
switch, which provides soft-start, current limiting, over-current detection, and power enable for
Related Documentation, for additional details.
PMC Expansion
The MVM3E3100 provides additional PMC module capability through the use of a connector on
bus C that is compatible with the PMCspan boards. Up to four additional PMC modules may be
added by using existing PMCspan boards. Refer to the PMCspan PMC Adapter Carrier Board
General-Purpose Timers
There are a total of eight independent, 32-bit timers. Four timers are integrated into the
MPC8540 and four timers are in the PLD. The four MPC8540 timers are clocked by the RTC
input, which is driven by a 1 MHz clock. The clock source for the four timers in the PLD is 25
for additional details and/or programming information.
Real-time Clock Battery
There is an on-board Renata SMT battery holder on the MVME3100. This SMTU2430-1 holder
allows for quick and easy replacement of a 3V button cell lithium battery (CR2430), which
provides back-up power to the on-board DS1375 RTC. A battery switching circuit provides
automatic switching between the 3.3V and battery voltages. The battery provides backup power
to the RTC for a minimum of one year at nominal temperature.
MVME3100 Installation and Use (V3100A/IH1)
44
Chapter 4 Functional Description
Reset Control Logic
The sources of reset on the MVME3100 are the following:
Power-up
Reset switch
■
■
■
■
■
Watchdog timer
System Control register bit
VMEbus reset
A board-level hard reset generates a reset for the entire board including the MPC8540, local
PCI/PCI-X buses, Ethernet PHYs, serial ports, Flash devices, and PLD(s). If the MVME3100 is
configured as the VME system controller, the VME bus and local TSi148 reset input are also
reset.
Debug Support
The MVME3100 provides a boundary scan header for boundary scan test access and device
programming. This board also provides a separate standard COP header for MPC8540 COP
emulation.
MVME3100 Installation and Use (V3100A/IH1)
45
Chapter 5 Pin Assignments
Connectors
PMC Expansion Connector (J4)
One 114-pin Mictor connector with a center row of power and ground pins is used to provide
PCI expansion capability. The pin assignments for this connector are as follows:
Table 5-1. PMC Expansion Connector (J4)
Pin Assignments
Pin
1
Signal
+3.3V
Signal
Pin
2
GND
+3.3V
3
PCICLK
GND
PMCINTA#
PMCINTB#
PMCINTC#
PMCINTD#
TDI
4
5
6
7
PURST#
HRESET#
TDO
8
9
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
11
13
15
17
19
21
23
25
27
29
31
33
35
37
TMS
TCK
TRST#
PCIXGNT#
+12V
PEP#
PCIXREQ#
-12V
PERR#
LOCK#
DEVSEL#
GND
SERR#
No Connect
No Connect
PCI XCAP
IRDY#
TRDY#
STOP#
GND
FRAME#
M66EN
ACK64#
REQ64#
No Connect
No Connect
MVME3100 Installation and Use (V3100A/IH1)
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Chapter 5 Pin Assignments
Table 5-1. PMC Expansion Connector (J4)
Pin Assignments (continued)
Pin
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
Signal
PAR
Signal
PCIRST#
C/BE0#
C/BE2#
AD0
Pin
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
+5V
C/BE1#
C/BE3#
AD1
AD3
AD2
AD5
AD4
AD7
AD6
AD9
AD8
AD11
AD13
AD15
AD17
AD19
AD21
AD23
AD25
AD27
AD29
AD31
AD10
AD12
AD14
AD16
AD18
AD20
AD22
AD24
AD26
AD28
AD30
MVME3100 Installation and Use (V3100A/IH1)
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Chapter 5 Pin Assignments
Table 5-1. PMC Expansion Connector (J4)
Pin Assignments (continued)
Pin
77
Signal
PAR64
C/BE5#
C/BE7#
AD33
AD35
AD37
AD39
AD41
AD43
AD45
AD47
AD49
AD51
AD53
AD55
AD57
AD59
AD61
AD63
Signal
No Connect
C/BE4#
C/BE6#
AD32
Pin
78
GND
79
80
81
82
83
84
85
AD34
86
87
AD36
88
89
AD38
90
91
AD40
92
93
AD42
94
95
AD44
96
97
AD46
98
99
AD48
100
102
104
106
108
110
112
114
101
103
105
107
109
111
113
AD50
AD52
AD54
AD56
AD58
AD60
AD62
All PMC expansion signals are shared with the USB controller.
Ethernet Connectors (GENET1/J41B, GENET2/J2B, ENET1/J2A)
There is one 10/100 and two 10/100/1000Mb/s full duplex Ethernet interfaces using the
MPC8540 Fast Ethernet Controller (FEC) and two Triple Speed Ethernet Controllers (TSEC).
One Gigabit Ethernet interface is routed to a front-panel RJ-45 connector with integrated LEDs
for speed and activity indication. The other Gigabit Ethernet interface and the 10/100 interface
are routed to P2 for rear I/O. The pin assignments for these connectors are as follows:
Table 5-2. Ethernet Connectors Pin Assignment
Pin #
Signal
1000 Mb/s
_DA+
10/100 Mb/s
TD+
1
2
3
4
MDIO0+
MDIO0-
MDIO1+
MDIO1-
_DA-
TD-
_DB+
RD+
_DC+
Not Used
MVME3100 Installation and Use (V3100A/IH1)
50
Chapter 5 Pin Assignments
Table 5-2. Ethernet Connectors Pin Assignment (continued)
Pin #
Signal
1000 Mb/s
_DC-
10/100 Mb/s
Not Used
RD-
5
6
7
8
MDIO2+
MDIO2-
MDIO3+
MDIO3-
_DB-
_DD+
Not Used
Not Used
_DD-
PCI Mezzanine Card (PMC) Connectors (J11 – J14, J21 – J23)
There are seven 64-pin SMT connectors on the MVME3100 to provide 32/64-bit PCI interfaces
and P2 I/O for one optional add-on PMC.
Note PMC slot connector J14 contains the signals that go to VME P2 I/O rows A, C, D, and Z.
The pin assignments for these connectors are as follows.
Table 5-3. PMC Slot 1 Connector (J11)
Pin Assignments
Pin
1
Signal
TCK
Signal
-12V
Pin
2
3
GND
INTA#
INTC#
+5V
4
5
INTB#
6
7
PMCPRSNT1#
INTD#
8
9
PCI_RSVD
+3.3Vaux
GND
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
GND
CLK
GND
PMCGNT1#
+5V
PMCREQ1#
+3.3V (VIO)
AD28
AD31
AD27
AD25
GND
GND
C/BE3#
AD21
AD22
AD19
+5V
+3.3V (VIO)
FRAME#
GND
AD17
GND
IRDY#
+5V
DEVSEL#
GND
LOCK#
MVME3100 Installation and Use (V3100A/IH1)
51
Chapter 5 Pin Assignments
Table 5-3. PMC Slot 1 Connector (J11)
Pin Assignments (continued)
Pin
41
43
45
47
49
51
53
55
57
59
61
63
Signal
PCI_RSVD
PAR
Signal
PCI_RSVD
GND
Pin
42
44
46
48
50
52
54
56
58
60
62
64
+3.3V (VIO)
AD12
AD15
AD11
AD09
+5V
GND
C/BE0#
AD05
AD06
AD04
GND
+3.3V (VIO)
AD02
AD03
AD01
AD00
+5V
GND
REQ64#
Table 5-4. PMC Slot 1 Connector (J12)
Pin Assignments
Pin
1
Signal
+12V
Signal
TRST#
TDO
Pin
2
3
TMS
4
5
TDI
GND
6
7
GND
Not Used
Not Used
+3.3V
8
9
Not Used
Pull-up
RST#
+3.3V
Not Used
AD30
GND
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
11
13
15
17
19
21
23
25
27
29
31
33
35
37
Pull-down
Pull-down
GND
AD29
AD26
AD24
IDSEL1
+3.3V
AD18
AD16
GND
+3.3V
AD23
AD20
GND
C/BE2#
IDSEL1B
+3.3V
TRDY#
GND
STOP#
MVME3100 Installation and Use (V3100A/IH1)
52
Chapter 5 Pin Assignments
Table 5-4. PMC Slot 1 Connector (J12)
Pin Assignments (continued)
Pin
39
41
43
45
47
49
51
53
55
57
59
61
63
Signal
PERR#
+3.3V
Signal
GND
Pin
40
42
44
46
48
50
52
54
56
58
60
62
SERR#
GND
C/BE1#
AD14
AD13
M66EN
AD08
AD10
+3.3V
AD07
REQ1B#
GNT1B#
GND
+3.3V
Not Used
Not Used
GND
EREADY0
Not Used
+3.3V
ACK64#
GND
No Connect (MONARCH#)
64
Table 5-5. PMC Slot 1 Connector (J13)
Pin Assignments
Pin
1
Signal
Reserved
GND
Signal
GND
Pin
2
3
C/BE7#
C/BE5#
GND
4
5
C/BE6#
C/BE4#
+3.3V (VIO)
AD63
6
7
8
9
PAR64
AD62
GND
10
12
14
16
18
20
22
24
26
28
30
32
34
36
11
13
15
17
19
21
23
25
27
29
31
33
35
AD61
GND
AD60
AD58
GND
AD59
AD57
+3.3V (VIO)
AD55
AD56
AD54
GND
AD53
GND
AD52
AD50
GND
AD51
AD49
GND
AD48
AD46
AD47
MVME3100 Installation and Use (V3100A/IH1)
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Chapter 5 Pin Assignments
Table 5-5. PMC Slot 1 Connector (J13)
Pin Assignments (continued)
Pin
37
39
41
43
45
47
49
51
53
55
57
59
61
63
Signal
AD45
Signal
GND
Pin
38
40
42
44
46
48
50
52
54
56
58
60
62
64
+3.3V (VIO)
AD43
AD44
AD42
GND
AD41
GND
AD40
AD38
GND
AD39
AD37
GND
AD36
AD34
GND
AD35
AD33
+3.3V (VIO)
Reserved
Reserved
GND
AD32
Reserved
GND
Reserved
Table 5-6. PMC Slot 1 Connector (J14)
Pin Assignments
Pin
1
Signal
Signal
Pin
2
PMC1_1 (P2-C1)
PMC1_3 (P2-C2)
PMC1_5 (P2-C3)
PMC1_7 (P2-C4)
PMC1 _9 (P2-C5)
PMC1_11 (P2-C6)
PMC1_13 (P2-C7)
PMC1_15 (P2-C8)
PMC1_17 (P2-C9)
PMC1_19 (P2-C10)
PMC1PMC1_21 (P2-C11)
PMC1_23 (P2-C12)
PMC1_25 (P2-C13)
PMC1_27 (P2-C14)
PMC1_29 (P2-C15)
PMC1_31 (P2-C16)
PMC1_33 (P2-C17)
PMC1_2 (P2-A1)
PMC1_4 (P2-A2)
PMC1_6 (P2-A3)
PMC1_8 (P2-A4)
PMC1_10 (P2-A5)
PMC1_12 (P2-A6)
PMC1_14 (P2-A7)
PMC1_16 (P2-A8)
PMC1_18 (P2-A9)
PMC1_20 (P2-A10)
PMC1_22 (P2-A11)
PMC1_24 (P2-A12)
PMC1_26 (P2-A13)
PMC1_28 (P2-A14)
PMC1_30 (P2-A15)
PMC1_32 (P2-A16)
PMC1_34 (P2-A17)
3
4
5
6
7
8
9
10
12
14
16
18
20
22
24
26
28
30
32
34
11
13
15
17
19
21
23
25
27
29
31
33
MVME3100 Installation and Use (V3100A/IH1)
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Chapter 5 Pin Assignments
Table 5-6. PMC Slot 1 Connector (J14)
Pin Assignments (continued)
Pin
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
Signal
Signal
Pin
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
PMC1_35 (P2-C18)
PMC1_37 (P2-C19)
PMC1_39 (P2-C20)
PMC1_41 (P2-C21)
PMC1_43 (P2-C22)
PMC1_45 (P2-C23)
PMC1_47 (P2-C24)
PMC1_49 (P2-C25)
PMC1_51 (P2-C26)
PMC1_53 (P2-C27)
PMC1_55 (P2-C28)
PMC1_57 (P2-C29)
PMC1_59 (P2-C30)
PMC1_61 (P2-C31)
PMC1_63 (P2-C32)
PMC1_36 (P2-A18)
PMC1_38 (P2-A19)
PMC1_40 (P2-A20)
PMC1_42 (P2-A21)
PMC1_44 (P2-A22)
PMC1_46 (P2-A23)
PMC1_48 (P2-A24)
PMC1_50 (P2-A25)
PMC1_52 (P2-A26)
PMC1_54 (P2-A27)
PMC1_56 (P2-A28)
PMC1_58 (P2-A29)
PMC1_60 (P2-A30)
PMC1_62 (P2-A31)
PMC1_64 (P2-A32)
Table 5-7. PMC Slot 2 Connector (J21)
Pin Assignments
Pin
1
Signal
TCK
Signal
-12V
Pin
2
3
GND
INTC#
INTA#
+5V
4
5
INTD#
6
7
PMCPRSNT1#
INTB#
8
9
PCI_RSVD
+3.3Vaux
GND
10
12
14
16
18
20
22
24
26
28
30
32
11
13
15
17
19
21
23
25
27
29
31
GND
CLK
GND
PMCGNT1#
+5V
PMCREQ1#
+3.3V (VIO)
AD28
AD31
AD27
AD25
GND
GND
C/BE3#
AD21
AD22
AD19
+5V
+3.3V (VIO)
AD17
MVME3100 Installation and Use (V3100A/IH1)
55
Chapter 5 Pin Assignments
Table 5-7. PMC Slot 2 Connector (J21)
Pin Assignments (continued)
Pin
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
Signal
FRAME#
GND
Signal
GND
Pin
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
IRDY#
+5V
DEVSEL#
GND
LOCK#
PCI_RSVD
GND
PCI_RSVD
PAR
+3.3V (VIO)
AD12
AD15
AD11
+5V
AD09
GND
C/BE0#
AD05
GND
AD06
AD04
+3.3V (VIO)
AD02
AD03
AD01
+5V
AD00
GND
REQ64#
Table 5-8. PMC Slot 2 Connector (J22)
Pin Assignments
Pin
1
Signal
+12V
Signal
TRST#
TDO
Pin
2
3
TMS
4
5
TDI
GND
6
7
GND
Not Used
Not Used
+3.3V
8
9
Not Used
Pull-up
RST#
+3.3V
Not Used
AD30
GND
10
12
14
16
18
20
22
24
26
28
30
11
13
15
17
19
21
23
25
27
29
Pull-down
Pull-down
GND
AD29
AD26
AD24
IDSEL1
+3.3V
AD18
+3.3V
AD23
AD20
GND
MVME3100 Installation and Use (V3100A/IH1)
56
Chapter 5 Pin Assignments
Table 5-8. PMC Slot 2 Connector (J22)
Pin Assignments (continued)
Pin
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
Signal
AD16
Signal
C/BE2#
IDSEL1B
+3.3V
Pin
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
GND
TRDY#
GND
STOP#
GND
PERR#
+3.3V
SERR#
GND
C/BE1#
AD14
AD13
M66EN
AD08
AD10
+3.3V
AD07
REQ1B#
GNT1B#
GND
+3.3V
Not Used
Not Used
GND
EREADY1
Not Used
+3.3V
ACK64#
GND
No Connect (MONARCH#)
64
Table 5-9. PMC Slot 2 Connector (J23)
Pin Assignments
Pin
1
Signal
Reserved
GND
Signal
GND
Pin
2
3
C/BE7#
C/BE5#
GND
4
5
C/BE6#
C/BE4#
+3.3V (VIO)
AD63
6
7
8
9
PAR64
AD62
GND
10
12
14
16
18
20
22
24
26
28
11
13
15
17
19
21
23
25
27
AD61
GND
AD60
AD58
GND
AD59
AD57
+3.3V (VIO)
AD55
AD56
AD54
GND
AD53
GND
AD52
MVME3100 Installation and Use (V3100A/IH1)
57
Chapter 5 Pin Assignments
Table 5-9. PMC Slot 2 Connector (J23)
Pin Assignments (continued)
Pin
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
Signal
AD51
Signal
AD50
GND
Pin
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
AD49
GND
AD48
AD46
GND
AD47
AD45
+3.3V (VIO)
AD43
AD44
AD42
GND
AD41
GND
AD40
AD38
GND
AD39
AD37
GND
AD36
AD34
GND
AD35
AD33
+3.3V (VIO)
Reserved
Reserved
GND
AD32
Reserved
GND
Reserved
Serial Port Connectors (COM1/J41A, COM2–COM5/J2A-D)
There is one front access asynchronous serial port interface (SP0) that is routed to the RJ-45
front-panel connector. There are four asynchronous serial port interfaces, SP1 – SP4, which
are routed to the P2 connector. The pin assignments for these connectors are as follows:
Table 5-10. COM Port Connector Pin Assignments
Pin
1
Signal
No connect
RTS
2
3
GND
4
TX
5
RX
6
GND
7
CTS
8
No connect
MVME3100 Installation and Use (V3100A/IH1)
58
Chapter 5 Pin Assignments
VMEbus P1 Connector
The VME P1 connector is a 160-pin DIN. The P1 connector provides power and VME signals
for 24-bit address and 16-bit data. The pin assignments for the P1 connector is as follows:
Table 5-11. VMEbus P1 Connector Pin Assignments
ROW Z
Reserved
GND
ROW A
D00
ROW B
BBSY*
BCLR*
ACFAIL*
BG0IN*
BG0OUT*
BG1IN*
BG1OUT*
BG2IN*
BG2OUT*
BG3IN*
BG3OUT*
BR0*
ROW C
D08
ROW D
1
+5V
1
2
D01
D09
GND
2
3
Reserved
GND
D02
D10
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
GAP_L
3
4
D03
D11
4
5
Reserved
GND
D04
D12
5
6
D05
D13
6
7
Reserved
GND
D06
D14
7
8
D07
D15
8
9
Reserved
GND
GND
SYSCLK
GND
DS1*
DS0*
WRITE*
GND
DTACK*
GND
AS*
GND
SYSFAIL*
BERR*
SYSRESET*
LWORD*
AM5
A23
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
GA0_L
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Reserved
GND
GA1_L
Reserved
GA2_L
Reserved
GND
BR1*
BR2*
Reserved
GA3_L
Reserved
GND
BR3*
AM0
A22
Reserved
GA4_L
Reserved
GND
AM1
A21
AM2
A20
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
GND
Reserved
GND
GND
IACK*
IACKIN*
IACKOUT*
AM4
AM3
A19
GND
A18
Reserved
GND
SERA
SERB
GND
A17
A16
Reserved
GND
A15
A07
IRQ7*
IRQ6*
IRQ5*
IRQ4*
IRQ3*
IRQ2*
IRQ1*
+5VSTDBY
+5V
A14
Reserved
GND
A06
A13
A05
A12
Reserved
GND
A04
A11
A03
A10
Reserved
GND
A02
A09
A01
A08
Reserved
GND
-12V
+5V
+12V
+5V
+5V
MVME3100 Installation and Use (V3100A/IH1)
59
Chapter 5 Pin Assignments
VMEbus P2 Connector
The VME P2 connector is a 160-pin DIN. Row B of the P2 connector provides power to the
MVME3100 and to the upper eight VMEbus address lines and additional 16 VMEbus data lines.
The pin assignments for the P2 connector are the same for both the MVME3100 and
MVME721, and are as follows:
Table 5-12. VME P2 Connector Pinouts
Pin
1
P2-Z
P2-A
P2-B
+5V
P2-C
P2-D
SP1RX
GND
PMC1_IO2
PMC1_IO4
PMC1_IO6
PMC1_IO8
PMC1_IO10
PMC1_IO12
PMC1_IO14
PMC1_IO16
PMC1_IO18
PMC1_IO20
PMC1_IO22
PMC1_IO24
PMC1_IO26
PMC1_IO28
PMC1_IO30
PMC1_IO32
PMC1_IO34
PMC1_IO36
PMC1_IO38
PMC1_IO40
PMC1_IO42
PMC1_IO44
PMC1_IO46
PMC1_IO48
PMC1_IO50
PMC1_IO52
PMC1_IO54
PMC1_IO56
PMC1_IO1
PMC1_IO3
E1-1+
E1-1-
GND
2
GND
3
SPITX
GND
VRETRY_L PMC1_IO5
4
VA24
VA25
VA26
VA27
VA28
VA29
VA30
VA31
GND
+5V
PMC1_IO7
E1-2+
E1-2-
GND
5
SP1CTS
GND
PMC1_IO9
6
PMC1_IO11
PMC1_IO13
PMC1_IO15
PMC1_IO17
PMC1_IO19
PMC1_IO21
PMC1_IO23
PMC1_IO25
PMC1_IO27
PMC1_IO29
PMC1_IO31
PMC1_IO33
PMC1_IO35
PMC1_IO37
PMC1_IO39
PMC1_IO41
PMC1_IO43
PMC1_IO45
PMC1_IO47
PMC1_IO49
PMC1_IO51
PMC1_IO53
PMC1_IO55
7
SP1RTS
GND
NC
8
NC
9
SP2RX
GND
GND
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
NC
SP2TX
GND
NC
GND
SP2CTS
GND
I2C_SDA
I2C_SCL
E1_LINK
E1_ACT
E2_LINK
E2_ACT
GND
VD16
VD17
VD18
VD19
VD20
VD21
VD22
VD23
GND
VD24
VD25
VD26
VD27
VD28
VD29
SP2RTS
GND
SP3RX
GND
SP3TX
GND
E2-4-
E2-4+
GND
SP3CTS
GND
SP3RTS
GND
E2-3-
E2-3+
GND
SP4RX
GND
E2-2-
E2-2+
GND
SP4TX
GND
MVME3100 Installation and Use (V3100A/IH1)
60
Chapter 5 Pin Assignments
Table 5-12. VME P2 Connector Pinouts (continued)
Pin
29
30
31
32
P2-Z
P2-A
P2-B
VD30
VD31
GND
+5V
P2-C
P2-D
E2-1-
E2-1+
GND
+5V
SP4CTS
GND
PMC1_IO58
PMC1_IO60
PMC1_IO62
PMC1_IO64
PMC1_IO57
PMC1_IO59
PMC1_IO61
PMC1_IO63
SP4RTS
GND
MVME721 PMC I/O Module (PIM) Connectors (J10, J14)
PMC Host I/O connector J10 routes only power and ground from VME P2. There are no Host
I/O signals on this connector. The MVME3100 routes PMC I/O from J14 of PMC Slot 1 to VME
P2 rows A and C. The MVME721 routes these signals (pin-for-pin) from VME P2 to PMC I/O
Table 5-13. MVME721 Host I/O Connector (J10) Pin Assignments
1
No Connect
No Connect
+5V
No Connect
No Connect
No Connect
No Connect
+3.3V
2
3
4
5
6
7
No Connect
No Connect
No Connect
GND
8
9
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
No Connect
No Connect
No Connect
GND
No Connect
No Connect
No Connect
+5V
No Connect
No Connect
No Connect
+3.3V
No Connect
No Connect
No Connect
GND
No Connect
No Connect
No Connect
GND
No Connect
No Connect
No Connect
+5V
No Connect
No Connect
No Connect
+3.3V
No Connect
No Connect
No Connect
GND
No Connect
No Connect
No Connect
No Connect
MVME3100 Installation and Use (V3100A/IH1)
61
Chapter 5 Pin Assignments
Table 5-13. MVME721 Host I/O Connector (J10) Pin Assignments
49
51
53
55
57
59
61
63
No Connect
No Connect
+5V
GND
50
52
54
56
58
60
62
64
No Connect
No Connect
No Connect
+3.3V
No Connect
No Connect
No Connect
No Connect
No Connect
No Connect
No Connect
No Connect
Planar sATA Power Connector (J30)
There is one 2mm pitch header installed as a planar header on the MVME3100 board to provide
power to a serial ATA (sATA) drive mounted on the board or somewhere within the chassis. The
pin assignments for this header are as follows:
Table 5-14. Planar sATA Power Connector (J30) Pin
Assignments
Pin
1
Signal
+5V
2
+5V
3
GND
GND
4
USB Connector (J27)
There is one USB Type A connector located on the MVME3100 front panel. The pin
assignments are as follows:
Table 5-15. USB Connector (J27) Pin Assignments
Pin
1
Signal
USB_VBUS (+5.0V)
USB_DATA-
USB_DATA+
GND
2
3
4
MVME3100 Installation and Use (V3100A/IH1)
62
Chapter 5 Pin Assignments
sATA Connectors (J28 and J29)
The MVME3100 has two sATA connectors. J28 is an internal type sATA connector located on
the planar and is intended to connect to a drive located on the board or somewhere inside the
chassis. J29 is an external type sATA connected located on the front panel and is intended to
connect to an external sATA drive. The pin assignment for these connectors is as follows:
Table 5-16. sATA Connectors (J28 and J29) Pin Assignments
Pin
1
Signal
GND
2
SATA_TX+
SATA_TX-
GND
3
4
5
SATA_RX-
SATA_RX+
GND
6
7
Headers
Boundary Scan Header (J24)
The 14-pin boundary scan header provides an interface for programming the on-board PLDs
and for boundary scan testing/debug purposes. The pin assignments for this header are as
follows:
Table 5-17. Boundary Scan Header (J24) Pin Assignments
Pin
1
Signal
TRST_L
TDO
Signal
Pin
2
GND
3
GND
4
5
TDI
GND
6
7
TMS
GND
8
9
TCK
GND
10
12
14
11
13
NC
GND (BSCANEN_L)
GND
BSCAN_AW_L
Note Pin 12 must be grounded in the cable in order to enable boundary scan.
MVME3100 Installation and Use (V3100A/IH1)
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Chapter 5 Pin Assignments
Processor COP Header (J25)
There is one standard 16-pin header that provides access to the COP function. The pin
assignments for this header are as follows:
Table 5-18. Processor COP Header (J25) Pin Assignments
Pin
1
Signal
Signal
Pin
2
CPU_TDO
CPU_TDI
No Connect
3
CPU_TRST_L
CPU_VIO (+3.3V)
CPU_CKSTPI_L
No Connect
4
5
Pullup
6
7
CPU_TCK
CPU_TMS
CPU_SRST_L
CPU_HRST_L
CPU_CKSTPO_L
8
9
10
12
14
16
11
13
15
GND (optional pull-down)
KEY (no pin)
GND
Note Pin 6 +3.3V has a resettable fuse and can supply up to 0.5A to power I/O buffers in the
COP controller.
MVME3100 Installation and Use (V3100A/IH1)
64
A
Specifications
A
Power Requirements
In its standard configuration, the MVME3100 requires +5V for operation. On-board converters supply
the processor core voltage, +3.3V, +1.8V, and +2.5V. For any installed PMC card that requires +12V or
-12V, these voltages must be supplied by the chassis.
Supply Current Requirements
supply voltages.
Table A-1. Power Requirements
Model
Power
MVME3100
Typical: 4.5A (22.5W) @ +5V.0
No PMCs or peripherals attached Maximum: 5.6A (28W) @ +5.0V
Note In a 3-row chassis, PMC current should be limited to 32 watts (total of both PMC slots). In a 5-row
chassis, the PMC sites can support a total of 50 watts.
Environmental Specifications
Table A-2. MVME3100 Specifications
Characteristics
Specifications
Operating Temperature
0° to +55° C or (inlet air temperature with forced air
cooling
Storage Temperature
Relative Humidity
–40° to +85° C
Operating: 5% to 90% non-condensing
Non-operating: 5% to 90% non-condensing
MVME3100 Installation and Use (V3100A/IH1)
65
Appendix A Specifications
Table A-2. MVME3100 Specifications (continued)
Characteristics
Specifications
Vibration
Operating: 6 Gs RMS, 5-200 Hz sine
Non-operating: 6 Gs RMS, 20-2000 Hz random
Physical Dimensions
6U, 4HP wide (233.4 mm x 160 mm x 19.8 mm) (9.2 in. x
6.3 in. x 0.8 in)
Weight
MTBF
468 g/16.5 oz. (IEEE handles)
122,480 hours (calculated based on MIL-HDBK-217F
Notice 1)
MVME3100 Installation and Use (V3100A/IH1)
66
B
Related Documentation
B
Motorola Computer Group Documents
The Motorola publications listed below are referenced in this manual. You can obtain electronic
copies of Motorola Computer Group publications by:
■
■
Contacting your local Motorola sales office
Visiting Motorola Computer Group’s World Wide Web literature site,
Table B-1. Motorola Computer Group Documents
Motorola Publication
Number
Document Title
MVME3100 Single-Board Computer Programmer’s V3100A/PG
Reference Guide
MOTLoad Firmware Package User’s Manual
MOTLODA/UM
PMCSPANA/IH
PMCspan PMC Adapter Carrier Board Installation
and Use
To obtain the most up-to-date product information in PDF or HTML format, visit
MVME3100 Installation and Use (V3100A/IH1)
67
Appendix B Related Documentation
Manufacturers’ Documents
For additional information, refer to the following table for manufacturers’ data sheets or user’s
manuals. As an additional help, a source for the listed document is provided. Please note that,
while these sources have been verified, the information is subject to change without notice.
Table B-2. Manufacturers’ Documents
Document Title and Source
Publication Number
MPC8540 Integrated Processor Hardware Specifications
MPC8540EC
Freescale Semiconductor Technical Call Center
Telephone: +1 800 521 6274
Web Site: www.freescale.com
MPC8540 PowerQUICC III™ Integrated Host Processor Reference
Manual
MPC8540RM
Freescale Semiconductor Technical Call Center
Telephone: +1 800 521 6274
Web Site: www.freescale.com
Tsi148 PCI/X to VME Bus Bridge User Manual
80A3020_MA001_02
Tundra Semiconductor Corporation
603 March Road
Ottawa, Ontario, Canada
K2K 2M5
Web Site: www.tundra.com
BCM5421S 10/100/1000BASE-T Gigabit Transceiver
BCM5421
BCM5221
Broadcom Corporation
Web Site: www.broadcom.com
BCM5221S 10/100BASE-Tx Single-Channel Signi-PHY Transceiver
Broadcom Corporation
Web Site: www.broadcom.com
Intel 31244 PCI-X to Serial ATA Controller Datasheet and Specification 27359505.pdf
Update
27379405.pdf
Intel Corporation
S29GLxxxN MirrorBit™ Flash Family
S29GL512N, S29GL256N, S29GL128N
27631 Revision A
Amendment 3 May 13,
2004
AMD, Inc.
Web Site: www.amd.com/us-en/FlashMemory
μPD720101 USB 2.0 Host Controller Datasheet
NEC Electronics
S16265EJ3V0DS00
April 2003
Web Site: www.necel.com/usb/en/document/index.html
PCI6520CB Data Book
PLX Technology, Inc.
870 Maude Avenue
Sunnyvale, CA 94085
Web Site: www.plxtech.com
MVME3100 Installation and Use (V3100A/IH1)
68
Appendix B Related Documentation
Table B-2. Manufacturers’ Documents (continued)
Document Title and Source
Publication Number
EXAR ST16C554/554D, ST68C554 Quad UART with 16-Byte FIFOs
ST16C554/554D
Rev. 3.1.0
EXAR Corporation
48720 Kato Road
Fremont, CA 94538
Web Site: www.exar.com
2-Wire Serial EEPROM
AT24C512
Atmel Corporation
San Jose, CA
Web Site: www.atmel.com/atmel/support
Maxim DS1621 Digital Thermometer and Thermostat
Maxim Integrated Products
DS1621
Web Site: www.maxim-ic.com
Maxim DS1375 Serial Real-Time Clock
Maxim Integrated Products
Rev: 121203
Web Site: www.maxim-ic.com
TSOP Type I Shielded Metal Cover SMT
Yamaichi Electronics USA
Web Site: www.yeu.com
MVME3100 Installation and Use (V3100A/IH1)
69
Appendix B Related Documentation
Related Specifications
For additional information, refer to the following table for related specifications. For your
convenience, a source for the listed document is also provided. It is important to note that in
many cases, the information is preliminary and the revision levels of the documents are subject
to change without notice.
Table B-3. Related Specifications
Document Title and Source
Publication Number
VME64 Specification
ANSI/VITA 1-1994
ANSI/VITA 1.1-1997
VITA 2.0-2003
VME64 Extensions
2eSST Source Synchronous Transfer
Peripheral Component Interconnect (PCI) Local Bus Specification,
Revision 2.0, 2.1, 2.2
PCI Local Bus
Specification
PCI-X Addendum to the PCI Local Bus Specification
Rev 1.0b
IEEE - Common Mezzanine Card Specification (CMC) Institute of
Electrical and Electronics Engineers, Inc.
P1386 Draft 2.0
IEEE - PCI Mezzanine Card Specification (PMC)
Institute of Electrical and Electronics Engineers, Inc.
P1386.1 Draft 2.0
Universal Serial Bus Specification
Revision 2.0
April 27, 2000
MVME3100 Installation and Use (V3100A/IH1)
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