Your new Measurement Computing product comes with a fantastic extra —
Management committed to your satisfaction!
Refer to www.mccdaq.com/execteam.html for the names, titles, and contact information of each key executive at Measurement
Computing.
Thank you for choosing a Measurement Computing product—and congratulations! You own the finest, and you can now enjoy
the protection of the most comprehensive warranties and unmatched phone tech support. It’s the embodiment of our mission:
ƒ
To provide PC-based data acquisition hardware and software that will save time and save money.
Simple installations minimize the time between setting up your system and actually making measurements. We offer quick and
simple access to outstanding live FREE technical support to help integrate MCC products into a DAQ system.
Lifetime warranty: Every hardware product manufactured by Measurement Computing Corporation is warranted against
defects in materials or workmanship for the life of the product. Products found defective are repaired or replaced promptly.
Lifetime Harsh Environment Warranty®: We will replace any product manufactured by Measurement Computing
Corporation that is damaged (even due to misuse) for only 50% of the current list price. I/O boards face some tough operating
conditions, some more severe than the boards are designed to withstand. When a board becomes damaged, just return the unit
with an order for its replacement at only 50% of the current list price. We don’t need to profit from your misfortune. By the way,
we honor this warranty for any manufacturer’s board that we have a replacement for.
30 Day Money Back Guarantee: You may return any Measurement Computing Corporation product within 30 days of
purchase for a full refund of the price paid for the product being returned. If you are not satisfied, or chose the wrong product by
mistake, you do not have to keep it. Please call for an RMA number first. No credits or returns accepted without a copy of the
original invoice. Some software products are subject to a repackaging fee.
These warranties are in lieu of all other warranties, expressed or implied, including any implied warranty of merchantability or
fitness for a particular application. The remedies provided herein are the buyer’s sole and exclusive remedies. Neither
Measurement Computing Corporation, nor its employees shall be liable for any direct or indirect, special, incidental or
consequential damage arising from the use of its products, even if Measurement Computing Corporation has been notified in
advance of the possibility of such damages.
HM PCI-2513.doc
3
Trademark and Copyright Information
TracerDAQ, Universal Library, Harsh Environment Warranty, Measurement Computing Corporation, and the Measurement
Computing logo are either trademarks or registered trademarks of Measurement Computing Corporation.
Windows, Microsoft, and Visual Studio are either trademarks or registered trademarks of Microsoft Corporation
LabVIEW is a trademark of National Instruments.
CompactFlash is a registered trademark of SanDisk Corporation.
XBee and XBee-PRO are trademarks of MaxStream, Inc.
All other trademarks are the property of their respective owners.
Information furnished by Measurement Computing Corporation is believed to be accurate and reliable. However, no
responsibility is assumed by Measurement Computing Corporation neither for its use; nor for any infringements of patents or
other rights of third parties, which may result from its use. No license is granted by implication or otherwise under any patent or
copyrights of Measurement Computing Corporation.
All rights reserved. No part of this publication may be reproduced, stored in a retrieval system, or transmitted, in any form by any
means, electronic, mechanical, by photocopying, recording, or otherwise without the prior written permission of Measurement
Computing Corporation.
Notice
Measurement Computing Corporation does not authorize any Measurement Computing Corporation product for use
in life support systems and/or devices without prior written consent from Measurement Computing Corporation.
Life support devices/systems are devices or systems which, a) are intended for surgical implantation into the body,
or b) support or sustain life and whose failure to perform can be reasonably expected to result in injury.
Measurement Computing Corporation products are not designed with the components required, and are not subject
to the testing required to ensure a level of reliability suitable for the treatment and diagnosis of people.
4
Table of Contents
Preface
Conventions used in this user's guide.................................................................................................................7
Where to find more information.........................................................................................................................7
Chapter 1
Software features................................................................................................................................................8
Chapter 2
Configuring the hardware.................................................................................................................................11
Pinout – main I/O connector............................................................................................................................................12
Chapter 3
Analog input.....................................................................................................................................................15
Digital input scanning......................................................................................................................................................16
Triggering.........................................................................................................................................................16
Software-based triggering................................................................................................................................................17
Stop trigger modes...........................................................................................................................................................17
Counter modes.................................................................................................................................................................19
5
PCI-2513 User's Guide
Setpoint configuration overview......................................................................................................................................24
Detection setpoint details.................................................................................................................................................29
FIRSTPORTC or timer update latency............................................................................................................................30
Chapter 4
Chapter 5
Specifications......................................................................................................................................33
Analog input.....................................................................................................................................................33
Accuracy..........................................................................................................................................................................33
Trigger sources and modes...............................................................................................................................35
Main connector and pin out..............................................................................................................................36
Declaration of Conformity..................................................................................................................39
6
Preface
About this User's Guide
What you will learn from this user's guide
This user's guide explains how to install, configure, and use the PCI-2513 so that you get the most out of its
analog input, digital I/O, and counter/timer I/O features.
This user's guide also refers you to related documents available on our web site, and to technical support
resources.
Conventions used in this user's guide
For more information on …
Text presented in a box signifies additional information and helpful hints related to the subject matter you are
reading.
Caution! Shaded caution statements present information to help you avoid injuring yourself and others,
damaging your hardware, or losing your data.
<#:#>
Angle brackets that enclose numbers separated by a colon signify a range of numbers, such as those assigned
to registers, bit settings, etc.
bold text
Bold text is used for the names of objects on the screen, such as buttons, text boxes, and check boxes. For
example:
1. Insert the disk or CD and click the OK button.
italic text
Italic text is used for the names of manuals and help topic titles, and to emphasize a word or phrase. For
example:
The InstaCal installation procedure is explained in the Quick Start Guide.
Never touch the exposed pins or circuit connections on the board.
Where to find more information
The following electronic documents provide information that can help you get the most out of your PCI-2513.
ƒ
ƒ
ƒ
ƒ
ƒ
ƒ
MCC's Specifications: PCI-2513 (the PDF version of the Specifications chapter in this guide) is available
MCC's Quick Start Guide is available on our web site at
MCC's Guide to Signal Connections is available on our web site at
MCC's Universal Library User's Guide is available on our web site at
MCC's Universal Library Function Reference is available on our web site at
MCC's Universal Library for LabVIEW™ User’s Guide is available on our web site at
PCI-2513 User's Guide (this document) is also available on our web site at
7
Chapter 1
Introducing the PCI-2513
Overview: PCI-2513 features
The PCI-2513 is supported under popular Microsoft® Windows® operating systems.
The PCI-2513 provides either eight differential or 16 single-ended analog inputs with 16-bit resolution. It offers
seven software-selectable analog input ranges of ±10 V, ±5 V, ±2 V, ±1 V, ±0.5 V, ±0.2 V, and ±0.1V.
The board has 24 high-speed lines of digital I/O, two timer outputs, and four 32-bit counters. It provides up to
12 MHz scanning on all digital input lines.
You can operate all analog I/O, digital I/O, and counter/timer I/O synchronously and simultaneously.
Software features
For information on the features of InstaCal and the other software included with your PCI-2513, refer to the
Quick Start Guide that shipped with your device. The Quick Start Guide is also available in PDF at
8
Chapter 2
Installing the PCI-2513
What comes with your PCI-2513 shipment?
As you unpack your PCI-2513, verify that the following components are included.
Hardware
ƒ
PCI-2513
Optional components
Cables and signal conditioning accessories that are compatible with the PCI-2513 are not included with PCI-
2513 orders, and must be ordered separately.
If you ordered any of the following products with your board, they should be included with your shipment.
ƒ
Cables
CA-68-3R
CA-68-3S (3-feet) and CA-68-6S (6-feet)
ƒ
Signal conditioning accessories
MCC provides signal termination products for use with the PCI-2513. Refer to "Field wiring and signal
9
PCI-2513 User's Guide
Installing the PCI-2513
Additional documentation
In addition to this hardware user's guide, you should also receive the Quick Start Guide (available in PDF at
www.mccdaq.com/PDFmanuals/DAQ-Software-Quick-Start.pdf). This booklet supplies a brief description of
the software you received with your PCI-2513 and information regarding installation of that software. Please
read this booklet completely before installing any software or hardware.
Unpacking the PCI-2513
As with any electronic device, you should take care while handling to avoid damage from static
electricity. Before removing the PCI-2513 from its packaging, ground yourself using a wrist strap or by simply
touching the computer chassis or other grounded object to eliminate any stored static charge.
If any components are missing or damaged, notify Measurement Computing Corporation immediately by
phone, fax, or e-mail:
ƒ
ƒ
ƒ
Phone: 508-946-5100 and follow the instructions for reaching Tech Support.
Fax: 508-946-9500 to the attention of Tech Support
Email: [email protected]
Installing the software
Refer to the Quick Start Guide for instructions on installing the software on the Measurement Computing Data
Acquisition Software CD. This booklet is available in PDF at www.mccdaq.com/PDFmanuals/DAQ-Software-
Quick-Start.pdf.
Installing the PCI-2513
The PCI-2513 board is completely plug-and-play. There are no switches or jumpers to set on the board.
Configuration is controlled by your system's BIOS.
Before you install the PCI-2513…
Enable Bus Mastering DMA: For a PCI-2513 to operate properly, you must enable Bus Mastering DMA on
the PCI slot where you will install the board. Make sure that your computer can perform Bus Mastering DMA
for the applicable PCI slot. Some computers have BIOS settings that enable and disable Bus Mastering DMA. If
your computer has this BIOS option, make sure you enable Bus Mastering DMA on the appropriate PCI slot.
Refer to your PC Owner's Manual for additional information regarding your PC and enabling Bus Mastering
DMA for PCI slots.
Install the MCC DAQ software: The driver needed to run your PCI-2513 is installed with the MCC DAQ
software. Therefore, you need to install the MCC DAQ software before you install your board. Refer to the
Quick Start Guide for instructions on installing the software.
To install your PCI-2513, follow the steps below.
1. Turn your computer off, open it up, and insert your board into an available PCI slot.
2. Close your computer and turn it on.
If you are using an operating system with support for plug-and-play (such as Windows 2000 or
Windows XP), a dialog box opens as the system loads, indicating that new hardware has been detected. The
information file for this board should have already been loaded onto your PC when you installed the
Measurement Computing Data Acquisition Software CD supplied with your board, and should be detected
automatically by Windows. If you have not installed this software, cancel the dialog and install it now.
10
PCI-2513 User's Guide
Installing the PCI-2513
3. To test your installation and configure your board, run the InstaCal utility installed in the previous section.
Refer to the Quick Start Guide that came with your board for information on how to initially set up and
load InstaCal.
If your board has been powered-off for more than 10 minutes, allow your computer to warm up for at least 30
minutes before acquiring data. This warm-up period is required in order for the board to achieve its rated
accuracy. The high speed components used on the board generate heat, and it takes this amount of time for a
board to reach steady state if it has been powered off for a significant amount of time.
Configuring the hardware
All hardware configuration options on the PCI-2513 are software-controlled. You can select some of the
configuration options using InstaCal, such as the analog input configuration (16 single-ended or eight
differential channels), and the edge used for pacing when using an external clock. Once selected, any program
that uses the Universal Library initializes the hardware according to these selections.
Information on signal connections
General information regarding signal connection and configuration is available in the Guide to Signal
Connecting the board for I/O operations
Connectors, cables – main I/O connector
The table below lists the board connectors, applicable cables, and compatible accessory products for the PCI-
2513.
Board connectors, cables, and compatible hardware
Connector type
68-pin standard "SCSI TYPE III" female connector
HDMI connector (targeted for future expansion)
CA-68-3R — 68-pin ribbon cable; 3 feet.
Compatible cables (for the 68-pin SCSI connector)
CA-68-3S — 68-pin shielded round cable; 3 feet.
CA-68-6S — 68-pin shielded round cable; 6 feet.
Compatible accessory products
TB-100 terminal connector
RM-TB-100
11
PCI-2513 User's Guide
Installing the PCI-2513
Pinout – main I/O connector
16-channel single-ended pin out
(8-channel differential signals in parentheses)
Signal name
Pin
Pin Signal name
ACH0 (ACH0 HI)
AGND
ACH9 (ACH1 LO)
ACH2 (ACH2 HI)
AGND
ACH11 (ACH3 LO)
SGND
ACH12 (ACH4 LO)
ACH5 (ACH5 HI)
AGND
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
ACH8 (ACH0 LO)
ACH1 (ACH1 HI)
AGND
ACH10 (ACH2 LO)
ACH3 (ACH3 HI)
AGND
ACH4 (ACH4 HI)
AGND
ACH13 (ACH5 LO)
ACH6 (ACH6 HI)
AGND
ACH15 (ACH7 LO)
N/C
• •
• •
• •
• •
• •
• •
• •
• •
• •
• •
• •
• •
• •
• •
• •
• •
• •
• •
• •
• •
• •
• •
• •
• •
• •
• •
• •
• •
• •
• •
• •
• •
• •
• •
ACH14 (ACH6 LO)
ACH7 (ACH7 HI)
NC
NC
N/C
NEGREF (reserved for self-calibration)
POSREF (reserved for self-calibration)
+5V
A0
A2
A4
A6
B0
B2
B4
B6
C0
C2
C4
GND
A1
A3
A5
A7
B1
B3
B5
B7
C1
C3
C5
C7
8
7
6
5
4
3
2
1
C6
GND
CNT1
CNT3
TMR1
GND
GND
PCI slot ↓
TTL TRG
CNT0
CNT2
TMR0
XAPCR
XDPCR
Cabling
Use a CA-68-3R 68-pin ribbon expansion cable (Figure 1), or a CA-68-3S (3-foot) or CA-68-6S (6-foot) 68-pin
34
68
34
68
1
35
1
35
The stripe
identifies pin # 1
Figure 1. CA-68-3R cable
12
PCI-2513 User's Guide
Installing the PCI-2513
34
68
34
68
1
35
1
35
Figure 2. CA-68-3S and CA-68-6S cable
Field wiring and signal termination
You can use the following MCC screw terminal boards to terminate field signals and route them into the PCI-
2513 board using the CA-68-3R, CA-68-3S, or CA-68-6S cable:
ƒ
ƒ
TB-100: Termination board with screw terminals. Details on this product are available on our web site at
RM-TB-100: 19-inch rack mount kit for the TB-100 termination board. Details on this product are available
13
Chapter 3
Functional Details
This chapter contains detailed information on all of the features available from the board, including:
ƒ
ƒ
ƒ
a block diagram of board functions
information on how to use, when to use, and when not to use the signals generated by the board
diagrams of signals using default or conventional board settings
PCI-2513 block diagram
Figure 3 is a simplified block diagram of the PCI-2513. This board provides all of the functional elements
shown in the figure.
Figure 3. PCI-2513 functional block diagram
Synchronous I/O – mixing analog, digital, and counter scanning
The PCI-2513 can read analog, digital, and counter inputs, while generating digital pattern outputs at the same
time. Digital and counter inputs do not affect the overall A/D rate because these inputs use no time slot in the
scanning sequencer.
For example, one analog input channel can be scanned at the full 1 MHz A/D rate along with digital and counter
input channels. Each analog channel can have a different gain, and counter and digital channels do not need
additional scanning bandwidth as long as there is at least one analog channel in the scan group.
Digital input channel sampling is not done during the "dead time" of the scan period where no analog sampling
is being done either.
The ability to scan digital and counter channels along with analog channels provides for a more deterministic
collection of data.
14
PCI-2513 User's Guide
Functional Details
Bus mastering DMA
The PCI-2513 supports bus mastering DMA. With multiple DMA channels, analog, digital, and counter input
data, as well as digital output data, can flow between the PC and the PCI-2513 without consuming valuable
CPU time. The driver supplied with the PCI-2513 automatically uses bus mastering DMA to efficiently conduct
I/O from the PC to the PCI-2513.
Analog input
The PCI-2513 has a 16-bit, 1-MHz A/D coupled with 16 single-ended, or eight differential analog inputs. Seven
software programmable ranges provide inputs from ±10 V to ±100 mV full scale.
Analog input scanning
The PCI-2513 has several scanning modes to address various applications. You can load the 512-location scan
buffer with any combination of analog input channels. All analog input channels in the scan buffer are measured
sequentially at 1 µs per channel.
For example, in the fastest mode, with a 0 delay between the end of scan and the start of scan, a single analog
channel can be scanned continuously at 1 MS/s; two analog channels can be scanned at 500 kS/s each; 16
analog input channels can be scanned at 62.5 kS/s.
Settling time
For most applications, leave the settling time at its default of 1 µs.
However, if you are scanning multiple channels, and one or more channels are connected to a high-impedance
source, you may get better results by increasing the settling time. Remember that increasing the settling reduces
the maximum acquisition rate.
You can set the settling time to 0, 1 µs, 5 µs, 10 µs, or 1 ms.
Example: Analog channel scanning of voltage inputs
Figure 4 shows a simple acquisition. The scan is programmed pre-acquisition and is made up of six analog
channels (Ch0, Ch1, Ch3, Ch4, Ch6, Ch7). Each of these analog channels can have a different gain. The
acquisition is triggered and the samples stream to the PC via DMA. Each analog channel requires one
microsecond of scan time—therefore the scan period can be no shorter than 6 µs for this example. The scan
period can be made much longer than 6 µs—up to 1 s. The maximum scan frequency is one divided by 6 µs or
166,666 Hz.
Figure 4. Analog channel scan of voltage inputs example
15
PCI-2513 User's Guide
Functional Details
Digital I/O
Twenty-four TTL-level digital I/O lines are included in each PCI-2513. You can program digital I/O in 8-bit
groups as either inputs or outputs and scan them in several modes (see "Digital input scanning" below). You can
access input ports asynchronously from the PC at any time, including when a scanned acquisition is occurring.
Digital input scanning
Digital input ports can be read asynchronously before, during, or after an analog input scan.
Digital input ports can be part of the scan group and scanned along with analog input channels. Two
synchronous modes are supported when digital inputs are scanned along with analog inputs.
In both modes, adding digital input scans has no affect on the analog scan rate limitations.
If no analog inputs are being scanned, the digital inputs can be scanned at up to 12 MHz.
Digital outputs and pattern generation
Digital outputs can be updated asynchronously at anytime before, during, or after an acquisition. You can use
two of the 8-bit ports to generate a digital pattern at up to 12 MHz. The PCI-2513 supports digital pattern
generation with bus mastering DMA. The digital pattern can be read from PC RAM.
Digital pattern generation is clocked using an internal clock. The on-board programmable clock generates
updates ranging from once every 1 second to 1 MHz, independent of any acquisition rate.
Triggering
Triggering can be the most critical aspect of a data acquisition application. The PCI-2513 supports the
following trigger modes to accommodate certain measurement situations.
Hardware analog triggering
The PCI-2513 uses true analog triggering in which the trigger level you program sets an analog DAC, which is
then compared in hardware to the analog input level on the selected channel. This guarantees an analog trigger
latency that is less than 1 µs.
You can select any analog channel as the trigger channel, but the selected channel must be the first channel in
the scan. You can program the trigger level, the rising or falling edge, and hysteresis.
Concerning hardware analog level trigger and comparator change state
When analog input voltage starts near the trigger level, and you are performing a rising or falling] hardware
analog level trigger, the analog level comparator may have already tripped before the sweep was enabled. If this
is the case, the circuit waits for the comparator to change state. However, since the comparator has already
changed state, the circuit does not see the transition.
To resolve this problem, do the following:
1. Set the analog level trigger to the threshold you want.
2. Apply an analog input signal that is more than 2.5% of the full-scale range away from the desired
threshold. This ensures that the comparator is in the proper state at the beginning of the acquisition.
16
PCI-2513 User's Guide
Functional Details
3. Bring the analog input signal toward the desired threshold. When the input signal is at the threshold (±
some tolerance) the sweep will be triggered.
4. Before re-arming the trigger, again move the analog input signal to a level that is more than 2.5% of the
full-scale range away from the desired threshold.
For example, if you are using the ±2 V full-scale range (gain = 5), and you want to trigger at +1 V on the rising
edge, you would set the analog input voltage to a start value that is less than +0.9 V (1 V – (2 V * 2 * 2.5%)).
Digital triggering
A separate digital trigger input line is provided, allowing TTL-level triggering with latencies guaranteed to be
less than 1 µs. You can program both of the logic levels (1 or 0) and the rising or falling edge for the discrete
digital trigger input.
Software-based triggering
The three software-based trigger modes differ from hardware analog triggering and digital triggering because
the readings—analog, digital, or counter—are checked by the PC in order to detect the trigger event.
Analog triggering
You can select any analog channel in the scan as the trigger channel. You can program the trigger level, the
rising or falling edge, and hysteresis.
Pattern triggering
You can select any scanned digital input channel pattern to trigger an acquisition, including the ability to mask
or ignore specific bits.
Counter triggering
You can program triggering to occur when one of the counters meets or exceeds a set value, or is within a range
of values. You can program any of the included counter channels as the trigger source.
Software-based triggering usually results in long period of inactivity between the trigger condition being
detected and the data being acquired. However, the PCI-2513 avoids this situation by using pre-trigger data.
When software-based-triggering is used, and the PC detects the trigger condition—which may be thousands of
readings after the actual occurrence of the signal—the PCI-2513 driver automatically looks back to the location
in memory where the actual trigger-causing measurement occurred, and presents the acquired data that begins at
the point where the trigger-causing measurement occurs. The maximum inactive period in this mode equals one
scan period.
Set pre-trigger > 0 when using counter as trigger source
When using a counter for a trigger source, you should use a pre-trigger with a value of at least 1. Since all
counters start at zero with the first scan, there is no valid reference in regard to rising or falling edge. Setting a
pre-trigger to 1 or more ensures that a valid reference value is present, and that the first trigger will be
legitimate.
Stop trigger modes
You can use any of the software trigger modes explained previously to stop an acquisition.
For example, you can program an acquisition to begin on one event—such as a voltage level—and then stop on
another event—such as a digital pattern.
17
PCI-2513 User's Guide
Functional Details
Pre-triggering and post-triggering modes
The PCI-2513 supports four modes of pre-triggering and post-triggering, providing a wide-variety of options to
accommodate any measurement requirement.
When using pre-trigger, you must use software-based triggering to initiate an acquisition.
No pre-trigger, post-trigger stop event.
In this simple mode, data acquisition starts when the trigger is received, and the acquisition stops when the stop-
trigger event is received.
Fixed pre-trigger with post-trigger stop event
In this mode, you set the number of pre-trigger readings to acquire. The acquisition continues until a stop-
trigger event occurs.
No pre-trigger, infinite post-trigger
In this mode, no pre-trigger data is acquired. Instead, data is acquired beginning with the trigger event, and is
terminated when you issue a command to halt the acquisition.
Fixed pre-trigger with infinite post-trigger
You set the amount of pre-trigger data to acquire. Then, the system continues to acquire data until the program
issues a command to halt acquisition.
Counter inputs
Four 32-bit counters are built into the PCI-2513. Each counter accepts frequency inputs up to 20 MHz.
The counters can concurrently monitor time periods, frequencies, pulses, and other event driven incremental
occurrences directly from pulse-generators, limit switches, proximity switches, and magnetic pick-ups.
Counter inputs can be read asynchronously under program control, or synchronously as part of an analog or
digital scan group.
When reading synchronously, all counters are set to zero at the start of an acquisition. When reading
asynchronously, counters may be cleared on each read, count up continually, or count until the 16 bit or 32 bit
limit has been reached. See counter mode descriptions below.
Figure 5. Typical PCI-2513 counter channel
18
PCI-2513 User's Guide
Functional Details
Mapped channels
A mapped channel is one of four counter input signals that can get multiplexed into a counter module. The
mapped channel can participate with the counter's input signal by gating the counter, latching the counter, and
so on. The four possible choices for the mapped channel are the four counter input signals (post-debounce).
A mapped channel can be used to:
ƒ
ƒ
ƒ
gate the counter
decrement the counter
latch to current count to the count register
Usually, all counter outputs are latched at the beginning of each scan within the acquisition. However, you can
use a second channel—known as the mapped channel— to latch the counter output.
Counter modes
A counter can be asynchronously read with or without clear on read. The asynchronous read-signals strobe
when the lower 16-bits of the counter are read by software. The software can read the counter's high 16-bits
some time later after reading the lower 16-bits. The full 32-bit result reflects the timing of the first
asynchronous read strobe.
Totalize mode
The Totalize modes allows basic use of a 32-bit counter. While in this mode, the channel's input can only
increment the counter upward. When used as a 16-bit counter (counter low), one channel can be scanned at the
12 MHz rate. When used as a 32-bit counter (counter high), two sample times are used to return the full 32-bit
result. Therefore a 32-bit counter can only be sampled at a 6 MHz maximum rate. If you only want the upper 16
bits of a 32-bit counter, then you can acquire that upper word at the 12 MHz rate.
The counter counts up and does not clear on every new sample. However, it does clear at the start of a new scan
command.
The counter rolls over on the 16-bit (counter low) boundary, or on the 32-bit (counter high) boundary.
Clear on read mode
The counter counts up and is cleared after each read. By default, the counter counts up and only clears the
counter at the start of a new scan command. The final value of the counter —the value just before it was
cleared—is latched and returned to the PCI-2513.
Stop at the top mode
The counter stops at the top of its count. The top of the count is FFFF hex (65,535) for the 16-bit mode, and
FFFFFFFF hex (4,294,967,295) for the 32-bit mode.
32-bit or 16-bit
Sets the counter type to either 16-bits or 32-bits. The type of counter only matters if the counter is using the
stop at the top mode—otherwise, this option is ignored.
Latch on map
Sets the signal on the mapped counter input to latch the count.
By default, the start of scan signal—a signal internal to the PCI-2513 pulses once every scan period to indicate
the start of a scan group—latches the count, so the count is updated each time a scan is started.
19
PCI-2513 User's Guide
Functional Details
Gating "on" mode
Sets the gating option to "on" for the mapped channel, enabling the mapped channel to gate the counter.
Any counter can be gated by the mapped channel. When the mapped channel is high, the counter is enabled.
When the mapped channel is low, the counter is disabled (but holds the count value). The mapped channel can
be any counter input channel other than the counter being gated.
Decrement "on" mode
Sets the counter decrement option to "on" for the mapped channel. The input channel for the counter
increments the counter, and you can use the mapped channel to decrement the counter.
Debounce modes
Each channel's output can be debounced with 16 programmable debounce times from 500 ns to 25.5 ms. The
debounce circuitry eliminates switch-induced transients typically associated with electro-mechanical devices
including relays, proximity switches, and encoders.
There are two debounce modes, as well as a debounce bypass, as shown in Figure 6. In addition, the signal from
the buffer can be inverted before it enters the debounce circuitry. The inverter is used to make the input rising-
edge or falling-edge sensitive.
Edge selection is available with or without debounce. In this case the debounce time setting is ignored and the
input signal goes straight from the inverter or inverter bypass to the counter module.
There are 16 different debounce times. In either debounce mode, the debounce time selected determines how
fast the signal can change and still be recognized.
The two debounce modes are trigger after stable and trigger before stable. A discussion of the two modes
follows.
Figure 6. Debounce model block diagram
Trigger after stable mode
In the trigger after stable mode, the output of the debounce module does not change state until a period of
stability has been achieved. This means that the input has an edge, and then must be stable for a period of time
equal to the debounce time.
20
PCI-2513 User's Guide
Functional Details
Figure 7. Debounce module – trigger after stable mode
The following time periods (T1 through T5) pertain to Figure 7. In trigger after stable mode, the input signal to
the debounce module is required to have a period of stability after an incoming edge, in order for that edge to be
accepted (passed through to the counter module.) The debounce time for this example is equal to T2 and T5.
ƒ
ƒ
T1 – In the example above, the input signal goes high at the beginning of time period T1, but never stays
high for a period of time equal to the debounce time setting (equal to T2 for this example.)
T2 – At the end of time period T2, the input signal has transitioned high and stayed there for the required
amount of time—therefore the output transitions high. If the input signal does not stabilize in the high state
long enough, no transition would have appeared on the output and the entire disturbance on the input would
have been rejected.
ƒ
ƒ
T3 – During time period T3, the input signal remained steady. No change in output is seen.
T4 – During time period T4, the input signal has more disturbances and does not stabilize in any state long
enough. No change in the output is seen.
ƒ
T5 – At the end of time period T5, the input signal has transitioned low and stayed there for the required
amount of time—therefore the output goes low.
Trigger before stable mode
In the trigger before stable mode, the output of the debounce module immediately changes state, but will not
change state again until a period of stability has passed. For this reason the mode can be used to detect glitches.
Figure 8. Debounce module – Trigger before stable mode
The following time periods (T1 through T6) pertain to the above drawing.
ƒ
T1 – In the illustrated example, the input signal is low for the debounce time (equal to T1); therefore when
the input edge arrives at the end of time period T1, it is accepted and the output (of the debounce module)
goes high. Note that a period of stability must precede the edge in order for the edge to be accepted.
T2 – During time period T2, the input signal is not stable for a length of time equal to T1 (the debounce
time setting for this example.) Therefore, the output stays "high" and does not change state during time
period T2.
ƒ
ƒ
ƒ
T3 – During time period T3, the input signal is stable for a time period equal to T1, meeting the debounce
requirement. The output is held at the high state. This is the same state as the input.
T4 – At anytime during time period T4, the input can change state. When this happens, the output will also
change state. At the end of time period T4, the input changes state, going low, and the output follows this
action [by going low].
ƒ
ƒ
T5 – During time period T5, the input signal again has disturbances that cause the input to not meet the
debounce time requirement. The output does not change state.
T6 – After time period T6, the input signal has been stable for the debounce time and therefore any edge on
the input after time period T6 is immediately reflected in the output of the debounce module.
21
PCI-2513 User's Guide
Functional Details
Debounce mode comparisons
Figure 9 shows how the two modes interpret the same input signal, which exhibits glitches. Notice that the
trigger before stable mode recognizes more glitches than the trigger after stable mode. Use the bypass option to
achieve maximum glitch recognition.
Figure 9. Example of two debounce modes interpreting the same signal
Debounce times should be set according to the amount of instability expected in the input signal. Setting a
debounce time that is too short may result in unwanted glitches clocking the counter. Setting a debounce time
too long may result in an input signal being rejected entirely. Some experimentation may be required to find the
appropriate debounce time for a particular application.
To see the effects of different debounce time settings, simply view the analog waveform along with the counter
output. This can be done by connecting the source to an analog input.
Use trigger before stable mode when the input signal has groups of glitches and each group is to be counted as
one. The trigger before stable mode recognizes and counts the first glitch within a group but rejects the
subsequent glitches within the group if the debounce time is set accordingly. The debounce time should be set
to encompass one entire group of glitches as shown in the following diagram.
Figure 10.Optimal debounce time for trigger before stable mode
Trigger after stable mode behaves more like a traditional debounce function: rejecting glitches and only passing
state transitions after a required period of stability. Trigger after stable mode is used with electro-mechanical
devices like encoders and mechanical switches to reject switch bounce and disturbances due to a vibrating
encoder that is not otherwise moving. The debounce time should be set short enough to accept the desired input
pulse but longer than the period of the undesired disturbance as shown in Figure 11.
22
PCI-2513 User's Guide
Functional Details
Figure 11. Optimal debounce time for trigger after stable mode
Timer outputs
Two 16-bit timer outputs are built into every 3000 series board. Each timer is capable of generating a different
square wave with a programmable frequency in the range of 16 Hz to 1 MHz.
Figure 12. Typical PCI-2513 timer channel
Example: Timer outputs
Timer outputs are programmable square waves. The period of the square wave can be as short as 1us or as long
as 65535 µs. The table below lists some examples.
Timer output frequency examples
Divisor
Timer output frequency
1
1 MHz
10 kHz
1 kHz
100
1000
10000
65535
100 Hz
15.259 Hz
The two timer outputs can generate different square waves. The timer outputs can be updated asynchronously at
any time.
Multiple PCI-2513s per PC
PCI-2513 features can be replicated up to four times, as up to four boards can be installed in a single host PC.
The serial number on each PCI-2513 distinguishes one from another. You can operate multiple PCI-2513
boards synchronously. To do this, set up one PCI-2513 with the pacer pin you want to use (XAPCR or XDPCR)
configured for output. Set up the PCI-2513 boards you want to synchronize to this board with the pacer pin you
want to use (XAPCR or XDPCR) configured for input. Wire the pacer pin configured for output to each of the
pacer input pins that you want to synchronize.
23
PCI-2513 User's Guide
Functional Details
Using detection setpoints for output control
What are detection setpoints?
With the PCI-2513's setpoint configuration feature, you can configure up to 16 detection setpoints associated
with channels in a scan group. Each setpoint can update the following, allowing for real-time control based on
acquisition data:
ƒ
ƒ
FIRSTPORTC digital output port with a data byte and mask byte
timers
Setpoint configuration overview
You can program each detection setpoint as one of the following:
ƒ
ƒ
ƒ
Single point referenced – Above, below, or equal to the defined setpoint.
Window (dual point) referenced – Inside or outside the window.
Window (dual point) referenced, hysteresis mode – Outside the window high forces one output (designated
Output 2; outside the window low-forces another output, designated as Output 1).
A digital detect signal is used to indicate when a signal condition is True or False—for example, whether or not
the signal has met the defined criteria. The detect signals can be part of the scan group and can be measured as
any other input channel, thus allowing real time data analysis during an acquisition.
The detection module looks at the 16-bit data being returned on a channel and generates another signal for each
channel with a setpoint applied (Detect1 for Channel 1, Detect2 for Channel 2, and so on). These signals serve
as data markers for each channel's data. It does not matter whether that data is volts, counts, or timing.
A channel's detect signal shows a rising edge and is True (1) when the channel's data meets the setpoint criteria.
The detect signal shows a falling edge and is False (0) when the channel's data does not meet the setpoint
criteria. The True and False states for each setpoint criteria are explained in the "Using the setpoint status
24
PCI-2513 User's Guide
Functional Details
Action - driven by condition
Compare X to:
Setpoint definition (choose one)
Update conditions:
True only:
ƒ
ƒ
If True, then output value 1
If False, then perform no action
ƒ
ƒ
ƒ
Equal to A (X = A)
Below A (X < A)
Above B (X > B)
Limit A or Limit
B
True and False:
ƒ
ƒ
If True, then output value 1
If False, then output value 2
True only
ƒ
ƒ
If True, then output value 1
If False, then perform no action
Window* (non-
hysteresis mode)
ƒ
ƒ
Inside (B < X < A)
Outside: B > X; or, X > A
True and False
ƒ
ƒ
If True, then output value 1
If False, then output value 2
Hysteresis mode (forced update)
ƒ
If X > A is True, then output value 2 until X < B is True, then
output value 1.
ƒ
If X < B is True, then output value 1 until X > A is True, then
output value 2.
ƒ
ƒ
Above A (X > A)
Window*
(hysteresis mode)
Below (B X < B) (Both
conditions are checked when
in hysteresis mode
This is saying:
(a) If the input signal is outside the window high, then output
value 2 until the signal goes outside the window low, and
(b) if the signal is outside the window low, then output value 1
until the signal goes outside the window high. There is no change
to the detect signal while within the window.
The detect signal has the timing resolution of the scan period as seen in the diagram below. The detect signal
can change no faster than the scan frequency (1/scan period.)
Figure 13. Example diagram of detection signals for channels 1, 2, and 3
Each channel in the scan group can have one detection setpoint. There can be no more than 16 total setpoints
total applied to channels within a scan group.
Detection setpoints act on 16-bit data only. Since the PCI-2513 has 32-bit counters, data is returned 16-bits at a
time. The lower word, the higher word, or both lower and higher words can be part of the scan group. Each
counter input channel can have one detection setpoint for the counter's lower 16-bit value and one detection
setpoint for the counter's higher 16-bit value.
25
PCI-2513 User's Guide
Functional Details
Setpoint configuration
You program all setpoints as part of the pre-acquisition setup, similar to setting up an external trigger. Since
each setpoint acts on 16-bit data, each has two 16-bit compare values: a high limit (limit A) and a low limit
(limit B). These limits define the setpoint window.
There are several possible conditions (criteria) and effectively three update modes, as explained in the following
configuration summary.
Set high limit
You can set the 16-bit high limit (limit A) when configuring the PCI-2513 through software.
Set low limit
You can set the 16-bit low limit (limit B) when configuring the PCI-2513 through software.
Set criteria
ƒ
ƒ
ƒ
ƒ
ƒ
Inside window: Signal is below 16-bit high limit and above 16-bit low limit.
Outside window: Signal is above 16-bit high limit, or below 16-bit low limit.
Greater than value: Signal is above 16-bit low limit, so 16-bit high limit is not used.
Less than value: Signal is below 16-bit high limit, so 16-bit low limit is not used.
Equal to value: Signal is equal to 16-bit high limit, and limit B is not used.
The equal to mode is intended for use when the counter or digital input channels are the source channel.
You should only use the equal to16-bit high limit (limit A) mode with counter or digital input channels as
the channel source. If you want similar functionality for analog channels, then use the inside window mode
ƒ
Hysteresis mode: Outside the window, high forces output 2 until an outside the window low condition
exists, then output 1 is forced. Output 1 continues until an outside the window high condition exists. The
cycle repeats as long as the acquisition is running in hysteresis mode.
Set output channel
ƒ
ƒ
ƒ
None
Update FIRSTPORTC
Update timerx
Update modes
ƒ
ƒ
Update on True only
Update on True and False
Set values for output
ƒ
ƒ
FIRSTPORTC* value or timer value when input meets criteria.
FIRSTPORTC* value or timer value when input does not meet criteria.
* By default, FIRSTPORTC comes up as a digital input. You may want to initialize FIRSTPORTC to a
known state before running the input scan to detect the setpoints.
When using setpoints with triggers other than immediate, hardware analog, or TLL, the setpoint criteria
evaluation begins immediately upon arming the acquisition.
26
PCI-2513 User's Guide
Functional Details
Using the setpoint status register
You can use the setpoint status register to check the current state of the 16 possible setpoints. In the register,
Setpoint 0 is the least-significant bit and Setpoint 15 is the most-significant bit. Each setpoint is assigned a
value of 0 or 1.
ƒ
ƒ
A value of 0 indicates that the setpoint criteria is not met—in other words, the condition is False.
A value of 1 indicates that the criteria has been met—in other words, the condition is True.
In the following example, the criteria for setpoints 0, 1, and 4 is satisfied (True), but the criteria for the other 13
setpoints has not been met.
Setpoint #
True (1)
False (0)
15
0
14
0
13
0
12
0
11
0
10
0
9
8
7
6
5
4
3
2
1
0
0 0 0 0 0 1 0 0 1 1
Least significant bit >>>
<<< Most significant bit
From the above table we have 10011binary, or 19 decimal, derived as follows:
ƒ
ƒ
ƒ
Setpoint 0, having a True state, shows 1, giving us decimal 1.
Setpoint 1, having a True state, shows 1, giving us decimal 2.
Setpoint 4, having a True state, shows 1, giving us decimal 16.
For proper operation, the setpoint status register must be the last channel in the scan list.
Examples of control outputs
Detecting on analog input and FIRSTPORTC updates
Update mode: Update on True and False
Criteria: Channel 4: inside window
Channel 4 is programmed with reference to two setpoints (limit A and limit B) which define a window for that
channel.
Channel Condition
State of detect
signal
Action
4
Within window (between
limit A and limit B) for
channel 4
True
When Channel 4's analog input voltage is within the
window, update FIRSTPORTC with 70h.
When the above stated condition is False (channel 4
analog input voltage is outside the window), update
FIRSTPORTC with 30h.
False
Figure 14. Analog inputs with setpoints update on True and False
27
PCI-2513 User's Guide
Functional Details
You can program control outputs programmed on each setpoint, and use the detection for channel 4 to update
the FIRSTPORTC digital output port with one value (70 h in the example) when the analog input voltage is
within the shaded region and a different value when the analog input voltage is outside the shaded region (30 h
in the example).
Detection on an analog input, timer output updates
Update Mode: Update on True and False
Criteria Used: Inside window
The figure below shows how a setpoint can be used to update a timer output. Channel 3 is an analog input
channel. A setpoint is applied using update on True and False, with a criteria of inside-the-window, where the
signal value is inside the window when simultaneously less than Limit A but greater than Limit B.
Whenever the channel 3 analog input voltage is inside the setpoint window (condition True), Timer0 is updated
with one value; and whenever the channel 3 analog input voltage is outside the setpoint window (condition
False) timer0 will be updated with a second output value.
Figure 15. Timer output update on True and False
Using the hysteresis function
Update mode: N/A, the hysteresis option has a forced update built into the function
Criteria used: Window criteria for above and below the set limits
The figure below shows analog input Channel 3 with a setpoint which defines two 16-bit limits, Limit A (High)
and Limit B (Low). These are being applied in the hysteresis mode and FIRSTPORTC is updated accordingly.
In this example, Channel 3's analog input voltage is being used to update FIRSTPORTC as follows:
ƒ
ƒ
When outside the window, low (below limit B) FIRSTPORTC is updated with 30 h. This update remains in
effect until the analog input voltage goes above Limit A.
When outside the window, high (above limit A), FIRSTPORTC is updated with 30 h. This update remains
in effect until the analog input signal falls below limit B. At that time we are again outside the limit "low"
and the update process repeats itself.
Hysteresis mode can also be done with a timer output, instead of a FIRSTPORTC digital output port.
28
PCI-2513 User's Guide
Functional Details
Figure 16. Channel 3 in hysteresis mode
Detecting setpoints on a totalizing counter
In the following figure, Channel 1 is a counter in totalize mode. Two setpoints define a point of change for
Detect 1 as the counter counts upward. The detect output is high when inside the window (greater than Limit B
(the low limit) but less than Limit A (the high limit).
In this case, the Channel 1 setpoint is defined for the 16 lower bits of channel 1's 32-bit value. The
FIRSTPORTC digital output port could be updated on a True condition (the rising edge of the detection signal).
Alternately timer outputs could be updated with a value.
At this point you can update FIRSTPORTC
Figure 17. Channel 1 in totalizing counter mode, inside the window setpoint
Detection setpoint details
Controlling digital and timer outputs
You can program each setpoint with an 8-bit digital output byte and corresponding 8-bit mask byte. When the
setpoint criteria is met, the FIRSTPORTC digital output port can be updated with the given byte and mask. Any
setpoint can also be programmed with a timer update value.
In hysteresis mode, each setpoint has two forced update values. Each update value can drive one timer or the
FIRSTPORTC digital output port. In hysteresis mode, the outputs do not change when the input values are
29
PCI-2513 User's Guide
Functional Details
inside the window. There is one update value that gets applied when the input values are less than the window
and a different update value that gets applied when the input values are greater than the window.
Update on True and False uses two update values. The update values can drive FIRSTPORTC or timer outputs.
FIRSTPORTC digital outputs can be updated immediately upon setpoint detection.
FIRSTPORTC or timer update latency
Setpoints allow timers or FIRSTPORTC digital outputs to update very quickly. Exactly how fast an output can
update is determined by these factors:
ƒ
ƒ
ƒ
scan rate
synchronous sampling mode
type of output to be updated
For example, you set an acquisition to have a scan rate of 100 kHz, which means each scan period is 10 µs.
Within the scan period you sample six analog input channels. These are shown in the following figure as
channels 1 through 6. The ADC conversion occurs at the beginning of each channel's 1 µs time block.
FIRSTPORTC
Figure 18. Example of FIRSTPORTC latency
By applying a setpoint on analog input channel 2, that setpoint gets evaluated every 10 µs with respect to the
sampled data for channel 2.
Due to the pipelined architecture of the analog-to-digital converter system, the setpoint cannot be evaluated
until 2 µs after the ADC conversion. In the example above, the FIRSTPORTC digital output port can be
updated no sooner than 2 µs after channel 2 has been sampled, or 3 µs after the start of the scan. This 2 µs delay
is due to the pipelined ADC architecture. The setpoint is evaluated 2 µs after the ADC conversion and then
FIRSTPORTC can be updated immediately.
The detection circuit works on data that is put into the acquisition stream at the scan rate. This data is acquired
according to the pre-acquisition setup (scan group, scan period, etc.) and returned to the PC. Counters are
latched into the acquisition stream at the beginning of every scan. The actual counters may be counting much
faster than the scan rate, and therefore only every 10th, 100th, or nth count shows up in the acquisition data.
As a result, you can set a small detection window on a totalizing counter channel and have the detection setpoint
"stepped over" since the scan period was too long. Even though the counter value stepped into and out of the
detection window, the actual values going back to the PC may not. This is true no matter what mode the counter
channel is in.
When setting a detection window, keep a scan period in mind. This applies to analog inputs and counter inputs.
Quickly changing analog input voltages can step over a setpoint window if not sampled often enough.
30
PCI-2513 User's Guide
Functional Details
There are three possible solutions for overcoming this problem:
ƒ
ƒ
Shorten the scan period to give more timing resolution on the counter values or analog values.
Widen the setpoint window by increasing limit A and/or lowering limit B.
A combination of both solutions (1 and 2) could be made.
31
Chapter 4
Calibrating the PCI-2513
Every range of a PCI-2513 device is calibrated at the factory using a digital NIST traceable calibration method.
This method works by storing a correction factor for each range on the unit at the time of calibration. For analog
inputs, the user can adjust the calibration of the board while it is installed in the acquisition system. This does
not destroy the factory calibration supplied with the board. This is accomplished by having two distinct
calibration tables in the PCI-2513 on-board EPROM—one which contains the factory calibration, and the other
which is available for field calibration.
You can perform field calibration automatically in seconds with InstaCal and without the use of external
hardware or instruments.
Field calibration derives its traceability through an on-board reference which has a stability of 0.005% per year.
Note that a two-year calibration period is recommended for PCI-2513 boards.
You should calibrate the PCI-2513 using InstaCal after the board has fully warmed up. The recommended
warm-up time is 30 minutes. For best results, calibrate the board immediately before making critical
measurements. The high resolution analog components on the board are somewhat sensitive to temperature.
Pre-measurement calibration ensures that your board is operating at optimum calibration values.
32
Chapter 5
Specifications
Typical for 25 °C unless otherwise specified.
Specifications in italic text are guaranteed by design.
Analog input
Table 1. Analog input specifications
Successive approximation
A/D converter type
Resolution
16 bits
Number of channels
Input ranges (SW programmable)
Maximum sample rate
Nonlinearity (integral)
Nonlinearity (differential)
A/D pacing
16 single-ended/8 differential, software-selectable
Bipolar: ±10 V, ±5 V, ±2 V, ±1 V , ±0.5 V, ±0.2 V, ±0.1 V
1 MHz
±2 LSB maximum
±1 LSB maximum
On board A/D clock, external source (XAPCR)
See Table 6
Trigger sources and modes
Data transfer
DMA
Configuration memory
Maximum usable input voltage
Programmable I/O
Range: ±10 V, ±5 V, ±2 V, ±1 V , ±0.5 V
10.5 V maximum
+ common mode voltage
(CMV + Vin)
Range: ±0.2 V, ±0.1 V
2.1 V maximum
Signal to noise and distortion
Total harmonic distortion
Calibration
72 dB typical for ±10 V range, 1 kHz fundamental
-80 dB typical for ±10 V range, 1 kHz fundamental
Auto-calibration, calibration factors for each range stored on the board in non-
volatile RAM.
CMRR @ 60 Hz
-70 dB typical DC to 1 kHz
40 pA typical (0 °C to 35°C)
10 MΩ single-ended, 20 MΩ differential
±30 V
Bias current
Input impedance
Absolute maximum input voltage
Accuracy
Table 2. Analog input accuracy specifications
Voltage range
Accuracy
±(% of reading + %
range)
Temperature coefficient
±(ppm of reading + ppm range)/°C
Noise (cts
RMS)
23°C ±10 °C, 1 year
-10 V to 10 V
-5 V to 5 V
-2 V to 2 V
0.031% + 0.008%
0.031% + 0.009%
0.031% + 0.010%
0.031% + 0.02%
0.031% + 0.04%
0.036% + 0.075%
0.042% + 0.15%
14 + 8
14 + 9
14 +10
14 + 12
14 +18
14 +12
14 +18
1.5
2.0
1.6
Note 1
Note 2
-1 V to 1 V
2.5
4.0
5.0
9.0
-500 mV to 500 mV
-200 mV to 200 mV
-100 mV to 100 mV
Note 1:
Specifications assume differential input single-channel scan, 1 MHz scan rate, unfiltered,
CMV=0.0 V, 30 minute warm-up, exclusive of noise.
Note 2:
Noise reflects 10,000 samples at 1 MHz, typical, differential short, using CA-68-3S cable.
33
PCI-2513 User's Guide
Specifications
Digital input / output
Table 3. Digital input/output specifications
Number of I/O
Ports
24
Three banks of 8.
Each port is programmable as input or output
Input scanning mode
Configuration
Input protection
Input high
Asynchronous, under program control at any time relative to input scanning
10 kΩ pull-up to +5 V, 20 pf to analog common
±15 kV ESD clamp diodes
+2.0 V to +5.0 V
Input low
0 to 0.8 V
Output high
>2.0 V
Output low
<0.8 V
Output current
Digital input pacing
Digital output pacing
Output 12 mA per pin, 200 mA total continuous
Onboard clock, external clock (XAPCR)
Four programmable sources:
ƒ Onboard D/A clock, independent of scanning input clock
ƒ Onboard scanning input clock
ƒ External D/A input clock, independent of external scanning input clock-
(XDPCR)
ƒ External scanning input clock-(XAPCR)
Digital input trigger sources and
modes
See Table 6
Digital output trigger sources
Data transfer
Start of input scan
DMA
Sampling/update rate
Pattern generation output
12 MHz maximum
Two of the 8-bit ports can be configured for 16-bit pattern generation. The pattern
can also be updated synchronously with an acquisition at up to 12 MHz.
Counters
Counter inputs can be scanned based on an internal programmable timer or an external clock source.
Table 4. Counter specifications
Channels
Four independent
32-bit
Resolution
Input frequency
Input signal range
Input characteristics
Trigger level
20 MHz maximum
-5 V to 10 V
10 kΩ pull-up, ±15 kV ESD protection
TTL
Minimum pulse width
De-bounce times
25 ns high, 25 ns low
16 selections from 500 ns to 25.5 ms, positive or negative edge sensitive, glitch
detect mode or de-bounce mode
Time-base accuracy
Counter read pacer
30 ppm (0 ° to 50 °C)
On board clock, external clock (XAPCR)
See Table 6
Trigger sources and modes
Programmable mode
Counter mode options
Counter
Totalize, clear on read, rollover, stop at all Fs, 16- or 32-bit, any other channel can
gate the counter
34
PCI-2513 User's Guide
Specifications
Input sequencer
Analog, digital, and counter inputs can be scanned based on either an internal programmable timer or an
external clock source.
Table 5. Input sequencer specifications
Scan clock sources: two (Note 3)
Internal:
ƒ Analog channels from 1 µs to 1 sec in 20.83 ns steps.
ƒ Digital channels and counters from 83.33 ns to 1 sec in 20.83 ns steps.
External. TTL-level input:
ƒ Analog channels down to 1 µs minimum
ƒ Digital channels and counters down to 83 ns minimum
ƒ Programmable channels (random order)
ƒ Programmable gain
Programmable parameters per scan
Depth
512 locations
Onboard channel-to-channel scan
rate
Analog: 1 MHz maximum
Digital: 12 MHz
1.0 MHz
External acquisition scan clock
input maximum rate
Clock signal range:
Logical zero: 0 V to 0.8 V
Logical one: 2.4 V to 5.0 V
50 ns high, 50 ns low
Minimum pulse width
Note 3:
The maximum scan clock rate is the inverse of the minimum scan period. The minimum scan period
is equal to 1 µs times the number of analog channels. If a scan contains only digital channels then
the minimum scan period is 83 ns times the number of digital channels.
Trigger sources and modes
Table 6. Trigger sources and modes
ƒ Single channel analog hardware trigger
ƒ Single channel analog software trigger
ƒ External-single channel digital trigger (TTL TRG input)
ƒ Digital pattern trigger
Input scan
trigger
sources
ƒ Counter/totalizer trigger
Input scan Single channel analog hardware trigger: The first analog input channel in the scan is the analog trigger channel.
triggering
modes
ƒ Input signal range: -10 V to +10 V maximum
ƒ Trigger level: Programmable (12-bit resolution)
ƒ Latency: 350 ns typical
ƒ Accuracy: ±0.5% of reading, ±2 mV offset maximum
ƒ Noise: 2 mV RMS typical
Single channel analog software trigger: The first analog input channel in the scan is the analog trigger channel.
ƒ Input signal range: Anywhere within range of the trigger channel
ƒ Trigger level: Programmable (16-bit resolution)
ƒ Latency: One scan period (maximum)
External-single channel digital trigger (TTL trigger input):
ƒ Input signal range: -15 V to +15 V maximum
ƒ Trigger level: TTL-level sensitive
ƒ Minimum pulse width: 50 ns high, 50 ns low
ƒ Latency: One scan period maximum
Digital pattern triggering: 8-bit or 16-bit pattern triggering on any of the digital ports. Programmable for
trigger on equal, not equal, above, or below a value. Individual bits can be masked for "don’t care" condition.
Latency: One scan period, max
Counter/totalizer triggering: Counter/totalizer inputs can trigger an acquisition. User can select to trigger on a
frequency or on total counts that are equal, not equal, above, or below a value, or within/outside of a window
rising/falling edge.
Latency: One scan period, maximum
35
PCI-2513 User's Guide
Specifications
Frequency/pulse generators
Table 7. Frequency/pulse generator specifications
Channels
2 x 16-bit
Output waveform
Output rate
Square wave
1 MHz base rate divided by 1 to 65535 (programmable)
2.0 V minimum @ -1.0 mA, 2.9 V minimum @ -400 µA
0.4 V maximum @ 400 µA
High-level output voltage
Low-level output voltage
Power consumption
Table 8. Power consumption specifications
Power consumption (per board)
3 W
PCI compatibility
Table 9. PCI compatibility specifications
PCI bus
PCI r2.2 compliant, universal 3.3 V/5 V signaling support, compatible with PCI-X
Environmental
Table 10. Environmental specifications
Operating temperature range
Storage temperature range
Relative humidity
0 °C to +60 °C
-40 °C to +80 °C
0 to 95% non-condensing
Mechanical
Table 11. Mechanical specifications
Vibration
Dimensions
Weight
MIL STD 810E cat 1 and 10
165 mm (W) x 15 mm (D) x 108 mm (H) (6.5” x 0.6” x 4.2”)
160 g (0.35 lbs)
Main connector and pin out
Table 12. Main connector specifications
Connector type
68-pin standard "SCSI TYPE III" female connector
HDMI connector (targeted for future expansion)
CA-68-3R — 68-pin ribbon cable; 3 feet.
Compatible cables (for the 68-
pin SCSI connector)
CA-68-3S — 68-pin shielded round cable; 3 feet.
CA-68-6S — 68-pin shielded round cable; 6 feet.
Compatible accessory products
TB-100 termination board with screw terminals
RM-TB-100, 19-inch rack mount kit for TB-100
36
PCI-2513 User's Guide
Specifications
Table 13. 16-channel single-ended pin out
Pin
Function
Pin
Function
68 ACH0
67 AGND
66 ACH9
65 ACH2
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
ACH8
ACH1
AGND
ACH10
ACH3
AGND
ACH4
AGND
ACH13
ACH6
AGND
ACH15
NC
NC
64 AGND
63 ACH11
62 SGND (low level sense – not for general use)
61 ACH12
60 ACH5
59 AGND
58 ACH14
57 ACH7
56 NC
55 NC
54 NEGREF (reserved for self-calibration)
53 GND
52 A1
51 A3
50 A5
49 A7
48 B1
47 B3
46 B5
POSREF (reserved for self-calibration)
+5 V (see Note 4)
A0
A2
A4
A6
B0
B2
B4
B6
C0
C2
45 B7
44 C1
43 C3
42 C5
8
C4
41 C7
7
C6
40 GND
39 CNT1
38 CNT3
37 TMR1
36 GND
35 GND
6
5
4
3
2
1
TTL TRG
CNT0
CNT2
TMR0
XAPCR
XDPCR
37
PCI-2513 User's Guide
Specifications
Table 14. 8-channel differential pin out
Pin
Function
Pin
Function
68 ACH0 HI
67 AGND
66 ACH1 LO
65 ACH2 HI
64 AGND
63 ACH3 LO
62 SGND (low level sense – not for general use)
61 ACH4 LO
60 ACH5 HI
59 AGND
58 ACH6 LO
57 ACH7 HI
56 NC
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
ACH0 LO
ACH1 HI
AGND
ACH2 LO
ACH3 HI
AGND
ACH4 HI
AGND
ACH5 LO
ACH6 HI
AGND
ACH7 LO
NC
NC
POSREF (reserved for self-calibration)
+5 V (see Note 4)
A0
A2
A4
A6
B0
B2
B4
B6
C0
C2
55 NC
54 NEGREF (reserved for self-calibration)
53 GND
52 A1
51 A3
50 A5
49 A7
48 B1
47 B3
46 B5
45 B7
44 C1
43 C3
42 C5
8
C4
41 C7
7
C6
40 GND
39 CNT1
38 CNT3
37 TMR1
36 GND
35 GND
6
5
4
3
2
1
TTL TRG
CNT0
CNT2
TMR0
XAPCR
XDPCR
Note 4: 5 V output, up to 500 mA.
38
Declaration of Conformity
Manufacturer:
Address:
IOTech, Incorporated
25971 Cannon Road
Cleveland, OH 44146
USA
Category:
Information technology equipment.
IOTech, Incorporated declares under sole responsibility that the product
PCI-2513
to which this declaration relates is in conformity with the relevant provisions of the following standards or other
documents:
EU EMC Directive 89/336/EEC: Electromagnetic Compatibility, EN 61326 (1997) Amendment 1 (1998)
Emissions: Group 1, Class A
ƒ
EN 55022 (1990)/CISPR 22: Radiated and Conducted emissions.
Immunity: EN61326, Annex A
ƒ
ƒ
ƒ
ƒ
ƒ
IEC 61000-4-2 (1995): Electrostatic Discharge immunity, Criteria B.
IEC 61000-4-3 (1995): Radiated Electromagnetic Field immunity Criteria A.
IEC 61000-4-4 (1995): Electric Fast Transient Burst immunity Criteria B.
IEC 61000-4-5 (1995): Surge immunity Criteria A.
IEC 61000-4-6 (1996): Radio Frequency Common Mode immunity Criteria A.
To maintain the safety, emission, and immunity standards of this declaration, the following conditions must be
met.
ƒ
ƒ
ƒ
ƒ
ƒ
ƒ
Part CA-68-3S or CA-68-6S must be properly installed.
The host computer, peripheral equipment, power sources, and expansion hardware must be CE compliant.
All I/O cables must be shielded, with the shields connected to CHASSIS ground stud.
I/O cables must be less than 3 meters (9.75 feet) in length.
The host computer must be properly grounded.
Equipment must be operated in a controlled electromagnetic environment as defined by Standards EN
61326:1998, or IEC 61326:1998.
Note: Data acquisition equipment may exhibit noise or increased offsets when exposed to high RF fields
(>3V/m) or transients.
Declaration of Conformity based on tests conducted by Smith Electronics, Inc., Cleveland, OH 44141, USA in
December, 2005. Test records are outlined in Smith Electronics Test Report “Daqboard 3000 with PDQ30
Expansion Module”.
We hereby declare that the equipment specified conforms to the above Directives and Standards.
Paul Wittibschlager
Director of Hardware Engineering
Measurement Computing Corporation
10 Commerce Way
Suite 1008
Norton, Massachusetts 02766
(508) 946-5100
Fax: (508) 946-9500
E-mail: [email protected]
|