User’s Manual
CX-MB-EVA2
MSC COM ExpressTM Evaluation Board
Rev. 1.0
January 14 , 2009
CX-MB-EVA2 User's Manual
Content
1 ........................................................................................................................... 1
Preface ................................................................................................................ 2
1 General Information...................................................................................... 7
1.1 Revisions and Modifications.................................................................................. 7
1.2 Reference Documents........................................................................................... 7
1.3 Definitions and Abbreviations................................................................................ 8
2 Introduction................................................................................................... 9
2.1 Product Description............................................................................................... 9
2.2 Features................................................................................................................ 9
2.3 Block Diagram......................................................................................................11
2.4 Positioning of the Connectors...............................................................................12
3 Mechanics ................................................................................................... 13
3.1 Dimensions ..........................................................................................................13
3.2 Assembly notes....................................................................................................13
4 Hardware ..................................................................................................... 14
4.1 Plug-in Position of the COM Express module.......................................................14
4.2 PCI Slots..............................................................................................................19
4.3 PCI Express x1 Slots............................................................................................21
4.4 PCI Express x16 Graphics Slot ............................................................................22
4.5 VGA Interface.......................................................................................................24
4.6 LVDS-Interface.....................................................................................................25
4.6.1 LVDS EEPROM.................................................................................................25
4.6.2 Backlight Inverter Interface...................................................................................26
4.7 JILI Interface ........................................................................................................27
4.7.1 Standard JILI Connector.......................................................................................27
4.7.2 JILI40 Connector..................................................................................................27
4.8 TV Out..................................................................................................................28
4.9 Audio....................................................................................................................29
4.9.1 AC'97 codec.........................................................................................................29
4.9.1.1
4.9.1.2
4.9.1.3
4.9.1.4
Mono-Microphone.......................................................................................29
Stereo LineIn ..............................................................................................30
Stereo LineOut ...........................................................................................30
Stereo Headphone......................................................................................30
4.9.2 HDA codec...........................................................................................................31
4.10 IDE Interface.....................................................................................................31
4.10.1 Primary IDE Channel ........................................................................................31
4.10.1.1.1
4.10.1.1.2
4.10.1.1.3
40-pin IDE interface..............................................................................31
44-pin IDE Interface .............................................................................31
Compact Flash Interface ......................................................................32
4.11
4.12
SATA-Interface .................................................................................................32
USB Topology...................................................................................................33
4.12.1 USB Power Supply............................................................................................33
4.13
4.14
4.15
4.16
4.17
Ethernet ............................................................................................................34
LPC Slot............................................................................................................34
I/O Connector....................................................................................................35
GPIO.................................................................................................................36
ATX Connector .................................................................................................36
3
CX-MB-EVA2 User's Manual
4.18
SuperIO ............................................................................................................37
4.18.1 COM Ports........................................................................................................37
4.18.2 IrDA...................................................................................................................38
4.18.3 PS/2..................................................................................................................38
4.18.4 Fan interface.....................................................................................................39
4.18.5 Intel Fan interface .............................................................................................39
4.18.6 SuperIO Hardware Monitor ...............................................................................39
4.19
4.20
4.21
4.22
4.23
SMB Hardware Monitor.....................................................................................40
Serial EEPROM on SMBus...............................................................................40
Serial EEPROM on I2C-Bus..............................................................................40
OnBoard BIOS-Flash ........................................................................................41
POST-Code Display..........................................................................................41
4.23.1 Lattice Programming Interface ..........................................................................41
4.24
4.25
4.26
4.27
4.28
Battery ..............................................................................................................42
Beeper ..............................................................................................................42
Power Button ....................................................................................................42
Reset Button .....................................................................................................42
Miscellaneous ...................................................................................................43
4.28.1 Resistors for current measuring ........................................................................43
4.28.2 Ground Pins......................................................................................................43
4.28.3 Sleep State LED Display...................................................................................43
4.29
Jumper settings.................................................................................................44
4.29.1 BIOS-Flash Jumper J0203................................................................................44
4.29.2 PCI I/O voltage Jumper J0306 ..........................................................................44
4.29.3 Backlight power Jumpers JP0601 .....................................................................44
4.29.4 Backlight polarity Jumper J5 .............................................................................44
4.29.5 AC'97 / HDA select Jumper J0701 ....................................................................44
4.29.6 Compact Flash Master Jumper J0802...............................................................44
4.29.7 LAN speed mode Jumper J1003.......................................................................44
4.29.8 Battery Jumper J1101.......................................................................................45
4.29.9 Super I/O disable Jumper J6.............................................................................45
4.29.10 SMBus Hardware monitor address Jumper J1303.........................................45
4.29.11 ATX Funktion Jumper J1301..........................................................................45
4.29.12 No ATX Jumper J1302...................................................................................45
4.29.13 GPI SMI Jumper JP1101 ...............................................................................45
4.29.14 GPI GPO Jumper X35 ...................................................................................45
4.29.15 Lane RV Jumper J0504 ................................................................................46
DIP-switch settings........................................................................................................46
4.29.16 LCD EEPROM SW0611.................................................................................46
4.29.17 SMB EEPROM SW1101................................................................................46
4.29.18 I²C EEPROM SW1102...................................................................................46
4.29.19 GPI-switch SW1103.......................................................................................46
4
CX-MB-EVA2 User's Manual
Illustrations
Illustration 1 Block Diagram Base Board........................................................................11
Illustration 2 Positioning of the Connectors...................................................................12
5
CX-MB-EVA2 User's Manual
Tables
Table 1 COMExpress Connector Rows A and B ............................................................16
Table 2 COMExpress Connector Rows C and D ............................................................18
Table 3 Assignment PCI slot to connector reference ....................................................19
Table 4 Pin out PCI...........................................................................................................20
Table 5 Assignment PCIe Lane to connector reference ................................................21
Table 6 Pin out PCI Express ............................................................................................21
Table 6 Pin out PCI Express x16 Graphics Slot .............................................................23
Table 5 Pinout VGA Interface ..........................................................................................24
Table 6 Pinout Single Channel LVDS-Interface..............................................................25
Table 7 Pinout Backlight..................................................................................................26
Table 8 Pinout TV-Out......................................................................................................28
Table 9 Pinout TV-Out Pin header...................................................................................28
Table 10 Pinout Microphone............................................................................................29
Table 11 Pinout LineIn .....................................................................................................30
Table 12 Pinout LineOut ..................................................................................................30
Table 13 Pinout Headphone.............................................................................................30
Table 14 Pinout LineOut ..................................................................................................31
Table 15 Assignment SATA Channel to Connector Reference .....................................32
Table 16 Assignment USB Ports .....................................................................................33
Table 17 Pinout LPC-Slot.................................................................................................34
Table 18 Pinout I/O-Connector ........................................................................................35
Table 19 Pinout GPIO connector.....................................................................................36
Table 20 Pinout COM Ports..............................................................................................37
Table 21 Pinout IrDA ........................................................................................................38
Table 22 Pinout Upper PS/2 Jack....................................................................................38
Table 23 Pinout Lower PS/2 Jack....................................................................................38
Table 24 Pinout Fan Interface..........................................................................................39
Table 25 Pinout Fan Interface..........................................................................................39
Table 26 Pinout POST Display (HP-POD)........................................................................41
Table 27 Pinout Lattice Programming Interface.............................................................42
6
CX-MB-EVA2 User's Manual
General Information
1
General Information
1.1
Revisions and Modifications
Revision
Date
Comment
1.0
January 14, 2009
First release
1.2
Reference Documents
[1] COM Express Module Base Specification
COM Express Revision 1.0
Last update: July 10th, 2005
[2] ATX Specification
atx2_21.pdf
Version 2.2
[3] PCI Local Bus Specification Rev. 2.1
PCI21.PDF
Last update: June 1st, 1995
[4] JILI Specification
Jilim120.pdf
Last update: April 7th, 2003
[5] Digital Video Interface DVI
dvi_10.pdf
Rev. 1.0 April 2nd, 1999
[6] ATA/ATAPI-6 Specification
d1410r3b.pdf
[7] CF+ & CF Specification Rev. 3.0
cfspc3_0.pdf
[8] Serial ATA Specification
Serial ATA 1.0 gold.pdf
Last update: August 29th, 2002 Rev.1.0
[9] IEEE Std. 802.3-2002
802.3-2002.pdf
[10] Universal Bus Specification
usb_20.pdf
Last update: April 27th, 2000
7
CX-MB-EVA2 User's Manual
General Information
1.3
Definitions and Abbreviations
COM
RTC
ATX
PCI
IDE
EIDE
CF
ATA
ATAPI
SATA
USB
PEG
GPIO
LVDS
JILI
Computer-On-Module
Real Time Clock
Advanced Technology Extended
Peripheral Component Interconnect
Integrated Drive Electronics
Enhanced Integrated Drive Electronics
Compact Flash
Advanced Technology Attachment
Advanced Technology Attachment with Packet Interface
Serial Advanced Technology Attachment
Universal Serial Bus
PCI express Graphics
General Purpose Input / Output
Low Voltage Differential Signaling
JUMPtec Intelligent LVDS Interface
Local Area Network
Video Graphics Array
Low Pin Count
LAN
VGA
LPC
POST
SMBus
MDI
Power on self test
System Management Bus
Medium Dependent Interface
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CX-MB-EVA2 User's Manual
Introduction
2
Introduction
2.1
Product Description
COM Express modules are compact, highly integrated Single Board Computers.
Typically a COM Express module consists of CPU, chipset, memory, video controller,
Ethernet controller, BIOS flash and EIDE-, SATA- and USB controller. Interface
controllers (e.g. for PCMCIA) or connectors (e.g. RJ45) are implemented on the base
board on to which the COM Express module can be mounted via one or two 220-pin
SMD-connectors. Beside the power supply also signals for PCIe- and PCI-bus, EIDE,
SATA, USB, LPC etc. are present on these connectors.
The type of interfaces that is led from the COM Express module to the base board
depends on the type of module that is used. The COM Express specification defines five
different types which differ in number and pin assignment of the module connectors.
Thanks to the standardized mechanics and interfaces the system can be scaled
arbitrarily. In spite of a modular concept the systems design is very flat and compact.
COM Express modules require a base-board for successful operation.
The base board described below acts as an evaluation board for the COM Express
modules.
2.2
Features
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
Interface for COM Express module type 2 up to extended form factor
PCI slots 32Bit v2.1
6 PCIe slots
PCIe x16 graphics / SDVO
VGA interface
LVDS interface
Standard JILI / JILI40
TV-Out
AC'97-Link
o LineIn
o LineOut
o Headphone
o Microphone
High Definition Audio
o LineIn
ꢀ
o LineOut
o Microphone
o Center / LFE
o Surround
o Side
9
CX-MB-EVA2 User's Manual
Introduction
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
40 pin IDE interface Ultra ATA-100/66/33
44 pin IDE interface Ultra ATA-100/66/33
Compact flash interface Spec. v3.0
SATA channels up to 150MB/s
8 USB2.0 root hub interfaces
LAN interface max. 1GBit
LPC slot
Pin header for GPIOs
SuperIO W83627THF
o 2x PS/2
o 2x COM
o 1x IrDA
o fan interfaces
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
Hardware monitoring
Power supply via ATX connector
POST display on LPC
Serial EEPROM on I²C-Bus
Serial EEPROM on SMBus
On-board BIOS Flash
Beeper
Note : Support for all above features will also depend on the COM Express module being
used. Not all modules support the maximum number of interfaces.
10
CX-MB-EVA2 User's Manual
Introduction
2.3
Block Diagram
BACK
LIGHT
PCIe
Graphics
TVout
VGA
LCD
Center
LFE
HP
Side
MIC
Line
IN
Line
OUT
Head
Phone
MIC
LAN
JILI40
Line
IN
Front
Trans-
former
AC97 - CODEC
JILI
HDA - CODEC
JILI
GPIO
EEPROM
EEPROM
GPIO
I²C
MDI
AC-Link
TV-out
VGA
PCIe-G
A B
I²C
LVDS
COM Express Modul
SMBus
LPC
PCI
PCIe
USB
SATA
IDE
PORT80
EEPROM
40 pin
Connector
6
8
4
HW
IO
Connector
Monitor
LPC Slot
44 pin
Connector
Extension Card
4x
6x
PCIe Slot
8x
4x
Super IO
CF
PCI Slot
USB
SATA
Slot
PS/2
COM1
COM2
SMB
PS/2
COM1 COM2 IrDa
HW
Fan
Monitor
COM Express Base Board
Illustration 1 Block Diagram Base Board
11
CX-MB-EVA2 User's Manual
Introduction
2.4
Positioning of the Connectors
SW1103 SW1101
X35
POST Code
X25
X27
X47
S4
S3 S5
1
PCI - Express
1
3
1
X44
1
1
1
3
2
1
J6
10 12
X51
X49
Reset
SW1102
Power
JP1101
GPIO
Lattice
Programming
Interface
SATA CH2/CH0
POST
Code
Display
X34
Beeper 1
Fan
X6
X10
X11
X7
X9
X8
LPC
1
JILI40
X46
X16
JILI
1
X40
X48
X14
LVDS
1
IRDA
1
X38
J1303
1
COM1/
COM2
X15
J5
OnBoard
BIOS-Flash
Socket
3
6
1 2
2
4
1
Back-
light
X12
JP0601
13 5
X39
X1
SATA CH3/CH1
X50
Audio
HDA
I/O
X45
1
X28
COM Express
Module
Connector
1
J0802
X24
J0306
X22
1
5 3
1
Battery
23
X23
1
J1301
J1302
1
X2
X5
X3
X4
6 4 2
X36
X26
1
X52
CF
Socket
IDE
J0701
J0203 J1101
1
2
3
4
SW0611
J1003
X43
X42
J0504
Lane RV
1
1
Fan
IDC
X37
TV out
X53
USB
X30
X41
Audio AC97
ATX
Power
X29
X31
X32
X33
LAN
1
X21 X20 X19
Keyb./
Mouse
X18
X13
X17
PCI
VGA
Illustration 2 Positioning of the Connectors
12
CX-MB-EVA2 User's Manual
Mechanics
3 Mechanics
3.1
Dimensions
Dimension:
254.5 mm x 36.8 mm
1.6 mm + /-10%
+/- 0.1mm in X and Y
+ 0.1 mm
Width:
Tolerances of the drill holes:
Tolerances of the diameter:
3.2
Assembly notes
CXC:
CXB:
CXE:
4x
5x
7x
M2.5 x 5mm bolt
M2.5 x 5mm bolt
M2.5 x 5mm bolt
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CX-MB-EVA2 User's Manual
Hardware
4
Hardware
4.1
Plug-in Position of the COM Express module
Sockets for a COM Express type 2 module is available on the base board.
Following form factors are supported:
ꢀ
ꢀ
ꢀ
Compact module (Industry Consortium form-factor)
Basic module
Extended module
Specification:
ꢀ
ꢀ
Reference:
Connector:
0.5 mm pitch free height 440 pin 5H plug (combination of two 220pin plugs)
X1
AMP / Tyco 3-1827233-6
ꢀ
Pinout: Refer to COM Express specification for type 2 module
[1]
Row A
A1
A2
A3
A4
Row B
B1
B2
B3
B4
GND
GND
GBE0_MDI3-
GBE0_MDI3+
GBE0_LINK100#
GBE0_LINK1000#
GBE0_MDI2-
GBE0_MDI2+
GBE0_LINK#
GBE0_MDI1-
GBE0_MDI1+
GND
GBE0_ACT#
LPC_FRAME#
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_DRQ0#
LPC_DRQ1#
LPC_CLK
GND
A5
A6
B5
B6
A7
A8
A9
B7
B8
B9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
GBE0_MDI0-
GBE0_MDI0+
GBE0_CTREF
SUS_S3#
PWRBTN#
SMB_CK
SMB_DAT
SMB_ALERT#
SATA1_TX+
SATA1_TX-
SUS_STAT#
SATA1_RX+
SATA1_RX-
GND
SATA0_TX+
SATA0_TX-
SUS_S4#
SATA0_RX+
SATA0_RX-
GND
SATA2_TX+
SATA2_TX-
SUS_S5#
SATA3_TX+
SATA3_TX-
PWR_OK
SATA2_RX+
SATA2_RX-
BATLOW#
SATA3_RX+
SATA3_RX-
WDT
ATA_ACT#
AC_SYNC
AC_SDIN2
AC_SDIN1
14
CX-MB-EVA2 User's Manual
Hardware
A30
A31
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82
AC_RST#
GND
GND
B30
B31
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
B78
B79
B80
B81
B82
AC_SDIN0
GND
GND
AC_BITCLK
AC_SDOUT
BIOS_DISABLE#
THRMTRIP#
USB6-
SPKR
I2C_CK
I2C_DAT
THRM#
USB7-
USB6+
USB7+
USB_6_7_OC#
USB4-
USB4+
USB_4_5_OC#
USB5-
USB5+
GND
USB2-
USB2+
GND
USB3-
USB3+
USB_2_3_OC#
USB0-
USB0+
USB_0_1_OC#
USB1-
USB1+
VCC_RTC
EXCD0_PERST#
EXCD0_CPPE#
LPC_SERIRQ
GND
EXCD1_PERST#
EXCD1_CPPE#
SYS_RESET#
CB_RESET#
GND
PCIE_TX5+
PCIE_TX5-
GPI0
PCIE_RX5+
PCIE_RX5-
GPO1
PCIE_TX4+
PCIE_TX4-
GND
PCIE_RX4+
PCIE_RX4-
GPO2
PCIE_TX3+
PCIE_TX3-
GND
PCIE_RX3+
PCIE_RX3-
GND
PCIE_TX2+
PCIE_TX2-
GPI1
PCIE_RX2+
PCIE_RX2-
GPO3
PCIE_TX1+
PCIE_TX1-
GND
PCIE_RX1+
PCIE_RX1-
WAKE0#
WAKE1#
PCIE_RX0+
PCIE_RX0-
GND
LVDS_B0+
LVDS_B0-
LVDS_B1+
LVDS_B1-
LVDS_B2+
LVDS_B2-
LVDS_B3+
LVDS_B3-
LVDS_BKLT_EN
GND
GPI2
PCIE_TX0+
PCIE_TX0-
GND
LVDS_A0+
LVDS_A0-
LVDS_A1+
LVDS_A1-
LVDS_A2+
LVDS_A2-
LVDS_VDD_EN
LVDS_A3+
LVDS_A3-
GND
LVDS_A_CK+
LVDS_A_CK-
LVDS_B_CK+
LVDS_B_CK-
15
CX-MB-EVA2 User's Manual
Hardware
A83
A84
LVDS_I2C_CK
LVDS_I2C_DAT
GPI3
B83
B84
LVDS_BKLT_CTRL
VCC_5V_SBY
VCC_5V_SBY
VCC_5V_SBY
VCC_5V_SBY
RSVD
A85
A86
A87
A88
B85
B86
B87
B88
KBD_RST#
KBD_A20GATE
PCIE0_CK_REF+
PCIE0_CK_REF-
GND
A89
A90
B89
B90
VGA_RED
GND
A91
A92
A93
A94
RSVD
RSVD
GPO0
RSVD
B91
B92
B93
B94
VGA_GRN
VGA_BLU
VGA_HSYNC
VGA_VSYNC
VGA_I2C_CK
VGA_I2C_DAT
TV_DAC_A
TV_DAC_B
TV_DAC_C
GND
A95
A96
RSVD
GND
B95
B96
A97
A98
A99
VCC_12V
VCC_12V
VCC_12V
GND
B97
B98
B99
A100
A101
A102
A103
A104
A105
A106
A107
A108
A109
A110
B100
B101
B102
B103
B104
B105
B106
B107
B108
B109
B110
VCC_12V
VCC_12V
VCC_12V
VCC_12V
VCC_12V
VCC_12V
VCC_12V
VCC_12V
VCC_12V
GND
VCC_12V
VCC_12V
VCC_12V
VCC_12V
VCC_12V
VCC_12V
VCC_12V
VCC_12V
VCC_12V
GND
Table 1 COMExpress Connector Rows A and B
Row C
C1
C2
Row D
D1
D2
D3
GND
IDE_D7
GND
IDE_D5
C3
C4
C5
C6
IDE_D6
IDE_D3
IDE_D15
IDE_D8
IDE_D9
IDE_D10
IDE_D11
IDE_D12
IDE_D4
D4
D5
D6
D7
D8
D9
C7
C8
IDE_D0
IDE_D2
IDE_REQ
IDE_IOW#
IDE_ACK#
GND
C9
IDE_D13
IDE_D1
GND
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
C20
C21
C22
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
IDE_D14
IDE_IORDY
IDE_IOR#
PCI_PME#
PCI_GNT2#
PCI_REQ2#
PCI_GNT1#
PCI_REQ1#
PCI_GNT0#
GND
IDE_IRQ
IDE_A0
IDE_A1
IDE_A2
IDE_CS1#
IDE_CS3#
IDE_RESET#
PCI_GNT3#
PCI_REQ3#
GND
PCI_REQ0#
PCI_AD1
16
CX-MB-EVA2 User's Manual
Hardware
C23
C24
C25
C26
C27
C28
C29
C30
C31
C31
C32
C33
C34
C35
C36
C37
C38
C39
C40
C41
C42
C43
C44
C45
C46
C47
C48
C49
C50
C51
C52
C53
C54
C55
C56
C57
C58
C59
C60
C61
C62
C63
C64
C65
C66
C67
C68
C69
C70
C71
C72
C73
C74
C75
PCI_RESET#
D23
D24
D25
D26
D27
D28
D29
D30
D31
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63
D64
D65
D66
D67
D68
D69
D70
D71
D72
D73
D74
D75
PCI_AD3
PCI_AD5
PCI_AD7
PCI_C/BE0#
PCI_AD9
PCI_AD11
PCI_AD13
PCI_AD15
GND
PCI_AD0
PCI_AD2
PCI_AD4
PCI_AD6
PCI_AD8
PCI_AD10
PCI_AD12
GND
GND
GND
PCI_AD14
PCI_C/BE1#
PCI_PERR#
PCI_LOCK#
PCI_DEVSEL#
PCI_IRDY#
PCI_C/BE2#
PCI_AD17
PCI_AD19
GND
PCI_PAR
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#
PCI_AD16
PCI_AD18
PCI_AD20
PCI_AD22
GND
PCI_AD21
PCI_AD23
PCI_C/BE3#
PCI_AD25
PCI_AD27
PCI_AD29
PCI_AD31
PCI_IRQA#
PCI_IRQB#
GND
PEG_RX0+
PEG_RX0-
TYPE0#
PEG_RX1+
PEG_RX1-
TYPE1#
PCI_AD24
PCI_AD26
PCI_AD28
PCI_AD30
PCI_IRQC#
PCI_IRQD#
PCI_CLKRUN#
PCI_M66EN
PCI_CLK
GND
PEG_TX0+
PEG_TX0-
PEG_LANE_RV#
PEG_TX1+
PEG_TX1-
TYPE2#
PEG_RX2+
PEG_RX2-
GND
PEG_RX3+
PEG_RX3-
RSVD
PEG_TX2+
PEG_TX2-
GND
PEG_TX3+
PEG_TX3-
RSVD
RSVD
RSVD
PEG_RX4+
PEG_RX4-
RSVD
PEG_TX4+
PEG_TX4-
GND
PEG_RX5+
PEG_RX5-
GND
PEG_TX5+
PEG_TX5-
GND
PEG_RX6+
PEG_RX6-
SDVO_DATA
PEG_RX7+
PEG_RX7-
PEG_TX6+
PEG_TX6-
SDVO_CLK
PEG_TX7+
PEG_TX7-
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CX-MB-EVA2 User's Manual
Hardware
C76
C77
C78
C79
C80
C81
C82
C83
C84
C85
C86
C87
C88
C89
C90
C91
C92
C93
C94
C95
C96
C97
C98
C99
C100
C101
C102
C103
C104
C105
C106
C107
C108
C109
C110
GND
RSVD
D76
D77
D78
D79
D80
D81
D82
D83
D84
D85
D86
D87
D88
D89
D90
D91
D92
D93
D94
D95
D96
D97
D98
D99
D100
D101
D102
D103
D104
D105
D106
D107
D108
D109
D110
GND
IDE_CBLID#
PEG_TX8+
PEG_TX8-
GND
PEG_RX8+
PEG_RX8-
GND
PEG_RX9+
PEG_RX9-
RSVD
PEG_TX9+
PEG_TX9-
RSVD
GND
GND
PEG_RX10+
PEG_RX10-
GND
PEG_TX10+
PEG_TX10-
GND
PEG_RX11+
PEG_RX11-
GND
PEG_TX11+
PEG_TX11-
GND
PEG_RX12+
PEG_RX12-
GND
PEG_TX12+
PEG_TX12-
GND
PEG_RX13+
PEG_RX13-
GND
PEG_TX13+
PEG_TX13-
GND
RSVD
PEG_ENABLE#
PEG_TX14+
PEG_TX14-
GND
PEG_TX15+
PEG_TX15-
GND
VCC_12V
VCC_12V
VCC_12V
VCC_12V
VCC_12V
VCC_12V
GND
PEG_RX14+
PEG_RX14-
GND
PEG_RX15+
PEG_RX15-
GND
VCC_12V
VCC_12V
VCC_12V
VCC_12V
VCC_12V
VCC_12V
GND
Table 2 COMExpress Connector Rows C and D
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CX-MB-EVA2 User's Manual
Hardware
4.2
PCI Slots
Four 32-bit PCI slots are provided according to PCI specification v2.1.
The signal assignment for slot 0, slot 1, slot 2 and slot 3 is defined in the COM Express
specification.
ꢀ
ꢀ
ꢀ
ꢀ
INTA#, INTB#, INTC# and INTD#
REQ[0..3]#
GNT[0..3]#
IDSEL
PCI Slot
Reference
PCI Slot 0
PCI Slot 1
PCI Slot 2
PCI Slot 3
X2
X3
X4
X5
Table 3 Assignment PCI slot to connector reference
Specification:
ꢀ
ꢀ
ꢀ
References:
Connector:
X2 - X5
AMP / Tyco 5145154-4
Pinout: Refer to PCI specification V2.1 [3]
Pin
A1
Signal
TRST#
12V
Pin
B1
Signal
-12V
TCK
A2
A3
A4
A5
B2
B3
B4
B5
TMS
TDI
5V
GND
TDO
5V
A6
A7
INTA#
INTC#
5V
B6
B7
5V
INTB#
INTD#
PRSNT1#
RSVD
PRSNT2#
GND
GND
RSVD
GND
CLK
A8
A9
B8
B9
RSVD
5V
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
RSVD
GND
GND
3V3
RST#
5V
GNT#
GND
PME#
AD30
3V3
GND
REQ#
5V
AD31
AD29
19
CX-MB-EVA2 User's Manual
Hardware
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
Key
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
AD28
AD26
GND
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
GND
AD27
AD25
3V3
C/BE3#
AD23
GND
AD21
AD19
3V3
AD17
C/BE2#
GND
AD24
IDSEL
3V3
AD22
AD20
GND
AD18
AD16
3V3
FRAME#
GND
IRDY#
3V3
TRDY#
GND
STOP#
3V3
DEVSEL#
GND
LOCK#
PERR#
3V3
SMBCLK
SMBDAT
GND
SERR#
3V3
C/BE1#
AD14
GND
AD12
AD10
GND
PAR
AD15
3V3
AD13
AD11
GND
AD09
C/BE0#
3V3
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
AD08
AD07
3V3
AD06
AD04
GND
AD02
AD00
5V
AD05
AD03
GND
AD01
5V
REQ64#
5V
5V
ACK64#
5V
5V
Table 4 Pin out PCI
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CX-MB-EVA2 User's Manual
Hardware
4.3
PCI Express x1 Slots
One PCIe x1 slot is assigned to each of the 6 PCIe lanes of the COM Express module.
Note: The order of the connectors has changed on the new layout. Now X6 is near PEG
slot.
Note : The number of PCIe lanes available will depend on the COM Express module
used – not all modules can support 6 PCIe lanes.
PCIe Lane
References
PCIe Lane 0
PCIe Lane 1
PCIe Lane 2
PCIe Lane 3
PCIe Lane 4
PCIe Lane 5
X6
X7
X8
X9
X10
X11
Table 5 Assignment PCIe Lane to connector reference
Specification:
ꢀ
ꢀ
ꢀ
References:
Connector:
X6 - X11
AMP / Tyco 4-1612163-1
Pinout: Refer to PCI express specification
Pin
A1
Signal
Pin
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
Signal
12V
PRSNT1#
12V
12V
A2
A3
A4
A5
12V
12V
GND
GND
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
3V3
SMB_CLK
SMB_DAT
GND
A6
A7
A8
A9
3V3
JTAG_RST#
3V3_AUX
WAKE#
A10
A11
KEY
A12
A13
A14
A15
A16
A17
A18
3V3
PE_RST#
GND
B12
B13
B14
B15
B16
B17
B18
RSVD
GND
REFCLK+
REFCLK-
GND
PET_p0
PET_n0
GND
PER_p0
PER_n0
GND
PRSNT2#
GND
Table 6 Pin out PCI Express
21
CX-MB-EVA2 User's Manual
Hardware
4.4
PCI Express x16 Graphics Slot
A PCIe x16 graphics slot is provided for insertion of PEG graphics cards.
Depending on the chipset the PCIe signals are multiplexed with SDVO signals, thus
SDVO modules can be run in this slot as well. SDVO or PCIe graphics will be activated
automatically via PullUps of the SDVO I²C interface on the SDVO module.
Specification:
ꢀ
ꢀ
ꢀ
References:
Connector:
X12
AMP / Tyco 4-1612163-4
Pinout: Refer to PCI express specification
Pin
A1
Signal
Pin
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
Signal
12V
PRSNT1#
12V
12V
A2
A3
12V
12V
A4
A5
A6
A7
GND
GND
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
3V3
SMB_CLK
SMB_DAT
GND
A8
A9
3V3
JTAG_RST#
3V3_AUX
WAKE#
A10
A11
KEY
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
3V3
PE_RST#
GND
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
RSVD
GND
REFCLK+
REFCLK-
GND
PET_p0
PET_n0
GND
PER_p0
PER_n0
GND
PRSNT2#
GND
RSVD
GND
PER_p1
PER_n1
GND
PET_p1
PET_n1
GND
GND
PET_p2
PET_n2
GND
GND
PER_p2
PER_n2
GND
GND
PET_p3
PET_n3
GND
RSVD
PRSNT2#
GND
PET_p4 1
PET_n4 1
GND
GND
PER_p3
PER_n3
GND
RSVD
RSVD
GND
PER_p4 1
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CX-MB-EVA2 User's Manual
Hardware
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82
PER_n4 1
GND
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
B78
B79
B80
B81
B82
GND
PET_p5 1
PET_n5 1
GND
GND
PER_p5 1
PER_n5 1
GND
GND
PET_p6 1
PET_n6 1
GND
GND
PER_p6 1
PER_n6 1
GND
GND
PET_p7 1
PET_n7 1
GND
GND
PER_p7 1
PER_n7 1
GND
PRSNT2#
GND
PET_p8 1
PET_n8 1
GND
RSVD
GND
PER_p8 1
PER_n8 1
GND
GND
PET_p9 1
PET_n9 1
GND
GND
PER_p9 1
PER_n9 1
GND
GND
PET_p10 1
PET_n10 1
GND
GND
PER_p10 1
PER_n10 1
GND
GND
PET_p11 1
PET_n11 1
GND
GND
PER_p11 1
PER_n11 1
GND
GND
PET_p12 1
PET_n12 1
GND
GND
PER_p12 1
PER_n12 1
GND
GND
PET_p13 1
PET_n13 1
GND
GND
PER_p13 1
PER_n13 1
GND
GND
PET_p14 1
PET_n14 1
GND
GND
PER_p14 1
PER_n14 1
GND
GND
PET_p15 1
PET_n15 1
GND
GND
PER_p15 1
PER_n15 1
GND
PRSNT2#
RSVD
Table 7 Pin out PCI Express x16 Graphics Slot
23
CX-MB-EVA2 User's Manual
Hardware
4.5
VGA Interface
An analog display can be connected via a VGA (VESA DDC) interface.
Specification:
ꢀ
ꢀ
ꢀ
References:
Connector:
X13
Suyin 7507S-15G5T-A
Pinout: Refer to Table 3
Pin
Signal name
RED
Function
1
Signal red
2
GREEN
BLUE
RSVD
GND
Signal green
Signal blue
3
4
reserved
5
Ground digital
Ground red
6
RGND
GGND
BGND
+5V
7
Ground green
Ground blue
+5V VDC
8
9
10
11
12
13
14
15
SGND
ID0
Ground Synchronisation
Monitor ID Bit 0 (optional)
DDC Data
SDA
HSYNC
VSYNC
SCL
Horizontal Sync.
Vertical Sync.
DDC Clock
Table 8 Pinout VGA Interface
24
CX-MB-EVA2 User's Manual
Hardware
4.6
LVDS-Interface
LCDs can be connected via a single channel LVDS interface:
Specification:
ꢀ
ꢀ
ꢀ
References:
Connector:
X14
Hirose DF19G-20P-1H
Pinout: Refer to Table 4
Pin 20 can be configured via 0 Ohm resistors to “OPEN” or “GND”
Pin
1
Signal name
VDD
Function
Power Supply: +3.3V
Power Supply: +3.3V
Ground
2
VDD
3
VSS
4
VSS
Ground
5
LVDS_A0-
LVDS_A0+
VSS
LVDS Negative data signal (-)
LVDS Positive data signal (+)
Ground
6
7
8
LVDS_A1-
LVDS_A1+
VSS
LVDS Negative data signal (-)
LVDS Positive data signal (+)
Ground
9
10
11
12
13
14
15
16
17
18
19
20
LVDS_A2-
LVDS_A2+
VSS
LVDS Negative data signal (-)
LVDS Positive data signal (+)
Ground
LVDS_A_CK-
LVDS_A_CK+
VSS
LVDS Negative clock signal (-)
LVDS Positive clock signal (+)
Ground
LVDS_A3-
LVDS_A3+
VSS
LVDS Negative data signal (-)
LVDS Positive data signal (+)
Ground
NC / VSS
Reserved / Ground
Table 9 Pinout Single Channel LVDS-Interface
4.6.1 LVDS EEPROM
To store configuration data of the LCD, a serial EEPROM is connected to the signals
LVDS_I2C_CK and LVDS_I2C_DAT.
To avoid conflicts with configuration EEPROMs connected via the JILI connector, this
EEPROM can be assembled optionally.
25
CX-MB-EVA2 User's Manual
Hardware
4.6.2
Backlight Inverter Interface
The supply voltage of the backlight can be adjusted with jumper JP0601. The according
position is printed on the PCB.
Jumper J5 should be set according to the backlight inverter used.
If the inverter needs a low active start signal, jumper J5 has to be set to L (pin1
connected to pin2).
If the inverter needs a high active start signal, jumper J5 has to be set to H (pin2
connected to pin3).
Brightness of the backlight inverter is controlled via the LVDS-BKLT-CTRL signal.
The LVDS-BKLT-CTRL signal of the COM Express module is a PWM signal with current
chipsets. This signal is integrated and then limited to the maximum allowable voltage of
the backlight inverter via a voltage divider.
Control voltage: 0...3V
A value of 0V corresponds to maximum brightness.
Specification:
ꢀ
ꢀ
ꢀ
References:
Connector:
X15
Molex (53047-0510) 53261-0590
Pinout: Refer to Table 5
Pin
Signal name
VCC
Function
1
Power supply backlight
Ground
2
3
4
5
GND
BLON#
VCON
GND
Backlight On
Brightness control
Ground
Table 10 Pinout Backlight
26
CX-MB-EVA2 User's Manual
Hardware
4.7
JILI Interface
4.7.1
Standard JILI Connector
A standard JILI connector can be used alternatively for connection of LCDs.
Both, single and dual channel LCDs, can be connected to the base board via small
adaptor boards.
Specification:
ꢀ
ꢀ
ꢀ
References:
Connector:
X16
Hirose FH12-40S-0.5SV
Pinout: "standard JILI" according to JILI specification [4]
4.7.2
JILI40 Connector
Any LCD display can be connected via an adaptor board to the JILI40 connector.
Two 24 bit LVDS channels are available on this 40-pin header
Specification:
ꢀ
ꢀ
ꢀ
References:
Connector:
X46
Samtec TMM-120-01-LM-D-SM-P
Pinout: "JILI40" according to JILI specification [4]
27
CX-MB-EVA2 User's Manual
Hardware
4.8
TV Out
A TV-OUT connector is implemented for displaying the video signal on a TV set (or the
like). The base board supports the following video signals
ꢀ
ꢀ
ꢀ
Composite Video
Component Video (YPbPr)
S-Video
The type of the video signal is defined by the graphics controller on the COM Express
module.
Specification:
ꢀ
ꢀ
ꢀ
References:
Connector:
X17
AMP 5786766-1
Pinout: Refer to Table 6
Pin
Signal name
TV_IRTN_B
TV_IRTN_C
TV_DACB
TV_DACC
TV_DACA
TV_IRTNA
RSVD
Composite
Ground
Ground
not used
not used
CVBS
Component
Ground
S-Video
1
2
3
4
5
6
7
Ground
Ground
Ground
Luminance (Y)
Chrominance (Pr)
Chrominance (Pb)
Ground
Luminance
Chrominance
not used
Ground
Ground
reserved
reserved
reserved
Table 11 Pinout TV-Out
The signals can be adapted to a different interface with a 10-pin header.
Specification:
ꢀ
ꢀ
ꢀ
References:
Connector:
X53
IDC-M 10pol. THT RM2.54
Pinout: Refer to Table 7
Pin
Signal
GND
GND
GND
GND
GND
Pin
2
Signal
1
TV_DACA
TV_DACB
TV_DACC
GND
3
5
7
9
4
6
8
10
GND
Table 12 Pinout TV-Out Pin header
28
CX-MB-EVA2 User's Manual
Hardware
4.9
Audio
An AC’97 codec V2.2 is connected to the AC link of the COM Express module. Footprint
and circuit are compatible to following AC’97 codecs:
ꢀ
ꢀ
VIA VT1612A
Realtek ALC650
Following LF signals are provided by the AC’97 codec:
ꢀ
ꢀ
ꢀ
ꢀ
Mono Microphone
Stereo LineIn
Stereo LineOut
Stereo Headphone
Alternatively a VIA VT1708 HDA codec can be connected to the AC link of the COM
Express module. The audio interface can be selected with Jumper J0701.
Following LF signals are provided by the HDA codec:
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
Stereo LineIn
Stereo LineOut
Stereo Microfon
Mono Center / Mono LFE
Stereo Surround
Stereo Side
4.9.1
AC'97 codec
4.9.1.1 Mono-Microphone
Bias voltage for capacitor microphones is provided.
Specification:
ꢀ
ꢀ
ꢀ
References:
Connector:
X18
Kycon ST-3000Mono-Microphone
Pinout: Refer to Table 8
Pin
Signal name
GND
Function
1
2
3
Ground
MIC_BIAS
MIC
Bias initial load (ring)
NF signal (tip)
Table 13 Pinout Microphone
29
CX-MB-EVA2 User's Manual
Hardware
4.9.1.2 Stereo LineIn
Specification:
ꢀ
ꢀ
ꢀ
References:
Connector:
X19
Kycon ST-3000
Pinout: Refer to Table 9Table 14
Pin
Signal name
GND
Function
1
2
3
Ground
LINEIN_R
LINEIN_L
NF signal right (ring)
NF signal left (tip)
Table 14 Pinout LineIn
4.9.1.3 Stereo LineOut
Specification:
ꢀ
ꢀ
ꢀ
References:
Connector:
X20
Kycon ST-3000
Pinout: Refer to Table 10
Pin
Signal name
GND
Function
1
2
3
Ground
LINEOUT_R
LINEOUT_L
NF signal right (ring)
NF signal left (tip)
Table 15 Pinout LineOut
4.9.1.4 Stereo Headphone
Specification:
ꢀ
ꢀ
ꢀ
References:
Connector:
X21
Kycon ST-3000
Pinout: Refer to Table 11
Pin
Signal name
GND
Function
1
2
3
Ground
HPOUT_R
HPOUT_L
NF signal right (ring)
NF signal left (tip)
Table 16 Pinout Headphone
30
CX-MB-EVA2 User's Manual
Hardware
4.9.2
HDA codec
Specification:
ꢀ
ꢀ
ꢀ
References:
Connector:
X39
Foxconn JAS331-H1G2-4F
Pinout: Refer to Table 12
Con
colour
light blue
lime
Function
1
Line In
2
3
4
5
6
Line Out
Mikrofon
Center / LFE
Surround
Side
pink
orange
black
grey
Table 17 Pinout LineOut
4.10 IDE Interface
A standard IDE interface is provided according to ATA/ATAPI, with the controller
supporting at least Ultra-ATA100 with 100 MB/sec data rate. The transfer mode that can
be selected depends on the cable used and which modes are supported by the drives.
Using a ATA100 cable on X22, avoid a master slave combination with X23 or X24.
4.10.1 Primary IDE Channel
4.10.1.1.1
40-pin IDE interface
A 40-pin IDC connector is provided at the primary IDE channel for standard IDE drives.
Specification:
ꢀ
ꢀ
ꢀ
References:
Connector:
X22
FCI 75869-118
Pinout: Refer to Specification ATA/ATAPI-6 [6, page 400, Table A3]
4.10.1.1.2
44-pin IDE Interface
For connection of 2.5” hard disks, a 44-pin IDC connector is provided at the primary IDE
channel.
Specification:
ꢀ
ꢀ
ꢀ
References:
Connector:
X23
Yamaichi ZP7-44-S-G
Pinout: Refer to Specification ATA/ATAPI-6 [6, page 412, Table A16]
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Hardware
4.10.1.1.3
Compact Flash Interface
A socket for compact flash cards, type I/II, is provided at the primary IDE channel.
The compact flash interface supports True IDE mode according to compact flash
specification rev. 3.0.
Inter alia the compact flash specification rev. 3.0 supports the UDMA mode.
Specification:
ꢀ
ꢀ
ꢀ
References:
Connector:
X24
Yamaichi CF050P2-003-10-D2
Pinout: Refer to specification "CF+ & CF specification rev. 3.0"
[7, page 24, table 4]
4.11 SATA-Interface
Up to four SATA drives can be connected to the SATA interfaces.
Note : Depending on the COM Express module used, not all SATA ports are available.
Every SATA signal connector has its own power supply connector.
SATA Channel
SATA 0
References
X25
SATA 1
X26
SATA 2
X27
SATA 3 X28
Table 18 Assignment SATA Channel to Connector Reference
Specification SATA signal connector:
ꢀ
ꢀ
ꢀ
References:
Connector:
X25 - X28
Molex 87713 series
Pinout: Refer to Specification SATA
[8, page 46, table 3]
Specification Power Supply:
ꢀ
ꢀ
ꢀ
References:
Connector:
X49 - X52
AMP 171825-4
Pinout: Refer to ATX specification V2.2
[2, "Floppy Drive Power Connector"]
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Hardware
4.12 USB Topology
Eight USB ports are provided by the COM Express module.
The exact assignment of each port is defined in the following table:
USB-Port
USB0
USB1
USB2
USB3
USB4
USB5
USB6
USB7
References
X29
Beschreibung
External dual connector 1
External dual connector 1
External dual connector 2
External dual connector 2
External dual connector 3
External dual connector 3
External dual connector 4
External dual connector 4
X29
X30
X30
X31
X31
X32
X32
Table 19 Assignment USB Ports
4.12.1 USB Power Supply
The power supplies are protected by USB power switches. In addition the input voltages
of the USB power switches are protected by resettable fuses.
The USB power switches have the following functions:
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
The output current is limited to 500mA per port
A signal to detect overcurrent is generated for each two ports
USB0 and USB1 have one common signal to detect overcurrent
USB2 and USB3 have one common signal to detect overcurrent
USB4 and USB5 have one common signal to detect overcurrent
USB6 and USB7 have one common signal to detect overcurrent
Specification:
ꢀ
ꢀ
ꢀ
References:
Connector:
X29 - X32
AMP 787617-2 (Dual USB connector type A)
Pinout: according to USB specification 2.0
[10]
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Hardware
4.13 Ethernet
The base board can be connected to a local area network with an Ethernet interface.
The COM Express module already provides MDI signals, so that only the transformer on
the base board required.
The transformer PULSE H 5004 not only supports 10BaseT and 100BaseTX but also
1Gbit.
Specification:
ꢀ
ꢀ
ꢀ
References:
Connector:
X33
AMP 2-406549
Pinout: Refer to IEEE Std. 802.3
[9, section three, page 225]
4.14 LPC Slot
An LPC slot is available for insertion of LPC expansion boards.
Specification:
ꢀ
ꢀ
ꢀ
References:
Connector:
X34
36-pin header, 2.54mm
Pinout: Refer to Table 15
Pin
Signal
VCC5V
NC
Pin
2
Signal
1
VCC5V
3
4
VCC3V3
5
VCC3V3
VCC3V3_SBY
GND
6
NC
7
8
GND
9
10
12
14
16
18
20
22
24
26
28
30
32
34
36
LPC_RST#
LPC_LAD0
LPC_LAD2
LPC_FRAME#
LPC_DRQ0
LPC_CLK
LPC_PWRDWN
PME#
11
13
15
17
19
21
23
25
27
29
31
33
35
GND
LPC_LAD1
LPC_LAD3
GND
GND
GND
GND
GND
LPC_SMI#
SERIRQ
GND
GND
PCI_CLKRUN#
LPC_DRQ1#
CPU_RST#
GND
GND
GND
GND
Table 20 Pinout LPC-Slot
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4.15 I/O Connector
An alternative SuperIO controller can be integrated via a 36-pin connector. In this case
the onboard chip is not populated and a piggy back board with the SuperIO chip is
plugged into the I/O and into the LPC connector.
Specification:
ꢀ
ꢀ
ꢀ
References:
Connector:
X45
CAB 1002-161-036
Pinout: Refer to Table 16
Pin
Signal
Pin
2
Signal
1
SMB_CLK
SMB_DAT
KBDAT
SLP_S3#
3
4
SLP_S4#
5
6
SLP_S5#
7
KBCLK
8
EXT_THRM#
SMBALERT#
NC
9
MSDAT
10
12
14
16
18
20
22
24
26
28
30
32
34
36
11
13
15
17
19
21
23
25
27
29
31
33
35
MSCLK
NC
THRMTRIP#
BATLOW#
NC
NC
NC
NC
NC
COM1_DCD#
COM1_RXD
COM1_TXD
COM1_DTR#
COM1_DSR#
COM1_RTS#
COM1_CTS#
COM1_RI#
COM2_DCD#
COM2_RXD
COM2_TXD
COM2_DTR#
COM2_DSR#
COM2_RTS#
COM2_CTS#
COM2_RI#
Table 21 Pinout I/O-Connector
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Hardware
4.16 GPIO
The COM Express module provides four general purpose outputs and four general
purpose inputs.
The GPIs have PullUp resistors and are routed to a dip switch (SW1103). With the dip
switch the GPIs can be connected to ground. The assignment GPI – switch – level is
printed on the PCB.
If the PullUp resistors are not populated, you can switch LPC_SMI# or HWM_SMI# to
GPI0, GPI1, GPI2 or GPI3 with jumper JP1101.
The GPOs are connected to LEDs for optically status display.
Specification:
ꢀ
ꢀ
ꢀ
References:
Connector:
X35
CAB 1002-161-036
Pinout: Refer to Table 17
Pin
Signal
GPI0
Pin
2
Signal
GND
GND
GND
GND
GND
GND
GND
GND
1
3
GPI1
4
5
GPI2
6
7
GPI3
8
9
GPO0
GPO1
GPO2
GPO3
10
12
14
16
11
13
15
Table 22 Pinout GPIO connector
4.17 ATX Connector
An ATX connector with additional ATX12V connector is available to power the system.
Specification ATX connector:
ꢀ
ꢀ
ꢀ
References:
Connector:
X36
Molex 44206-0007
Pinout: Refer to ATX specification V2.2
[2]
Specification ATX12V connector:
ꢀ
ꢀ
ꢀ
References:
Connector:
X37
Molex 39-29-9042
Pinout: Refer to ATX specification V2.2
[2]
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Hardware
4.18 SuperIO
The Winbond SuperIO W83627THF is integrated on the base board.
Interfaces used by the SuperIO
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
2 RS232 interface (function of COM port shared with IrDA interface)
1 IrDA interface (function shared with COM port)
PS/2 interface for keyboard and mouse
2 fan interfaces
Voltage control
1 temperature control
4.18.1 COM Ports
Characteristics of the COM ports:
ꢀ
ꢀ
ꢀ
RS232 standard
RS232 transceiver ESD protected +/- 15kV
EMC improved by using EMI filters in the signal lines
Specification:
ꢀ
ꢀ
ꢀ
References:
Connector:
X38
Foxconn DM10151-P71
Pinout: Refer to Table 18
(COM1: lower Jack, COM2 upper Jack)
Pin
Signal name
DCD#
RXD
Function
1
2
3
4
5
6
7
8
9
Data Carrier Detect
Receive Data
TXD
Transmit Data
Data Terminal Ready
Ground
DTR#
GND
DSR#
RTS#
CTS#
RI#
Data Set Ready
Request To Send
Clear To Send
Ring Indicator
Table 23 Pinout COM Ports
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4.18.2 IrDA
The connectors of the IrDA interface are designed for commercial IrDA transmitters.
Specification:
ꢀ
ꢀ
ꢀ
References:
Connector:
X40
CAB 1001-161-005
Pinout: Refer to Table 19Table 24
Pin
Signal name
+5V
Function
1
2
3
4
5
Power supply
Not connected
Received data
Ground
NC
IRRX
GND
IRTX
Transmission data
Table 24 Pinout IrDA
4.18.3 PS/2
There is a dual PS/2 connector for PS/2 keyboards and PS/2 mice. The upper jack only
supports PS/2 mice. The pins of the lower jack provide both, signals for PS/2 keyboards
and for PS/2 mice. Keyboards can be connected directly, mice can only be operated
using an according Y-adapter.
Specification:
ꢀ
ꢀ
ꢀ
References:
Connector:
X41
Tyco 84376-1
Pinout: Refer to Tables 20 and 21
Pin
Signal name
MSDAT
NC
Function
1
2
3
4
5
6
Mouse Data
not connected
Ground
GND
+5V
VCC
MSCLK
NC
Mouse Clock
not connected
Table 25 Pinout Upper PS/2 Jack
Pin
1
Signal name
KBDAT
MSDAT
GND
Function
Keyboard Data
Mouse Data
Ground
2
3
4
+5V
VCC
5
KBCLK
MSCLK
Table 26 Pinout Lower PS/2 Jack
Keyboard Clock
Mouse Clock
6
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Hardware
4.18.4 Fan interface
Two PWM controlled fan interfaces are integrated on the base board. They are located
near the COM Express modul.
Measurement of the tacho signal and control of the rotation speed is done by the
SuperIO.
Specification:
ꢀ
ꢀ
References:
Connector:
X42 - X43
Molex 22-04-1031
Pinout: Refer to Table 27
Pin
1
Signal name
Function
GND
Ground
2
PWM
PWM signal
Tacho signal
3 TACHO
Table 27 Pinout Fan Interface
4.18.5 Intel Fan interface
A PWM controlled intel fan interface is shared with X43. Don't use both at the same time.
Measurement of the tacho signal and control of the rotation speed is done by the
SuperIO.
Specification:
ꢀ
ꢀ
ꢀ
References:
Connector:
X48
Molex 47053-1000
Pinout: Refer to Table 23
Pin
Signal name
GND
Function
Ground
1
2
3
4
+12V
VCC
TACHO
PWM
Tacho signal
PWM signal
Table 28 Pinout Fan Interface
4.18.6 SuperIO Hardware Monitor
You can check different voltages and temperatures using the hardware monitor that is
integrated in the SuperIO.
Monitored voltages
ꢀ
ꢀ
ꢀ
VBAT
3.3V
12V
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Hardware
ꢀ
5V
Measured temperatures
ꢀ
Ambient temperature
The temperature is measured with a thermistor.
4.19 SMB Hardware Monitor
In addition to the SuperIO hardware monitor you can also connect a SMBus hardware
monitor. This chip enables you to control different voltages, temperatures and rotation
speeds in legacy-free-designs where the SuperIO is not supported.
Hardware monitor:
ꢀ
Winbond W83L786R
Controlled voltages
ꢀ
ꢀ
ꢀ
ꢀ
VBAT
3.3V
12V
5V
Measured temperatures
ꢀ
Ambient temperature
The temperature is measured with a thermistor.
Fan interface
For evaluation and control of the revolution speeds please refer to chapter 4.18.4.
4.20 Serial EEPROM on SMBus
For testing purposes a serial EEPROM (4kBit) is connected to the SMBus. To avoid
address conflicts, the address can be selected with dip switch SW1101.
4.21 Serial EEPROM on I2C-Bus
For testing purposes a serial EEPROM (4kBit) is connected to the I2C bus. To avoid
address conflicts, the address can be selected with dip switch SW1102.
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Hardware
4.22 OnBoard BIOS-Flash
There is a PLCC32 socket on the mother board, where an additional firmware hub can
be inserted. To boot from this firmware hub, the firmware hub on the COM Express
module has to be disabled with J0203.
4.23 POST-Code Display
For debugging purposes a POST code display is implemented on the base board, thus
enabling the display of BIOS outputs on IO-port 80h and/or Port 90h.
In addition, these signals are output on a pin header. For protocolling purposes a logic
analyser can be connected here.
The pinout of the output connector X44 corresponds to the pinout of the Hewlett Packard
HP-PODs.
Specification:
ꢀ
ꢀ
References:
Connector:
X44
20-pin header 2.54mm
Pinout: Refer to Table 29
Pin
1
HP-POD
+5V
CLK1
D14
D12
D10
D8
Function
not used
not used
not used
Test signal 2
Test signal 0
Strobe
Pin
2
HP-POD
CLK2
D15
D13
D11
D9
Function
LPC_CLK
not used
Test signal 3
Test signal 1
not used
Data 7
3
4
5
6
7
8
9
10
12
14
16
18
20
11
13
15
17
19
D7
D6
Data 6
D5
Data 5
D4
Data 4
D3
Data 3
D2
Data 2
D1
Data 1
D0
Data 0
GND
Ground
Table 29 Pinout POST Display (HP-POD)
4.23.1 Lattice Programming Interface
A connector used to program the PLD to decode the POST codes is implemented. To
reprogram the PLD a Lattice programming adapter is required.
Specification:
ꢀ
ꢀ
ꢀ
References:
Connector:
X47
CAB 714-91-164-31-007 (socket)
Pinout: Refer to Table 30
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CX-MB-EVA2 User's Manual
Hardware
Pin
1
Signal name
VCC
Function
Power Supply
Serial Data Out
Serial Data In
Programming Enable
Keypin
2
SDO_TDO
SDI_TDI
ISPEN#
KEY
3
4
5
6
MODE_TMS
GND
Programming Mode
Ground
7
8
Table 30 Pinout Lattice Programming Interface
SCLK_TCK
Serial Clock
4.24 Battery
The RTC on the COM Express module is buffered with a socketed battery on the base
board.
In order to clear the CMOS memory, the battery voltage to the COM Express module
can be disconnected via jumper J1101.
Type of battery:
Battery socket:
2032
Renata SMTU2032-1
4.25 Beeper
A piezo signal generator is implemented for acoustic signals.
Type: Digisound F/DGX05P
4.26 Power Button
For switching the system on a Power push button has been implemented.
The PWR_BTN# signal is low-active and is connected directly to the corresponding pin
of the COM Express module.
Type:
C&K JTP-1230F
4.27 Reset Button
There is a push button for resetting the system.
The RESET# signal is low-active and is connected to the SYS_RESET#- pin of the COM
Express module.
Type:
C&K JTP-1230F
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Hardware
4.28 Miscellaneous
4.28.1 Resistors for current measuring
Resistors are inserted into the power supply lines of the COM Express module, the PCI
express graphics slot as well as into every PCI slot and one PCI express x1 slot. These
can be used for current measurement.
In addition to there is one jumper to measure the current using an external wire loop and
clamp meter.
4.28.2 Ground Pins
There are several ground pins spread over the base board for connection of
measurement equipment.
4.28.3 Sleep State LED Display
The MSC CX-MB EVA2 has 3 LEDs to display the SleepStates.
LED1201 displays status S3.
LED1202 displays status S4.
LED1203 displays status S5.
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Hardware
4.29 Jumper settings
4.29.1 BIOS-Flash Jumper J0203
To boot from the firmware hub in the PLCC32 socket on the mother board, install J0203.
The firmware hub on the COM Express module will be automatically disabled.
Function
COM Express module flash
Flash in PLCC32
J0203
removed (BIOS disable LED off)
installed (BIOS disable LED on)
4.29.2 PCI I/O voltage Jumper J0306
PCI VCCIO
+3,3 V
+5,0 V
Pins to close
2-3
1-2
If no Jumper is closed, the VCCIO plane is powered by 3V over a diode.
4.29.3 Backlight power Jumpers JP0601
Voltage
+12,0 V
+5,0 V
+3,3 V
Pins to close
5-6
3-4
1-2
4.29.4 Backlight polarity Jumper J5
Function
LVDS_BKLT_EN
LVDS_BKLT_EN#
Pins to close
2-3
1-2
4.29.5 AC'97 / HDA select Jumper J0701
Function
AC'97 codec
HDA codec
J0701
removed
installed
4.29.6 Compact Flash Master Jumper J0802
Function
Master
Slave
J0802
removed
installed
4.29.7 LAN speed mode Jumper J1003
Function
10 / 100 Mbit
Gigabit
J1003
all removed
1-2 and 3-4 installed
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Hardware
4.29.8 Battery Jumper J1101
Function
Battery on
J1101
installed
4.29.9 Super I/O disable Jumper J6
Function
Super I/O enabled
Super I/O disabled
J6
1-2
2-3
4.29.10 SMBus Hardware monitor address Jumper J1303
SMBus Address
0101 1110
0101 1100
J1303
removed
installed
4.29.11 ATX Funktion Jumper J1301
PS_ON# from
PM_SLPS3#
PM_SLPS4#
PM_SLPS5#
close
1-2
3-4
5-6
4.29.12 No ATX Jumper J1302
Function
no ATX
J1302
installed
4.29.13 GPI SMI Jumper JP1101
COMX_GPI
GPI0
GPI1
GPI2
GPI3
LPC_SMI#
1-2
4-5
7-8
HWM_SMI#
2-3
5-6
8-9
11-12
10-11
4.29.14 GPI GPO Jumper X35
COMX_GPIO
GPI0
GPI1
GPI2
GPI3
GND
1-2
3-4
5-6
7-8
GPO0
GPO1
GPO2
GPO3
9-10
11-12
13-14
15-16
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4.29.15 Lane RV Jumper J0504
Function
PEG Lane reverse
J0504
installed
DIP-switch settings
4.29.16 LCD EEPROM SW0611
Switch on
Address
1
2
3
4
A0 high
A1 high
A2 high
-
4.29.17 SMB EEPROM SW1101
Switch on
Address
A0 high
A1 high
A2 high
-
1
2
3
4
Do not use address A0 and A4. There can be an address conflict with spd on the
memory slot.
4.29.18 I²C EEPROM SW1102
Switch on
Address
A0 high
A1 high
A2 high
-
1
2
3
4
4.29.19 GPI-switch SW1103
COMX_GPO
GPI0
GPI1
GPI2
GPI3
GND
1
2
3
4
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