Fairchild SEMICONDUCTOR RC5050 User Manual

Application Note 50  
Implementing the RC5050 and RC5051 DC-DC  
®
Converters on Pentium Pro Motherboards  
Introduction  
Intel Pentium Pro Processor Power  
Requirements  
This document describes how to implement a switching volt-  
age regulator using an RC5050 or an RC5051 high speed  
controller, a power inductor, a Schottky diode, appropriate  
capacitors, and external power MOSFETs. This regulator  
forms a step down DC-DC converter that can deliver up to  
14.5A of continuous load current at voltages ranging from  
1.3V to 3.5V. A specific application circuit, design consider-  
ations, component selection, PCB layout guidelines, and per-  
formance evaluations are covered in detail.  
®
Refer to Intel’s AP-523 Application Note, Pentium Pro  
Processor Power Distribution Guidelines, November 1995  
(order number 242764-001), as a basic reference. The speci-  
fications contained in this document have been modified  
slightly from the original Intel document to include updated  
specifications for more recent processors. Please contact  
Intel Corporation for specific details.  
Input Voltages  
In the past 10 years, microprocessors have evolved at such an  
exponential rate that a modern chip can rival the computing  
power of a mainframe computer. Such evolution has been  
possible because of the increasing numbers of transistors that  
processors integrate. Pentium CPUs, for example, integrate  
well over 5 million transistors on a single piece of silicon.  
Available inputs are +12V ±5% and +5V ±5%. Either one or  
both of these inputs can be used by the DC-DC converter.  
The input voltage requirements for Raytheon’s RC5050  
and RC5051 DC-DC converters are listed in Table 1.  
Table 1. Input Voltage Requirements  
To integrate so many transistors on a piece of silicon, their  
physical geometry has been reduced to the sub-micron level.  
As a result of each geometry reduction, the corresponding  
operational voltage for each transistor has also been reduced.  
The changing CPU voltage demands the design of a pro-  
grammable power supply—a design that is not completely  
re-engineered with every change in CPU voltage.  
MOSFET  
Drain  
MOSFET  
Gate Bias  
Part #  
Vcc for IC  
RC5050  
RC5051  
+5V ±5%  
+5V ±5%  
12V ±5% or  
+5V ±5%  
Pentium Pro DC Power Requirements  
®
Refer to Table 2, Intel Pentium Pro and OverDrive Proces-  
sor Power Specifications. For a motherboard designs without  
a standard VRM (Voltage Regulator Module) socket, the  
on-board DC-DC converter must supply a minimum of  
13.9A of current @2.5V and 12.4A of current @3.3V. For a  
Flexible Motherboard design, the on-board DC-DC con-  
The voltage range of the CPU has shown a downwards trend  
for the past 5 years: from 3.3V for the Pentium, to 3.1V for  
the Pentium Pro, and to 1.8V for future processors. With this  
trend in mind, Raytheon Electronics has designed the  
RC5050 and RC5051 controllers. These controllers integrate  
the necessary programmability to address the changing  
power supply requirements of lower voltage CPUs.  
verter must supply 14.5A maximum I P.  
CC  
DC Voltage Regulation  
Previous generations of DC-DC converter controllers were  
designed with fixed output voltages adjustable only with a  
set of external resistors. In a high volume production envi-  
ronment (such as with personal computers), however, a CPU  
voltage change requires a CPU board re-design to accommo-  
date the new voltage requirement. The 5-bit DAC in the  
RC5050 and the RC5051 reads the voltage ID code that is  
programmed into modern processors and provides the appro-  
priate CPU voltage. In this manner, the PC board does not  
have to be re-designed each time the CPU voltage changes.  
The CPU can thus automatically configure its own required  
supply voltage.  
As indicated in Table 2, the voltage level supplied to the  
CPU must be within ±5% of its nominal setting. Voltage reg-  
ulation limits must include:  
• Output load ranges specified in Table 2  
• Output ripple/noise  
• DC output initial voltage set point  
• Temperature and warm up drift (Ambient +10°C to +50°C  
at full load with a maximum rate of change of 5°C per 10  
minutes minimum but no more than 10°C per hour)  
• Output load transient with:  
Slew rate >30A/µs at converter pins  
Range: 0.3A - I P Max (as defined in Table 2).  
CC  
Rev. 1.1.0  
APPLICATION NOTE  
AN50  
I/O Controls  
The RC5050 and RC5051 Controllers  
In addition to the Voltage Identification, there are several sig-  
nals that control the DC-DC converter or provide feedback  
from the DC-DC converter to the CPU. They are Power-  
Good (PWRGD), Output Enable (OUTEN), and Upgrade  
Present (UP#). These signals will be discussed later.  
The RC5050 is a programmable non-synchronous DC-DC  
controller IC. The RC5051 is a synchronous version of the  
RC5050. When designed around the appropriate external  
components, either of these devices can be configured to  
deliver more than 14.5A of output current. The RC5050 and  
RC5051 utilize both current-mode and voltage-mode PWM  
control to create an integrated step-down voltage regulator.  
The key differences between the RC5050 and RC5051 are  
listed in Table 4.  
RC5050 and RC5051 Description  
Simple Step-Down Converter  
Table 4. RC5050 and RC5051 Differences  
S1  
L1  
+
RL Vout  
RC5051  
RC5050  
Operation  
Package  
Synchronous Non-Synchronous  
VIN  
D1  
C1  
20-SOIC  
Yes  
20-SOIC  
Yes  
Output Enable/  
Disable  
65-5050-06  
Figure 1. Simple Buck DC-DC Converter  
Main Control Loop  
Refer to the RC5051 Block Diagram illustrated in Figure 2.  
The control loop of the regulator contains two main sections;  
the analog control block and the digital control block. The  
analog section consists of signal conditioning amplifiers  
feeding into a set of comparators which provide the inputs to  
the digital control block. The signal conditioning section  
accepts inputs from the IFB (current feedback) and VFB  
(voltage feedback) pins and sets up two controlling signal  
paths. The voltage control path amplifies the VFB signal and  
presents the output to one of the summing amplifier inputs.  
The current control path takes the difference between the  
IFB and VFB pins and presents the resulting signal to  
another input of the summing amplifier. These two signals  
are then summed together with the slope compensation input  
from the oscillator. This output is then presented to a  
comparator, which provides the main PWM control signal to  
the digital control block.  
Figure 1 illustrates a step-down DC-DC converter with no  
feedback control. The derivation of the basic step-down con-  
verter is the basis for the design equations for the RC5050  
and RC5051. Referring to Figure 1, the basic operation  
begins by closing the switch S1. When S1 is closed, the input  
voltage V is impressed across inductor L1. The current  
IN  
flowing in this inductor is given by the following equation:  
(VIN – VOUT)TON  
IL = ----------------------------------------------  
L1  
where T is the duty cycle (the time when S1 is closed).  
ON  
When S1 opens, the diode D1 conducts the inductor  
current and the output current is delivered to the load accord-  
ing to the following equation:  
VOUT(TS – TON  
IL = -------------------------------------------  
L1  
)
The additional comparators in the analog control section set  
the point at which the current limit comparator disables the  
output drive signals to the external power MOSFETs.  
whereT is the overall switching period and (T - T ) is the  
time during which S1 is open.  
S
S
ON  
The digital control block takes the comparator inputs and the  
main clock signal from the oscillator to provide the appropri-  
ate pulses to the HIDRV and LODRV output pins. These  
pins control the external power MOSFETs. The digital sec-  
tion utilizes high speed Schottky transistor logic, allowing  
the RC5050 and the RC5051 to operate at clock speeds as  
high as 1MHz.  
By solving these two equations, we can arrive at the basic  
relationship for the output voltage of a step-down converter:  
TON  
----------  
VOUT = VIN  
TS  
In order to obtain a more accurate approximation for V  
,
OUT  
we must also include the forward voltage V across diode  
D
D1 and the switching loss, V . After taking into account  
these factors, the new relationship becomes:  
SW  
High Current Output Drivers  
The RC5051 contains two identical high current output  
drivers that utilize high speed bipolar transistors in a  
push-pull configuration. Each driver is capable of  
delivering 1A of current in less than 100ns. Each driver’s  
power and ground are separated from the chip’s power and  
ground for additional switching noise immunity.  
TON  
----------  
– VD  
VOUT = (VIN + VD – VSW  
)
TS  
where V  
= MOSFET switching loss  
SW  
= I • R  
L
DS,ON  
3
AN50  
APPLICATION NOTE  
+12V  
RC5051  
+5V  
OSC  
+
+
+
DIGITAL  
CONTROL  
VO  
+
1.24v  
REFERENCE  
5-BIT  
DAC  
VREF  
POWER  
GOOD  
PWRGD  
65-5051-01  
VID0 VID2 RSEL  
VID1 VID3  
Figure 2. RC5051 Block Diagram  
The HIDRV driver has a power supply, VCCQP, supplied  
from a 12V source as illustrated in Figure 2. The resulting  
voltage is sufficient to provide the gate to source voltage to  
the external MOSFET that is required to achieve a low  
age and outputs an active-low interrupt signal to the CPU  
when the power supply voltage exceeds ±12% of nominal.  
The Power Good flag provides no other control function to  
the RC5050 or the RC5051.  
R
. Since the low side synchronous FET is referenced  
DS,ON  
to ground, there is no need to boost the gate drive voltage,  
and its VCCP power pin can be tied to VCC.  
Output Enable (OUTEN)  
The DC-DC converter accepts an open collector signal for  
controlling the output voltage. The low state disables the out-  
put voltage. When disabled, the PWRGD output is in the low  
state.  
Internal Voltage Reference  
The reference included in the RC5050 and RC5051 is a pre-  
cision band-gap voltage reference. The internal resistors are  
precisely trimmed to provide a near zero temperature coeffi-  
cient (TC). Added to the reference input is the resulting out-  
put from an integrated 5-bit DAC—provided in accordance  
to the Pentium Pro specification guidelines. These guidelines  
require the DC-DC converter output to be directly program-  
mable via a 4-bit voltage identification (VID) code. This  
code scales the reference voltage from 2.0V (no CPU) to  
3.5V in 100mV increments. To target future generations of  
low-voltage processors, the RC5050 and RC5051 incorpo-  
rate a VID4 pin to allow additional programmability between  
1.3V and 2.05V. For guaranteed stable operation under all  
operating conditions, a 0.1µF of decoupling capacitance  
should be connected to the VREF pin. No load should be  
imposed on this pin.  
Upgrade Present (UP#)  
Intel specifications state that the DC-DC converter should  
accept an open collector signal, used to indicate the presence  
of an upgrade processor. The typical state is high (that is, a  
standard processor is in the system). When in the low or  
ground state (an OverDrive processor is present), the output  
voltage must be disabled unless the converter can supply the  
requirements of the OverDrive processor. When disabled, the  
PWRGD output must be in the low state. Because the  
RC5050 and RC5051 can supply the requirements of the  
OverDrive processor, the #UP signal is not required.  
Over-Voltage Protection  
The RC5050 and RC5051 constantly monitor the output  
voltage for protection against over voltage conditions. If the  
voltage at the VFB pin exceeds 20% of the selected program  
voltage, an over-voltage condition is assumed and the chip  
disables the output drive signal to the external MOSFET(s).  
Power Good (PWRGD)  
The RC5050 and RC5051 Power Good function is designed  
in accordance with the Pentium Pro DC-DC converter speci-  
fication to provide a constant voltage monitor on the VFB  
pin. The circuit compares the VFB signal to the VREF volt-  
4
APPLICATION NOTE  
AN50  
In general, a lower operating frequency decreases the peak  
Short Circuit Protection  
ripple current flowing in the output inductor, thus allowing  
the use of a smaller inductor value. Unfortunately, operation  
at lower frequencies increases the amount of energy storage  
that must be provided by the bulk output capacitors during  
load transients due to slower loop response of the controller.  
A current sense methodology is implemented to disable the  
output drive signal to the MOSFET(s) when an over-current  
condition is detected. The voltage drop created by the output  
current flowing across a sense resistor is presented to an  
internal comparator. When the voltage developed across the  
sense resistor exceeds the comparator threshold voltage, the  
chip reduces the output drive signal to the MOSFET(s).  
In addition, the efficiency losses due to switching of the  
MOSFETs increase as the operating frequency is increased.  
Thus, efficiency is optimized at lower operating frequencies.  
An operating frequency of 300 kHz was chosen to optimize  
efficiency while maintaining excellent regulation and tran-  
sient performance under all operating conditions.  
The DC-DC converter returns to normal operation after the  
fault has been removed, for either an over-voltage or a short  
circuit condition.  
Oscillator  
Design Considerations and  
Component Selection  
Figure 3 shows a typical non-synchronous application using  
the RC5050. Figure 4 illustrates the synchronous applica-  
tion using the RC5051.  
The RC5050 and RC5051 oscillator section uses a fixed cur-  
rent capacitor charging configuration. An external capacitor  
(C  
) is used to preset the oscillator frequency between  
EXT  
200KHz and 1MHz. This scheme allows maximum flexibil-  
ity in setting the switching frequency and in choosing exter-  
nal components.  
+12V  
L2  
+5V  
2.5µH  
C5  
C4  
C3  
C1  
C2  
R5  
47  
0.1µF  
0.1µF  
1000 µF 1000 µF  
1000 µF  
D1  
C9  
C8  
1N4691  
0.1µF  
0.1µF  
M1  
M2  
C12  
IRF7413  
11  
12  
13  
14  
15  
10  
1µF  
9
8
7
6
5
IRF7413  
RSENSE  
L1  
VO  
1.3µ H  
6mΩ  
C6  
RC5050  
4.7µF  
16  
17  
18  
19  
20  
VREF  
GND  
DS1  
4
3
2
1
MBR2015CTL  
C7  
0.1µF  
CEXT  
100pF  
VID4  
VID3  
VCC  
R6  
10K  
VID2  
VID1  
VID0  
PWRGD  
C11  
0.1µF  
ENABLE  
C10  
0.1µF  
Figure 3. Non-Synchronous DC-DC Converter Application Schematic Using the RC5050  
5
AN50  
APPLICATION NOTE  
+12V  
+5V  
L2  
2.5µH  
C5  
C4  
C3  
C1  
C2  
R5  
47  
0.1µF  
0.1µF  
1000 µF 1000 µF  
1000 µF  
D1  
C9  
C8  
1N4691  
0.1µF  
0.1µF  
M1  
M2  
C12  
IRF7413  
11  
12  
13  
14  
15  
10  
1µF  
9
8
7
6
5
RSENSE  
IRF7413  
L1  
C6  
4.7  
VO  
1.3µ H  
6mΩ  
F
µ
RC5051  
16  
17  
18  
19  
20  
VREF  
DS1  
1N5817  
4
3
2
1
C7  
M3  
M4  
IRF7413  
0.1µF  
IRF7413  
GND  
CEXT  
100pF  
VID4  
VID3  
VCC  
R6  
10K  
VID2  
VID1  
VID0  
PWRGD  
C11  
0.1µF  
ENABLE  
C10  
0.1µF  
Figure 4. Synchronous DC-DC Converter Application Schematic Using the RC5051  
6
APPLICATION NOTE  
AN50  
• Power package with low Thermal Resistance  
• Drain current rating of 20A minimum  
• Drain-Source voltage > 15V.  
MOSFET Selection Cosiderations  
MOSFET Selection  
This application requires N-channel Logic Level Enhance-  
ment Mode Field Effect Transistors. Desired characteristics  
are as follows:  
The on-resistance (R  
) is the primary parameter for  
DS,ON  
MOSFET selection. It determines the power dissipation  
within the MOSFET and, therefore, significantly affects the  
efficiency of the DC-DC converter. Table 5 is a selection  
table for MOSFETs.  
• Low Static Drain-Source On-Resistance,  
R
< 37 m(lower is better)  
DS,ON  
• Low gate drive voltage, V 4.5V  
GS  
Table 3. MOSFET Selection Table  
Manufacturer & Model #  
R
(m)  
DS,ON  
Thermal  
P ackage Resistance  
1
Conditions  
Typ.  
25  
Max.  
Fuji  
V
V
V
= 4V, I = 17.5A T = 25°C  
37  
20  
34  
15  
TO-220  
Φ
Φ
= 75  
= 50  
GS  
GS  
GS  
D
J
JA  
JA  
2SK1388  
T = 125°C  
37  
J
Siliconix  
SI4410DY  
= 4.5V, I = 5A T = 25°C  
16.5  
28  
SO-8  
(SMD)  
D
J
T = 125°C  
J
National Semiconductor  
NDP706AL  
= 5V, I = 40A T = 25°C  
13  
TO-220  
Φ
Φ
= 62.5  
= 1.5  
D
J
JA  
JC  
NDP706AEL  
National Semiconductor  
NDP603AL  
T = 125°C  
20  
31  
42  
22  
33  
6
24  
40  
54  
25  
40  
9
J
V
V
V
V
V
V
= 4.5V, I = 10A T = 25°C  
TO-220  
TO-220  
TO-263  
Φ
Φ
Φ
Φ
Φ
Φ
Φ
Φ
Φ
Φ
Φ
= 62.5  
= 2.5  
GS  
GS  
GS  
GS  
GS  
GS  
D
J
JA  
JC  
JA  
JC  
JA  
JC  
JA  
JC  
JA  
JC  
JA  
T = 125°C  
J
National Semiconductor  
NDP606AL  
= 5V, I = 24A T = 25°C  
= 62.5  
= 1.5  
D
J
T = 125°C  
J
Motorola  
= 5V, I = 37.5A T = 25°C  
= 62.5  
= 1.0  
D
J
2
MTB75N03HDL  
Int. Rectifier  
IRLZ44  
T = 125°C  
9.3  
14  
28  
46  
19  
31  
18  
(D PAK)  
J
= 5V, I = 31A T = 25°C  
TO-220  
TO-220  
= 62.5  
= 1.0  
D
J
T = 125°C  
J
Int. Rectifier  
IRL3103S  
= 4.5V, I = 28A T = 25°C  
= 62.5  
= 1.0  
D
J
T = 125°C  
J
Intl Rectifier  
IRF7413  
= 4.5V,  
T = 25°C  
SO-8  
SMD  
= 50  
A
I = 3.7A  
D
Note:  
1. R  
values at Tj = 125°C for most devices were extrapolated from the typical operating curves supplied by the  
DS,ON  
manufacturers and are approximations only.  
7
AN50  
APPLICATION NOTE  
Two MOSFETs in parallel.  
+5V  
We recommend two MOSFETs used in parallel instead of  
one single MOSFET. The following significant advantages  
are realized using two MOSFETs in parallel:  
DS2  
VCCQP  
HIDRV  
M1  
Significant reduction of Power dissipation.  
Maximum current of 14A with one MOSFET:  
L1  
RS  
CP  
VO  
PWM/PFM  
Control  
2
P
= (I R  
)(Duty Cycle) =  
MOSFET  
2
DS,ON  
CB  
DS1  
(14) (0.050*)(3.3+0.4)/(5+0.4-0.35) = 7.2 W  
With two MOSFETs in parallel:  
65-AP50-01  
2
P
= (I R  
)(Duty Cycle) =  
MOSFET  
2
DS,ON  
Figure 5. Charge Pump Configuration  
• Method 2. 12V Gate Bias.  
(14/2) (0.037*)(3.3+0.4)/(5+0.4-0.35) = 1.3W/FET  
* Note: R  
increases with temperature. Assume R  
= 25mat  
DS,ON  
DS,ON  
DS,ON  
Figure 6 illustrates how a 12V source can be used to bias  
the VCCQP. A 47 resistor is used to limit the transient  
current into the VCCQP pin and a 1µF capacitor filter is  
used to filter the VCCQP supply. This method provides a  
25°C. R  
can easily increase to 50mat high temperature when  
using a single MOSFET. When using two MOSFETs in parallel, the  
temperature effects should not cause the R  
listed maximum value of 37m.  
to rise above the  
DS,ON  
• Less heat sink required.  
higher gate bias voltage (V ) to the MOSFET, and there-  
GS  
With power dissipation down to around one watt and with  
MOSFETs mounted flat on the motherboard, considerable  
less heat sink is required. The junction-to-case thermal  
resistance for the MOSFET package (TO-220) is typically  
at 2°C/W and the motherboard serves as an excellent heat  
sink.  
fore reduces the R  
of the MOSFET and reduces the  
DS,ON  
power loss due to the MOSFET. Figure 7 shows how  
reduces dramatically with V increases. A 6.2V  
R
DS,ON  
GS  
Zener diode (D1) is placed to clamp the voltage at VCCQP  
to a maximum of 12V and ensure that the absolute maxi-  
mum voltage of the IC will not be exceeded  
• Higher current capability.  
+5V  
With thermal management under control, this on-board  
DC-DC converter is able to deliver load currents up to  
14.5A with no performance or reliability concerns.  
47  
+12V  
D1  
6.2V  
MOSFET Gate Bias  
VCCQP  
M1  
MOSFET can be biased by one of two methods: Charge  
Pump and 12V Gate Bias.  
HIDRV  
L1  
RS  
1µF  
VO  
PWM/PFM  
Control  
• Method 1. Charge pump (or Boostrap) method.  
Figure 5 employs a charge pump to provide gate bias.  
Capacitor CP is the charge pump deployed to boost the  
voltage of the RC5050 output driver. When the MOSFET  
switches off, the source of the MOSFET is at -0.6V.  
VCCQP is charged through the Schottky diode to 4.5V.  
Thus, the capacitor CP is charged to 5V. When the MOS-  
FET turns on, the source of the MOSFET voltage is equal  
to 5V. The capacitor voltage follows, and hence provides a  
voltage at VCCQP equal to 10V. The Schottky diode is  
required to provide the charge path when the MOSFET is  
off, and reverses bias when the VCCQP goes to 10V. The  
charge pump capacitor, CP, needs to be a high Q, high fre-  
quency capacitor. A 1µF ceramic capacitor capacitor is  
recommended here.  
CB  
DS1  
65-AP50-02  
Figure 6. 12V Gate Bias Configuration  
0.1  
0.09  
0.08  
0.07  
0.06  
0.05  
0.04  
0.03  
0.02  
0.01  
0
R(DS)Fuji  
R(DS)7060  
R(DS)706A  
R(DS)-706AEL  
1.5 2 2.5 3 3.5 4  
5
6
7
8
9
10 11  
Gate-Source Voltage, V (V)  
GS  
Figure 7. R  
vs. V for Selected MOSFETs  
GS  
DS,ON  
8
APPLICATION NOTE  
AN50  
Converter Efficiency  
Losses due to parasitic resistance in the switches, coil, and  
sense resistor dominate at high load-current level. The major  
loss mechanisms under heavy loads, in usual order of impor-  
tance, are:  
• gate-charge losses  
• diode-conduction losses  
• transition losses  
• Input Capacitor losses  
• losses due to the operating supply current of the IC.  
2
• MOSFET I R Losses  
• Coil Losses  
• Sense Resistor Losses  
Calculation of Converter Efficiency Under Heavy Loads  
POUT IOUT × VOUT  
Efficiency = ------------- = -------------------------------------------------------  
pIN IOUT × VOUT + PLOSS  
PLOSS = PDMOSFET + PDCOIL + PDSENSER + PDGATE + PDDIODE + PDTRAN + PDCAP + PDIC  
V
OUT + VD  
where PDMOSFET = IOUT2 × RDS,ON × DutyCycle , where DutyCycle = -----------------------------------------  
V
IN + VD – VSW  
PDCOIL = IOUT2 × RCOIL  
PDSENSER = IOUT2 × RSENSE  
PDGATE = qGATE × f × 5V , where q  
is the gate charge and f is the switching frequency  
GATE  
PDDIODE = Vf × ID(1 – Dutycycle)  
VIN2 × CRSS × ILOAD × f  
PDTRAN = ------------------------------------------------------------- , where C  
IDRIVE  
is the reverse transfer capacitance of the high-side MOSFET.  
RSS  
PDCAP = IRMS2 × ESR  
PDIC = VCC × ICC  
Example  
3.3 + 0.5  
DutyCycle = ----------------------------- = 0.73  
5 + 0.5 – 0.3  
PDMOSFET = 102 × 0.030 × 0.73 = 2.19W  
PDCOIL = 102 × 0.010 = 1W  
PDSENSER = 102 × 0.0065 = 0.65W  
PDGATE = CV × f × 5V = 1.75nf × (9 – 1)V × 285Khz × 5V = 0.019W  
PDDIODE = 0.5 × 10(1 – 0.73) = 1.35W  
52 × 400pf × 10 × 285khz  
----------------------------------------------------------------  
0.010W  
PDTRAN  
=
0.7A  
PDCAP = (7.5 – 2.5)2 × 0.015 = 0.37W  
PDIC = 0.2W  
PDLOSS = 2.19W + 1.0W + 0.65W + 0.019W + 1.35W + 0.010W + 0.37W + 0.2W = 5.789W  
3.3 × 10  
---------------------------------------  
Efficiency =  
85%  
3.3 × 10 + 5.815  
9
AN50  
APPLICATION NOTE  
When designing the external current sense circuitry, pay  
careful attention to the output limitations during normal  
operation and during a fault condition. If the short circuit  
protection threshold current is set too low, the DC-DC con-  
verter may not be able to continuously deliver the maximum  
CPU load current. If the threshold level is too high, the out-  
put driver may not be disabled at a safe limit and the result-  
ing power dissipation within the MOSFET(s) may rise to  
destructive levels.  
Selecting the Inductor  
The inductor is one of the most critical components to be  
selected for a DC-DC converter application. The critical  
parameters are inductance (L), maximum DC current (I ),  
O
and DC coil resistance (R ). The inductor core material is a  
l
crucial factor in determining the amount of current the  
inductor is able to withstand. As with all engineering  
designs, tradeoffs exist between various types of core materi-  
als. In general, Ferrites are popular due to low cost, low EMI  
properties, and high frequency (>500KHz) characteristics.  
Molypermalloy powder (MPP) materials exhibit good satu-  
ration characteristics, low EMI, and low hysteresis losses,  
but tend to be expensive and more effectively utilized at  
operating frequencies below 400KHz. Another critical  
parameter is the DC winding resistance of the inductor. This  
value should typically be reduced as much as possible, as the  
The following is the design equation used to set the short cir-  
cuit threshold limit:  
Vth  
-------  
, where: ISC = Output short circuit current  
RSENSE  
=
ISC  
(Ipk – Imin  
)
ISC Iinductor = ILoad, max + ---------------------------  
power loss in the DC resistance degrades the efficiency of  
the converter by the relationship: P = I x R . The value  
of the inductor is a function of the oscillator duty cycle  
2
2
loss  
O
l
Where I and I are peak ripple current and  
pk  
min  
I
= maximum output load current.  
load, max  
(T ) and the maximum inductor current (I ). I can be  
ON  
PK PK  
calculated from the relationship:  
You must also take into account the current (I -I ), or the  
pk min  
ripple current flowing through the inductor under normal  
operation. Figure 8 illustrates the inductor current waveform  
for the RC5050 DC-DC converter at maximum load.  
VIN – VSW – VD  
-----------------------------------------  
TON  
IPK = IMIN  
+
L
Where T is the maximum duty cycle and V is the  
forward voltage of diode DS1.  
ON  
D
Ipk  
I
(I -I )/2  
pk min  
Then the inductor value can be calculated using the  
relationship:  
ILOAD, MAX  
t
Imin  
VIN – VSW – VO  
-----------------------------------------  
L =  
TON  
I
PK – IMIN  
TON  
TOFF  
T=1/f s  
Where V (R  
x I ) is the drain-to-source voltage of  
SW  
DS,ON  
O
M1 when it is switched on.  
Figure 8. Typical DC-DC Converter  
Inductor Current Waveform  
Implementing Short Circuit Protection  
The calculation of this ripple current is as follows:  
Intel currently requires all power supply manufacturers to  
provide continuous protection against short circuit condi-  
tions that may damage the CPU. To address this requirement,  
Raytheon Electronics has implemented a current sense meth-  
odology to limit the power delivered to the load in the event  
of overcurrent. The voltage drop created by the output cur-  
rent across a sense resistor is presented to one terminal of an  
internal comparator with hysterisis. The other comparator  
terminal has the threshold voltage, nominally of 120mV.  
Table 6 states the limits for the comparator threshold of the  
Switching Regulator.  
(VIN – VSW – VOUT  
)
(VOUT + VD)  
(VIN – VSW + VD)  
(Ipk – Imin  
)
----------------------------------------------------- ----------------------------------------------  
--------------------------- =  
2
×
T
L
where:  
V
V
= input voltage to converter,  
= voltage across switcher MOSFET = I  
V = Forward Voltage of the Schottky diode,  
T = the switching period of the converter = 1/f , and  
IN  
x R  
,
SW  
LOAD  
DS,ON  
D
S
f = switching frequency.  
S
For an input voltage of 5V, output voltage of 3.3V, L equals  
Table 6. RC5050 Short Circuit Comparator  
Threshold Voltage  
1.3µH and a switching frequency of 285KHz (using  
C
= 100pF), the inductor current can be calculated at  
EXT  
approximately 1A:  
Short Circuit Comparator  
(Ipk – Imin  
)
V
(mV)  
(5.0 – 14.5 × 0.037 – 3.3)  
threshold  
-------------------------------------------------------------  
--------------------------- =  
×
1.3 × 10–6  
2
Typical  
120  
(3.3 + 0.5)  
1
Minimum  
Maximum  
100  
--------------------------------------------------------- -----------------------  
×
= 2A  
285 × 103  
5.0 – 14.5 × 0.037 + 0.5  
140  
10  
APPLICATION NOTE  
AN50  
Therefore, for load current of 14.5A, the peak current  
The next step is to determine the value of the sense resistor.  
through the inductor, I , is found to be approximately  
15.5A:  
Including sense resistor tolerance, the sense resistor value  
can be approximated as follows  
pk  
Vth,min  
Vth,min  
(IPK – Imin  
)
----------------  
ISC  
----------------------------------  
1.0 + ILoad,max  
RSENSE  
=
× (1 – TF) =  
× (1 – TF)  
ISC Iinductor = ILoad, max + ----------------------------- = 14.5 + 2 = 16.5A  
2
Where TF = Tolerance Factor for the sense resistor.  
Therefore, the short circuit detection threshold must be at  
least 16.5A.  
Table 7 describes tolerance, size, power capability, tempera-  
ture coefficient and cost of various type of sense resistors.  
Table 7. Comparison of Sense Resistors  
Discrete Iron  
Discrete Metal  
Strip Surface  
Mount Resistor  
(Dale)  
Discrete  
CuNi Alloy  
Wire Resistor  
(Copel)  
Discrete MnCu  
Alloy Wire  
Resistor  
Motherboard  
Alloy  
Description  
Trace Resistor  
Resistor (IRC)  
Tolerance  
Factor (TF)  
±29%  
±5%  
(±1% available)  
±1%  
±10%  
±10%  
Size  
(L x W x H)  
2" x 0.2" x 0.001" 0.45" x 0.065" x 0.25" x 0.125" x 0.200" x 0.04" x  
0.200" x 0.04" x  
0.100"  
(1 oz Cu trace)  
0.200"  
0.025"  
0.160"  
Power capability  
>50A/in  
1 watt  
1 watt  
1 watt  
1 watt  
(3W and 5W  
available)  
Temperature  
Coefficient  
+4,000 ppm  
+30 ppm  
±75 ppm  
±30 ppm  
±20 ppm  
Cost  
@10,000 piece  
Low included in  
motherboard  
$0.31  
$0.47  
$0.09  
$0.09  
Refer to Appendix A for Directory of component suppliers  
Based on the Tolerance Factor in the above table, for an  
Table 8. R  
for Various Load Currents  
sense  
embedded PC trace resistor and for I  
= 14.5A:  
load,max  
R
R
SENSE  
SENSE  
Vth,min  
I
PC Trace  
Discrete  
Load,max  
----------------------------------------  
× (1 – TF) =  
RSENSE  
=
2.0A + ILoad, max  
(A)  
Resistor (m)  
Resistor (m)  
10.0  
11.2  
12.4  
13.9  
14.0  
14.5  
5.9  
5.4  
4.9  
4.5  
4.4  
4.3  
7.9  
7.2  
6.6  
6.0  
5.9  
5.8  
100mV  
---------------------------------  
× (1 – 29%) = 4.3mΩ  
2.0A + 14.5A  
For a discrete resistor and for I  
Vth,min  
= 14.5A:  
load, max  
----------------------------------------  
× (1 – TF) =  
RSENSE  
=
2.0A + ILoad, max  
100mV  
---------------------------------  
× (1 – 5%) = 5.8mΩ  
Discrete Sense Resistor  
2.0A + 14.5A  
Discrete Iron Alloy resistors come in variety of tolerances  
and power ratings, and are most ideal for precision imple-  
mentation. MnCu Alloy wire resistors or CuNi Alloy wire  
resistors are ideal for low cost implementations.  
For user convenience, Table 8 lists the recommended values  
for sense resistors for various load currents using embedded  
PC trace resistors and discrete resistors.  
11  
AN50  
APPLICATION NOTE  
Embedded Sense Resistor (PC Trace Resistor)  
where:  
Embedded PC trace resistors have the advantage of near zero  
cost implementation. However, the value of the PC trace  
resistor has large variations. Embedded resistors have 3  
major error sources: the sheet resistivity of the inner layer,  
the mismatch due to L/W, and the temperature variation of  
the resistor. All three error sources must be considered for  
laying out embedded sense resistors.  
ρ = Resistivity(µΩ-mil),  
L = Length(mils),  
W = Width(mils), and  
t = Thickness(mils).  
L
W
t
For 1oz copper, t = 1.35 mils, ρ = 717.86 µΩ-mil,  
1 L/1 W = 1 Square ( ).  
For example, you can layout a 5.30membedded sense  
• Sheet resistivity.  
resistor using the equations above:  
For 1 ounce copper, the thickness variation is typically  
1.15 mil to 1.35 mil. Therefore error due to sheet resistiv-  
ity is (1.35 - 1.15)/1.25 = 16%  
IL  
10  
W = --------- = --------- = 200mils  
0.05  
0.05  
R × W × t  
0.00530 × 200 × 1.35  
L = ----------------------- = --------------------------------------------------- = 2000mils  
• Mismatch due to L/W.  
ρ
717.86  
Percent error in L/W is dictated by geometry and the  
power dissipation capability of the sense resistor. The  
sense resistor must be able to handle the load current and  
therefore requires a minimum width which is calculated as  
follows.  
L/W = 10 ■  
Therefore, to model 5.30membedded sense resistor, you  
need W = 200 mils and L = 2000 mils. Refer to Figure 9.  
IL  
W = ---------  
0.05  
1
1
1
1
1
1
1
1
1
1
W = 200 mils  
where: W = minimum width required for proper power  
dissipation (mils) and I = Load Current in Amps.  
L = 2000  
Figure 9. 5.30mSense Resistor (10 )  
L
For 15A of load current, minimum width required is  
300mils, which reflects a 1% L/W error.  
You can also implement the sense resistor in the following  
manner. Each corner square is counted as 0.6 square since  
current flowing through the corner square does not flow  
uniformly and it is concentrated towards the inside edge, as  
shown in Figure 10.  
• Thermal Consideration.  
2
Due to I R power losses the surface temperature of the  
resistor will increase leading to a higher value. In addition,  
ambient temperature  
variation will add the change in resistor value:  
1
1
1
1
1
1
R = R20[1 + α20(T – 20)]  
.6  
.6  
1
1
where: R is the resistance at 20°C, α20 = 0.00393/ °C, T  
20  
.8  
is the operating temperature, and R is the desired value.  
Figure 10. 5.30mSense Resistor (10 )  
For temperature T = 50°C, the %R change = 12%.  
A Design Example Combining an Embedded Resistor  
and a Discrete Resistor  
Table 9 is the summary of the tolerance for the Embedded  
PC Trace Resistor.  
For low cost implementation, the embedded PC trace resistor  
is most desirable. However, its wide tolerance (29%) pre-  
sents a challenge. In addition, requirements for the CPU  
change frequently, and, thus, the maximum load current may  
be subject to change. Combining embedded resistors with  
discrete resistors may be a desirable option. Figure 11 shows  
a design that provides flexibility with a solution to address  
wide tolerances.  
Table 9. Summary PC Trace Resistor Tolerance  
Tolerance due to Sheet Resistivity variation  
Tolerance due to L/W error  
16%  
1%  
Tolerance due to temperature variation  
Total Tolerance for PC Trace Resistor  
12%  
29%  
In this design, you have the option to choose an embedded  
or a discrete MnCu sense resistor. To use the discrete sense  
resistor, populate R21 with a shorting bar (zero Ohm resis-  
tor) for proper Kelvin connection and add the MnCu sense  
resistor. To use the embedded sense resistor, on the other  
hand, populate R22 with a shorting bar for Kelvin connec-  
Design Rules for Using an Embedded Resistor  
The basic equation for laying an embedded resistor is:  
L
W × t  
-------------  
R = ρ ×  
12  
APPLICATION NOTE  
AN50  
Embedded Sense Resistor  
IFBH  
MnCu Discrete  
Resistor  
R21  
R22  
IFBL  
Output Power  
Plane (Vout)  
R-r  
R
R+r  
Figure 11. Short Circuit Sense Resistor Design Using a PC Trace Resistor and an Optional Discrete Sense Resistor  
tion. The embedded sense resistor allows the user to choose a  
plus or a minus delta resistance tap to offset any large sheet  
resistivity change. In this design, the center tap yields 6m,  
the left tap yields 6.7m, and the right tap yields 5.3m.  
Power Dissipation Consideration During a  
Short Circuit Condition  
The RC5050 and RC5051 controllers respond to an output  
short circuit by drastically changing the duty cycle of the  
gate drive signal to the power MOSFET. In doing this, the  
power MOSFET is protected from stress and from eventual  
failure. Figure 13A shows the gate drive signal of a typical  
RC5050 operating in continuous mode with a load current of  
10A. The duty cycle is set by the ratio of the input voltage to  
the output voltage. If the input voltage is 5V, and the output  
voltage is 3.1V, the ratio of Vout/ Vin is 62%. Figure 13B  
shows the result of a RC5050 going into its short circuit  
mode with a duty cycle approximately of 20%. Calculating  
the power in the MOSFET at each condition on the graph  
(Figure 12) shows how the protection works. The power dis-  
sipated in the MOSFET at normal operation for a load cur-  
rent of 14.5A, is given by:  
RC5050 and RC5051 Short Circuit Current  
Characteristics  
The RC5050 and RC5051 short circuit current characteristic  
includes a hysteresis function that prevents the DC-DC con-  
verter from oscillating in the event of a short circuit. Figure  
12 shows the typical characteristic of the DC-DC converter  
circuit with a 6msense resistor. The converter exhibits a  
normal load regulation characteristic until the voltage across  
the resistor exceeds the internal short circuit threshold of  
120mV. At this point, the internal comparator trips and  
signals the controller to turn off the gate drive to the power  
MOSFET. This causes a drastic reduction in output voltage  
as the load regulation collapses into the short circuit control  
mode. The output voltage does not return to its nominal  
value the output current is reduced to a value within the safe  
range for the DC-DC converter.  
2
14.5  
˙
PD = I2 × RON × DutyCycle =  
× .037 × .62 = 1.2W  
---------  
2
for each MOSFET.  
3.5  
The power dissipated in the MOSFET at short circuit  
condition for a peak short current of 20A, is given by:  
3.0  
2.5  
2.0  
1.5  
1.0  
20  
-----  
PD  
=
2 × .037 × .2 = 0.74W  
2
for each MOSFET.  
These calculations show that the MOSFET is not being  
over-stressed during a short circuit condition.  
0.5  
0
0
5
10  
15  
20  
25  
Output Current  
Figure 12. RC5050 Short Circuit Characteristic  
13  
AN50  
APPLICATION NOTE  
PD, Diode = IF, ave × VF × (1 – DutyCycle) =  
14 × 0.45 × 0.8 5W  
Thus, for the Schottky diode, the thermal dissipation during  
a short circuit is greatly magnified. This requires that the  
thermal dissipation of the diode be properly managed by an  
appropriate heat sink. To protect the Schottky from being  
destroyed in the event of a short circuit, you should limit the  
junction temperature to less than 130°C. You can find the  
required thermal resistance using the equation for maximum  
junction temperature:  
T
J(max) – TA  
PD = -------------------------------  
RΘJA  
Assuming that the ambient temperature is 50°C,  
Figure 13A. V  
Output Waveform for Normal  
T
J(max) – TA  
RΘJA = ------------------------------- = -------------------- = 16°C W  
PD  
CCQP  
130 – 50  
Operation Condition with V = 3.3V@10A  
out  
5
Thus, you need to provide a heat sink that gives the Schottky  
diode a thermal resistance of 16°C/W or lower to protect the  
device during an indefinite short.  
In summary, with proper heat sink, the Schottky diode is not  
over-stressed during a short circuit condition.  
Schottky Diode Selection  
The application circuit diagram of Figure 3 shows a Schottky  
diode, DS1. In non-synchronous mode, DS1 is used as a fly-  
back diode to provide a constant current path for the inductor  
when M1 is turned off. Table 10 shows the characteristics of  
several Schottky diodes. Note that MBR2015CTL has a very  
low forward voltage drop. This diode is ideal for applications  
where the output voltage is required to be less than 2.8V.  
Figure 13B. V  
Output Waveform for  
CCQP  
Output Shorted to Ground  
Table 10. Schottky Diode Selection Table  
Power dissipation on the Schottky diode during a short cir-  
cuit condition must also be considered. During normal oper-  
ation, the Schottky diode dissipates power while the power  
MOSFET is off. The power dissipated in the diode during  
normal operation, is given by:  
Manufacturer  
Model #  
Forward Voltage  
VF  
Conditions  
Philips  
PBYR1035  
IF = 20A; Tj = 25°C  
IF = 20A;Tj = 125°C  
< 0.84v  
< 0.72v  
Motorola  
MBR2035CT IF = 20A;Tj = 125°C  
IF = 20A; Tj = 25°C  
< 0.84v  
< 0.72v  
PD, Diode = IF × VF × (1 – DutyCycle) =  
Motorola  
MBR1545CT IF = 15A;Tj = 125°C  
IF = 15A; Tj = 25°C  
< 0.84v  
< 0.72v  
14.5 × 0.5V × (1 – 0.62) = 2.75W  
Motorola  
MBR2015CTL IF = 20A;Tj = 150°C  
IF = 20A; Tj = 25°C  
< 0.58v  
< 0.48v  
During a short circuit, the duty cycle dramatically reduces to  
around 20%. The forward current in the short circuit condi-  
tion decays exponentially through the inductor. The power  
dissipated in the diode during short circuit condition, is  
approximately given by:  
Output Filter Capacitors  
Output ripple performance and transient response are func-  
tions of the filter capacitors. Since the 5V supply of a PC  
motherboard may be located several inches away from the  
DC-DC converter, the input capacitance may play an impor-  
tant role in the load transient response of the RC5050 and  
RC5051. The higher input capacitance, the more charge stor-  
age is available for improving current transfer through the  
1
1.5µs  
-------------  
-----------  
IF, ending = Isc × e L R = 20A × e 1.3µs 7.9A  
IF, ave (20A + 7.9A) ⁄ 2 14A  
14  
APPLICATION NOTE  
AN50  
FET. Low Equivalent Series Resistance (ESR) capacitors are  
best suited for this type of application. Incorrect selection  
can hinder the converter's overall performance. The input  
capacitor should be placed as close to the drain of the FET as  
possible to reduce the effect of ringing caused by long trace  
lengths.  
For I = 12.2A (0-13A load step) and V = 100mV, the bulk  
O
capacitance required can be approximated as follows:  
IO × T  
12.2A × 2µs  
C(µF) =-------------------------------------= ---------------------------------------------------------------= 2870µF  
V – IO × ESR 100mV – 12.2A × 7.5mΩ  
Because the control loop response of the controller is not  
instantaneous, the initial load transient must be supplied  
entirely by the output capacitors. The initial voltage deviation  
is determined by the total ESR of the capacitors used and the  
parasitic resistance of the output traces. For a detailed analysis  
of capacitor requirements in a high-end microprocessor  
system, please refer to Application Bulletin 5.  
The ESR rating of a capacitor is a difficult number to  
quantify. ESR is defined as the resonant impedance of the  
capacitor. Since the capacitor is actually a complex imped-  
ance device having resistance, inductance, and capacitance,  
it is natural for this device to have a resonant frequency. As a  
rule, the lower the ESR, the better suited the capacitor is for  
use in switching power supply applications. Many capacitor  
manufacturers do not supply ESR data. A useful estimate of  
the ESR can be obtained using the following equation:  
Input Filter  
The DC-DC converter should include an input inductor  
between the system +5V supply and the converter input as  
described below. This inductor serves to isolate the +5V  
supply from the noise in the switching portion of the  
DC-DC converter, and to limit the inrush current into the  
input capacitors during power up. A value of 2.5µH is rec-  
ommended, as illustrated in Figure 14.  
DF  
ESR = ------------  
2πfC  
where DF is the dissipation factor of the capacitor, f is the  
operating frequency, and C is the capacitance in farads.  
With this in mind, correct calculation of the output capaci-  
tance is crucial to the performance of the DC-DC converter.  
The output capacitor determines the overall loop stability,  
output voltage ripple, and load transient response. The calcu-  
lation is as follows:  
2.5µH  
5V  
Vin  
1000µF, 10V  
Electrolytic  
0.1µF  
IO × T  
C(µF) = -------------------------------------  
V – IO × ESR  
65-AP42-17  
Figure 14. Input Filter  
where V is the maximum voltage deviation due to load  
transients, T is the reaction time of the power source (loop  
response time for the RC5050 and RC5051 isapproximately  
Bill of Material  
s), and I is the output load current.  
Table 11 is the Bill of Material for the Application Circuits  
of Figure 3 and Figure 4.  
O
Table 11. Bill of Materials for a 13A Pentium Pro Klamath Application  
Quantity Reference  
Manufacturer Part  
Order #  
Description  
Requirements and  
Comments  
7
C4, C5, C7, Panasonic  
C8, C9, C10, ECU-V1H104ZFX  
C11  
0.1µF 50V capacitor  
1
1
1
3
4
1
1
C6  
Panasonic  
ECSH1CY475R  
4.7µF 16V capacitor  
120pF capacitor  
Cext  
Panasonic  
ECU-V1H121JCG  
C12  
Panasonic  
ECSH1CY105R  
1µF 16V capacitor  
C1, C2, C3  
United Chemi-con  
LXF16VB102M  
1000µF 6.3V electrolytic  
capacitor 10mm x 20mm  
ESR < 0.047 Ω  
C13, C14,  
C15, C16  
Sanyo  
6MV1500GX  
1500µF 6.3V electrolytic  
capacitor 10mm x 20mm  
ESR < 0.047 Ω  
DS1  
(note 1)  
Motorola  
MBR2015CT  
Shottky diode, 15A  
6.2V Zener Diode  
Vf < 0.52V @ I = 10A  
f
D1  
Motorola 1N4691  
15  
AN50  
APPLICATION NOTE  
Table 11. Bill of Materials for a 13A Pentium Pro Klamath Application (continued)  
Quantity Reference  
Manufacturer Part  
Order #  
Description  
Requirements and  
Comments  
1
1
L1  
Pulse Engineering  
PE-53680  
1.3µH inductor  
L2*  
Pulse Engineering  
PE-53681  
2.5µH inductor  
*Optional—helps  
reduce ripple on 5v line  
2-4  
(note 2)  
M1-M4  
Rsense  
R5  
International Rectifier  
IRF7413  
N-Channel Logic Level  
Enhancement Mode MOSFET  
R
< 18mΩ  
DS,ON  
= 4.5V, I = 5A  
V
GS  
D
1
1
1
Coppel  
CuNi Wire resistor  
6 m, 1W  
Panasonic  
ERJ-6GEY050Y  
475% resistors  
10K5% resistor  
R6  
Panasonic  
ERJ-6ENF10.0KY  
U1  
Raytheon  
RC5050M or RC5051M  
Programmable DC-DC  
converter  
Refer to Appendix A for Directory of component suppliers.  
Notes:  
1. When used in synchronous mode, a 1A schottky diode such as the 1N5817 should be substituted for the MBR2015CT.  
2. A target R  
value of 10mshould be used for each output driver switch. Refer to Table 3 for alternative MOSFETs.  
DS,ON  
trace and the large gate capacitance of the FET. This noise  
PCB Layout Guidelines and  
Considerations  
radiates all throughout the board, and, because it is  
switching at such a high voltage and frequency, it is very  
difficult to suppress.  
PCB Layout Guidelines  
• Placement of the MOSFETs relative to the RC5050 is  
critical. Place the MOSFETs (M1 & M2) so that the trace  
length of the HIDRV pin from the RC5050 to the FET  
gates is minimized. A long lead length on this pin would  
cause high amounts of ringing due to the inductance of the  
Figure 15 shows an example of good placement for the  
MOSFETs in relation to the RC5050. In addition, this fig-  
ure shows an example of problematic placement for the  
MOSFETs.  
M1  
Good layout  
Bad layout  
M2  
RC5050 10  
RC5050 10  
11  
12  
13  
11  
12  
13  
9
9
8
7
8
7
14  
15  
16  
17  
14  
15  
16  
17  
6
6
5
4
5
4
18  
19  
20  
18  
19  
20  
3
2
3
2
1
1
M1  
M2  
= “Quiet" Pins  
Figure 15. Placement of the MOSFETs  
16  
APPLICATION NOTE  
AN50  
In general, all of the noisy switching lines should be kept  
away from the quiet analog section of the RC5050. That is,  
traces that connect to pins 12 and 13 (HIDRV and  
VCCQP) should be kept far away from the traces that con-  
nect to pins 1 through 5, and pin 16.  
• Place the output bulk capacitors as close to the CPU as  
possible to optimize their ability to supply instantaneous  
current to the load in the event of a current transient.  
Additional space between the output capacitors and the  
CPU allows the parasitic resistance of the board traces to  
degrade the DC-DC converter’s performance under severe  
load transient conditions, causing higher voltage  
• Place the 0.1µF decoupling capacitors as close to the  
RC5050 pins as possible. Extra lead length negates their  
ability to suppress noise.  
deviation. For more detailed information regarding  
capacitor placement, refer to Application Bulletin AB-5.  
• Each VCC and GND pin should have its own via to the  
appropriate plane. This helps to provide isolation between  
pins.  
• The traces that run from the RC5050 IFB (pin 4) and VFB  
(pin 5) pins should be run next to each other and Kelvin  
connected to the sense resistor. Running these lines  
together prevents some of the common mode noise that is  
presented to the RC5050 feedback input. Try, as much as  
possible, to run the noisy switching signals (HIDRV &  
VCCQP) on one layer, but use the inner layers for power  
and ground only. If the top layer is being used to route all  
of the noisy switching signals, use the bottom layer to  
route the analog sensing signals VFB and IFB.  
• Surround the CEXT timing capacitor with a ground trace.  
Be sure to place a ground or power plane under the  
capacitor for further noise isolation to provide additional  
shielding to the oscillator pin 1 from the noise on the  
PCB. In addition, place this capacitor as close to the  
RC5050 pin 1 as possible.  
• Place the MOSFETs, inductor and Schottky as close  
together as possible for the same reasons on the first bullet  
above. Place the input bulk capacitors as close to the  
drains of MOSFETs as possible. In addition, placement of  
a 0.1µF decoupling capacitor right on the drain of each  
MOSFET helps to suppress some of the high frequency  
switching noise on the input of the DC-DC converter.  
Example of a PC Motherboard Layout and  
Gerber File.  
This section shows a reference design for motherboard  
implementation of the RC5050 along with the Layout Gerber  
File and Silk Screen. The actual PCAD Gerber File can be  
obtained from Raytheon Electronics local Sales Office or  
from the Semiconductor Division Marketing department at  
415-966-7819.  
17  
AN50  
APPLICATION NOTE  
9. Next, look at HIDRV pin. This pin directly drives the  
gate of the FET. It should provide a gate drive (Vgs) of  
about 5V when turning the FET on. A careful study of  
the layout is recommended. Refer to the “PCB Layout  
Guidelines” section.  
Guidelines for Debugging and  
Performance Evaluations  
DebuggingYour First Design Implementation  
1. Note the setting of the VID pins to know what voltage is  
to be expected.  
10. Past experience shows that the most frequent errors are  
incorrect components, improper connections, and poor  
layout.  
2. Do not connect any load to the circuit. While monitoring  
the output voltage, apply power to the part with current  
limiting at the power supply. This ensures that no cata-  
strophic shorts are present.  
Performance Evaluation  
This section shows a sample evaluation results as a reference  
guide for evaluating a DC-DC Converter using the RC5050  
on a Pentium Pro motherboard.  
3. If proper voltage is not achieved go to "Procedures "  
below.  
4. When you have proper voltage, increase the current lim-  
iting of the power supply to 16A.  
Load Regulation  
5. Apply load at 1A increments. An active load (HP6060B  
or equivalent) is suggested.  
VID  
Iload (A)  
0.5  
Vout (V)  
3.0904  
3.0825  
3.0786  
3.0730  
3.0695  
3.0693  
3.0695  
3.0695  
3.0694  
3.0694  
3.0691  
0.70%  
10100  
6. In case of poor regulation refer to "Procedures" below.  
1.0  
2.0  
Procedures  
3.0  
1. If there is no voltage at the output and the circuit is not  
drawing current look for openings in the connections,  
check the circuitry versus schematic, and check the  
power supply pins at the device to make sure that volt-  
age(s) are applied.  
4.0  
5.0  
6.0  
7.0  
2. If there is no voltage at the output and the circuit is  
drawing excessive current (>100mA) with no load,  
check for possible shorts. Determine the path of the  
excessive current and which devise is drawing it—this  
current may be drawn by peripheral components.  
8.0  
9.0  
9.9  
Load Regulation 0.5A – 9.9A  
3. If the output voltage comes close to the expected value,  
check the VID inputs at the device pins. The part is fac-  
tory set to correspond to the VID inputs.  
VID  
Iload (A)  
0.5  
Vout (V)  
3.2805  
3.2741  
3.2701  
3.2642  
3.2595  
3.2597  
3.2606  
3.2611  
3.2613  
3.2611  
3.2607  
3.2599  
3.2596  
3.2596  
0.64%  
4. Premature shut down can be caused by an inappropriate  
value of the sense resistor. See the “Sense Resistor” sec-  
tion.  
10010  
1.0  
2.0  
5. Poor load regulation can be due to many causes. Check  
the voltages and signals at the critical pins.  
3.0  
4.0  
6. The VREF pin should be at the voltage set by the VID  
pins. If the power supply pins and the VID pins are  
correct the VREF should have the correct voltage.  
5.0  
6.0  
7. Next check the oscillator pin.You should see a saw tooth  
wave at the frequency set by the external capacitor.  
7.0  
8.0  
8. When the VREF and CEXT pins are checked and  
correct and the output voltage is incorrect, look at the  
waveform at VCCQP. This pin should be swinging from  
ground to +12V (in the +12V application), and from  
slightly below +5V to about +10V (charge pump appli-  
cation). If the VCCQP pin is noisy, with ripples/over-  
shoots riding on it this may make the converter not to  
function correctly.  
9.0  
10.0  
11.0  
12.0  
12.4  
Load Regulation 0.5A – 12.4A  
18  
APPLICATION NOTE  
AN50  
Output Voltage LoadTransients Due to Load Current Step  
VID  
Iload (A)  
0.5  
Vout (V)  
2.505  
2.504  
2.501  
2.496  
2.493  
2.493  
2.492  
2.492  
2.491  
2.490  
2.989  
2.488  
2.486  
2.485  
2.484  
0.84%  
This test is performed using Intel P6.0/P6S/P6T Voltage  
Transient Tester.  
11010  
1.0  
Low to High 0.5A-9.9A  
Current Step  
-76.0mV  
Refer to  
2.0  
Attachment  
A for Scope  
Picture  
3.0  
4.0  
5.0  
High to Low 9.9A-0.5A  
Current Step  
+70mV  
Refer to  
Attachment  
B for Scope  
Picture  
6.0  
7.0  
8.0  
Low to High 0.5A-12.4A -97.6mV  
Current Step  
Refer to  
Attachment  
C for Scope  
Picture  
9.0  
10.0  
11.0  
12.0  
13.0  
13.9  
High to Low 12.4A-0.5A +80.0mV  
Current Step  
Refer to  
Attachment  
D for Scope  
Picture  
Low to High 0.5A-13.9A -99.2mV  
Current Step  
Refer to  
Load Regulation 0.5A – 13.9A  
Attachment  
E for Scope  
Picture  
Note:  
Load regulation is expected to be typically around 0.8%. The  
load regulation performance for this device under evaluation  
is excellent.  
High to Low 13.9A-0.5A +105.2mV Refer to  
Current Step  
Attachment  
F for Scope  
Picture  
Note:  
Transient voltage is recommended to be less than 4% of the  
output voltage. The performance of the device under evalua-  
tion is significantly better than a typical VRM.  
19  
AN50  
APPLICATION NOTE  
Input Ripple and Power on Input Rush Current  
Power on Input Rush Current was not measured on the moth-  
erboard because we did not want to cut the 5V trace and  
insert a current probe in series with the supply. However,  
with the input filter design, the Input Rush Current is well  
within specification.  
Iload = 9.9A Input Ripple  
Voltage = 15mV ment G for Scope  
Picture  
Refer to Attach-  
Note:  
Excellent input ripple voltage. Input ripple voltage is recom-  
mended to be less than 5% of the output voltage.  
Component Case Temperature  
Case Temperature  
Iload = 9.9A  
Case Temperature Case Temperature  
Iload = 12.4A  
Iload = 13.9A  
Device  
Description  
(°C)  
(°C)  
(°C)  
Q3A  
MOSFET  
K1388  
57  
63  
64  
56  
70  
66.3  
66.6  
61.2  
87  
Q3B  
L1  
MOSFET  
K1388  
58  
53  
66  
Inductor,  
Unknown  
Q2  
Schottky Diode  
2048CT  
IC  
Raytheon’s RC5050  
52  
38.2  
35  
54  
58  
39  
Cin  
Cout  
Input Cap. 1000µF  
36.8  
34.8  
Output Cap.  
38.2  
1500µF  
Note:  
The values for case temperatures are within guidelines. That is, case temperatures for all components should be below  
105°C @25°C Ambient.  
Evaluation Summary  
The on-board DC-DC converter is fully functional. It has  
excellent load regulation, transient response, and input volt-  
age ripple.  
Attachment B  
Attachment A  
20  
APPLICATION NOTE  
AN50  
Attachment C  
Attachment E  
Attachment F  
Attachment D  
Attachment G  
21  
AN50  
APPLICATION NOTE  
Summary  
RC5050 Evaluation Board  
This application note covers many aspects of the RC5050  
and RC5051 for implementation of a DC-DC converter a on  
Pentium Pro motherboard. A detailed discussion includes  
the processor power requirements, a description of the  
RC5050 and RC5051, design considerations and compo-  
nents selection, layout guidelines and considerations, guide-  
lines for debugging, and performance evaluations.  
Raytheon Electronics provides an evaluation board to verify-  
ing system level performance of the RC5050. The evaluation  
board serves as a guide to performance expectations when  
using the supplied external components and PCB layout.  
Call Raytheon Electronics local Sales Office or the Market-  
ing department at 415-966-7819 for an evaluation board.  
22  
APPLICATION NOTE  
AN50  
Appendix A  
Directory of Component Suppliers  
Dale Electronics, Inc.  
E. Hwy. 50, PO Box 180  
Yankton, SD 57078-0180  
PH: (605) 665-9301  
National Semiconductor  
2900 Semiconductor Drive  
Santa Clara, CA 95052-8090  
PH: (800) 272-9959  
Fuji Electric  
Collmer Semiconductor Inc.  
14368 Proton Rd.  
Dallas, Texas 75244  
PH: (214)233-1589  
Nihon Inter Electronics Corp.  
Quantum Marketing Int’l, Inc.  
12900 Rolling Oaks Rd.  
Caliente, CA 93518  
PH: (805) 867-2555  
General Instrument  
Panasonic Industrial Co.  
6550 Katella Avenue  
Cypress, CA 90630  
PH: (714) 373-7366  
Power Semiconductor Division  
10 Melville Park Road  
Melville, NY 11747  
PH: (516) 847-3000  
Pulse Engineering  
Hoskins Manufacturing Co.  
(Copel Resistor Wire)  
10776 Hall Road  
12220 World Trade Drive  
San Diego, CA 92128  
PH: (619) 674-8100  
Hamburg, MI 48139-0218  
PH: (313) 231-1900  
Sanyo Energy USA  
2001 Sanyo Avenue  
San Diego, CA 92173  
PH: (619) 661-6620  
Intel Corp.  
5200 NE Elam Young Pkwy.  
Hillsboro, OR. 97123  
PH: (800) 843-4481 Tech. Support  
for Power Validator  
Siliconix  
Temic Semiconductors  
2201 Laurelwood Road  
Santa Clara, CA 95056-1595  
PH: (800) 554-5565  
International Rectifier  
233 Kansas St.  
El Segundo, CA 90245  
PH: (310) 322-3331  
Sumida Electric USA  
5999 New Wilke Road Suite #110  
Rolling Meadows, IL 60008  
PH: (708) 956-0702  
IRC Inc.  
PO Box 1860  
Boone, NC 28607  
PH: (704) 264-8861  
Xicon Capacitors  
PO Box 170537  
Motorola Semiconductors  
PO Box 20912  
Arlington, Texas 76003  
PH:(800) 628-0544  
Phoenix, Arizona 85036  
PH:(602) 897-5056  
23  
AN50  
APPLICATION NOTE  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES  
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR  
CORPORATION. As used herein:  
1. Life support devices or systems are devices or systems  
which, (a) are intended for surgical implant into the body,  
or (b) support or sustain life, and (c) whose failure to  
perform when properly used in accordance with  
instructions for use provided in the labeling, can be  
reasonable expected to result in a significant injury of the  
user.  
2. A critical component in any component of a life support  
device or system whose failure to perform can be  
reasonably expected to cause the failure of the life support  
device or system, or to affect its safety or effectiveness.  
Fairchild Semiconductor  
Corporation  
Fairchild Semiconductor  
Europe  
Fairchild Semiconductor  
Hong Kong Ltd.  
National Semiconductor  
Japan Ltd.  
Americas  
Fax: +49 (0) 1 80-530 85 86  
13th Floor, Straight Block,  
Ocean Center, 5 Canto Rd.  
Tsimshatsui, Kowloon  
Hong Kong  
Tel:81-3-5620-6175  
Fax:81-3-5620-6179  
Customer Response Center  
Tel:1-888-522-5372  
Deutsch Tel: +49 (0) 8 141-35-0  
English Tel: +44 (0) 1 793-85-68-56  
Italy  
Tel: +39 (0) 2 57 5631  
Tel:+852 2737-7200  
Fax:+852 2314-0061  
2/98 0.0m  
Stock#AN30000050  
1998 Fairchild Semiconductor Corporation  

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