Texas Instruments Bq2463x Evm User Manual

User's Guide  
SLUU396AJanuary 2010Revised July 2010  
bq2461x/bq2463x EVM (HPA422) Multi-Cell Synchronous  
Switch-Mode Charger  
Contents  
1
2
Introduction .................................................................................................................. 2  
1.1  
1.2  
1.3  
1.4  
1.5  
EVM Features ...................................................................................................... 2  
General Description ................................................................................................ 2  
I/O Description ...................................................................................................... 2  
1.4 Controls and Key Parameters Setting ...................................................................... 3  
Recommended Operating Conditions ........................................................................... 3  
Test Summary ............................................................................................................... 4  
2.1  
2.2  
2.3  
2.4  
Definitions ........................................................................................................... 4  
Equipment ........................................................................................................... 4  
Equipment Setup ................................................................................................... 5  
Procedure ........................................................................................................... 6  
3
4
PCB Layout Guideline ...................................................................................................... 7  
Bill of Materials, Board Layout and Schematics ........................................................................ 8  
4.1  
Bill of Materials ..................................................................................................... 8  
5
6
Board Layout ............................................................................................................... 11  
Schematics ................................................................................................................. 19  
List of Figures  
1
2
3
4
5
6
7
8
9
10  
Original Test Setup for HPA422 (bq2461x/bq2463x EVM)............................................................  
Top Layer................................................................................................................... 11  
2nd Layer .................................................................................................................... 12  
3rd Layer..................................................................................................................... 13  
Bottom Layer............................................................................................................... 14  
Top Assembly.............................................................................................................. 15  
Bottom Assembly.......................................................................................................... 16  
Top Silkscreen ............................................................................................................. 17  
Bottom Silkscreen ......................................................................................................... 18  
bq2461x/bq2463x EVM Schematic ..................................................................................... 19  
List of Tables  
1
2
3
4
I/O Description...............................................................................................................  
Controls and Key Parameters Setting....................................................................................  
Recommended Operating Conditions ....................................................................................  
Bill of Materials ..............................................................................................................  
1
SLUU396AJanuary 2010Revised July 2010  
bq2461x/bq2463x EVM (HPA422) Multi-Cell Synchronous Switch-Mode Charger  
Copyright © 2010, Texas Instruments Incorporated  
Introduction  
Table 1. I/O Description (continued)  
Jack  
Description  
J5–GND  
Ground  
JP1–LOW  
JP1–TTC  
JP1–HI  
Ground  
Timer capacitor pin  
Pull-up voltage source  
Pull-up voltage source  
LED Pull-up power line  
IC reference voltage VREF  
Pull-up voltage source  
External voltage supply from J2  
Pull-up voltage source of ACDRV and BATDRV LED logic circuit  
Q7 and Q11 common source  
Pull-up voltage source  
Charge enable  
JP2–HI  
JP2–LEDPWR  
JP3–VREF  
JP3–VPULLUP  
JP3–EXT  
JP4–VCC  
JP4–VCOM  
JP5–HI  
JP5–CHGEN  
1.4 1.4 Controls and Key Parameters Setting  
Table 2. Controls and Key Parameters Setting  
Jack  
Description  
Factory Setting  
TTC setting  
1-2 : Connect TTC to GROUND (Disable termination and the safety timer)  
2-3 : Connect TTC to VPULLUP (Allow termination, but disable the safety time)  
2 floating: Allow termination, CTTC sets the safety timer  
JP1  
Jumper on 2-3 (TTC and VPULLUP)  
Jumper On  
The pull-up power source supplies the LEDs when on.  
LED has no power source when off.  
JP2  
VPULLUP setting  
1-2 : Connect VPULLUP to VREF  
2-3 : Connect VPULLUP to VEXT  
Jumper On 1-2 (VPULLUP and  
VREF)  
JP3  
JP4  
JP5  
The pull-up voltage source of ACDRV and BATDRV LED logic circuit.  
Jumper on  
Jumper Off  
CHGEN setting  
Jumper on: CHGEN to VPULLUP  
Jumper off: CHGEN is set to low by pull down resistor.  
1.5 Recommended Operating Conditions  
Table 3. Recommended Operating Conditions  
Symbol  
Description  
Min  
Typ  
Max  
Unit  
24(617)  
28  
Supply voltage, VIN  
Input voltage from ac adapter input  
5
24  
V
(610/616/63x)  
2.1 (61x)  
1.8 (63x)  
21 (61x)  
18 (63x)  
Battery voltage, VBAT  
Voltage applied at VBAT terminal of J5  
V
Maximum input current from ac adapter  
input  
Supply current, IAC  
Charge current, Ichrg  
0
2
0
4.5  
8
A
A
Battery charge current  
3
Operating junction  
temperature range, TJ  
125  
°C  
The bq2461x/bq2463x EVM board requires a regulated supply approximately 0.5 V minimum above the  
regulated voltage of the battery pack to a maximum input voltage of 28 VDC.  
3
SLUU396AJanuary 2010Revised July 2010  
bq2461x/bq2463x EVM (HPA422) Multi-Cell Synchronous Switch-Mode Charger  
Copyright © 2010, Texas Instruments Incorporated  
     
Test Summary  
R25 and R28 can be changed to regulate output.  
VBAT = 2.1V × [1+ R25/R28]; for bq2461x;  
VBAT = 1.8V × [1+ R25/R28]; for bq2463x;  
Adjust the input voltage as required. Output set to operate at 21V (bq2461x) or 18V (bq2463x) from the  
factory.  
2
Test Summary  
2.1 Definitions  
This procedure details how to configure the HPA422 evaluation board. On the test procedure the following  
naming conventions are followed. See the HPA422 schematic for details.  
VXXX:  
External voltage supply name (VADP, VBT, VSBT)  
External load name (LOADR, LOADI)  
LOADW:  
V(TPyyy):  
V(Jxx):  
Voltage at internal test point TPyyy. For example, V(TP12) means the voltage at TP12  
Voltage at jack terminal Jxx.  
V(TP(XXX)):  
Voltage at test point "XXX". For example, V(ACDET) means the voltage at the test  
point which is marked as "ACDET".  
V(XXX, YYY):  
I(JXX(YYY)):  
Jxx(BBB):  
Voltage across point XXX and YYY.  
Current going out from the YYY terminal of jack XX.  
Terminal or pin BBB of jack xx  
Jxx ON:  
Internal jumper Jxx terminals are shorted  
Internal jumper Jxx terminals are open  
Jxx OFF:  
Jxx (-YY-) ON:  
Internal jumper Jxx adjacent terminals marked as "YY" are shorted  
Measure:A,B Check specified parameters A, B. If measured values are not within specified limits the  
unit under test has failed.  
Observe A,B Observe if A, B occur. If they do not occur, the unit under test has failed.  
Assembly drawings have location for jumpers, test points and individual components.  
2.2 Equipment  
2.2.1  
Power Supplies  
Power Supply #1 (PS#1): a power supply capable of supplying 30-V at 5-A is required.  
Power Supply #2 (PS#2): a power supply capable of supplying 5-V at 1-A is required.  
Power Supply #3 (PS#3): a power supply capable of supplying 5-V at 1-A is required.  
2.2.2  
2.2.3  
2.2.4  
LOAD #1  
A 30V (or above), 5A (or above) electronic load that can operate at constant current mode  
LOAD #2  
A Kepco bipolar operational power supply/amplifier, 0 ±30V (or above), 0 ±6A (or above).  
Oscilloscope  
Tektronix TDS3054 scope or equivalent, 10X voltage probe.  
4
bq2461x/bq2463x EVM (HPA422) Multi-Cell Synchronous Switch-Mode Charger  
SLUU396AJanuary 2010Revised July 2010  
Copyright © 2010, Texas Instruments Incorporated  
     
Test Summary  
2.2.5  
METERS  
Seven Fluke 75 multimeters, (equivalent or better)  
Or: Four equivalent voltage meters and three equivalent current meters.  
The current meters must be capable of measuring 5A+ current  
2.3 Equipment Setup  
1. Set the power supply #1 for 0V ± 100mVDC, 5.0 ± 0.1A current limit and then turn off supply.  
2. Connect the output of power supply #1 in series with a current meter (multimeter) to J1 (VIN, GND).  
3. Connect a voltage meter across J1 (VIN, GND).  
4. Set the power supply #2 for 0V ± 100mVDC, 1.0 ± 0.1A current limit and then turn off supply.  
5. Connect the output of the power supply #2 to J4 and J5 (TS, GND).  
6. Connect Load #1 in series with a current meter to J5 (SYS, GND). Turn off Load #1  
7. Connect Load #2 in series with a current meter to J5 (BAT, GND). Turn off Load #2.  
8. Connect a voltage meter across J5 (BAT, GND).  
9. Connect an oscilloscope's probe across J5 (BAT, GND)  
10. Connect a voltage meter across J5 (SYS, GND).  
11. JP1 (TTC and HI): ON, JP2: ON, JP3 (VPULLUP and VREF): ON, JP4: ON, JP5: OFF.  
After the above steps, the test setup for HPA422 is shown in Figure 1.  
bq24610/616/617/30 EVM  
HPA422  
PH  
J1  
I
Isys  
ACPWR  
TP12  
SYS  
TP1  
ACPWR  
Power  
supply #1  
Iin  
V
I
I
PGND  
Load  
#1  
J5  
V
V
SYS  
BAT  
TP2  
U1  
Load  
#2  
Ibat  
TP9  
PGND  
J3  
J2  
VCC  
ACSET  
ISET1  
ISET2  
JP4  
VBAT  
Oscilloscope  
APPLICATION CIRCUIT  
GND  
I
VREF  
JP3  
J4  
VEXT  
HI  
VEXT  
GND  
PG  
L
JP1  
JP2  
O
JP5  
STAT1  
VREF  
Power  
TTC  
sup ply #2  
TS  
CE  
PG  
/STAT1  
/STAT2  
/ACDRV  
/BATDRV  
Figure 1. Original Test Setup for HPA422 (bq2461x/bq2463x EVM)  
5
SLUU396AJanuary 2010Revised July 2010  
bq2461x/bq2463x EVM (HPA422) Multi-Cell Synchronous Switch-Mode Charger  
Copyright © 2010, Texas Instruments Incorporated  
   
Test Summary  
2.4 Procedure  
2.4.1  
AC Adapter Detection Threshold  
1. Make sure EQUIPMENT SETUP steps are followed. Turn on PS#2.  
2. Turn on PS#1  
Measure V(J5(SYS)) = 0 ± 500mV  
Measure V(TP(VREF)) = 0V ± 1000mV  
Measure V(TP(REGN)) = 0V ± 500mV  
3. Increase the output voltage on PS#1 until D5 (PG) on but do not exceed 5V. Set the power supply #2  
to 1.8V ± 100mVDC  
Measure V(J1(VIN)) = 4.5V ± 0.5V  
Measure V(J5(SYS)) = 4.5V ± 0.5V  
Measure V(TP(VREF)) = 3.3V ± 200mV  
Measure V(TP(REGN)) = 0V ± 500mV  
Measure D4 (/ACDRV) on, D5 (PG) on  
2.4.2  
Charger Regulation Voltage  
1. Increase the voltage of PS#1 until V(J1(VIN)) = 24V ± 0.1V.  
Measure V(J5(BAT, GND)) = 0V ± 1V  
2. Put JP5 on (Enable the charging).  
Observe D3 (CE) on.  
Measure Peak V(J5(BAT)) = 21.0V ± 1V (bq2461x)  
Measure Peak V(J5(BAT)) = 18.0V ± 1V (bq2463x)  
Measure V(TP(REGN)) = 6V ± 500mV  
2.4.3  
Charge Current and AC Current Regultion (DPM)  
1. Take off JP5 (Disable the charging).  
2. Connect the Load #2 in series with a current meter (multimeter) to J5 (BAT, GND). Make sure a  
voltage meter is connected across J5 (BAT, GND). Turn on the Load #2. Set the output voltage to 12V  
(bq2461x) or 2V (bq2463x).  
3. Connect the output of the Load #1 in series with a current meter (multimeter) to J5 (SYS, GND). Make  
sure a voltage meter is connected across J5 (SYS, GND). Turn on the power of the Load #1. Set the  
load current to 3.0A ± 50mA but disable the load #1. The setup is now like Figure 1 for HPA422. Make  
sure Ibat = 0A ± 10mA and Isys = 0A ± 10mA.  
4. Put JP5 on (Enable the charging).  
Observe D3 (CE) on  
Measure Ibat = 300mA ± 200mA (bq2461x)  
Measure Ibat = 125mA ± 60mA (bq2463x)  
Observe D7 (STAT1) on; D8 (STAT2) off.  
5. Set the Load #2 output voltage to 16.5V.  
Measure Ibat = 3000mA ± 300mA  
Observe D7 (STAT1) on; D8 (STAT2) off.  
6. Enable the output of the Load #1  
Measure Isys = 3000mA ± 200mA, Ibat = 1400mA ± 500mA, Iin = 4000mA ± 500mA  
7. Turn off the Load #1.  
Measure Isys = 0 ± 100mA, Ibat = 3000mA ± 300mA.  
8. Increase the Load #2 output voltage from 16.5V to 22V (61x) or 19V (63x).  
Measure Isys = 0 ± 100mA, Ibat = 0mA ± 100mA.  
Observe D7 (STAT1) off; D8 (STAT2) on.  
9. Decrease the Load #2 output voltage back to 16.5V.  
Observe D7 (STAT1) on; D8 (STAT2) off.  
6
bq2461x/bq2463x EVM (HPA422) Multi-Cell Synchronous Switch-Mode Charger  
SLUU396AJanuary 2010Revised July 2010  
Copyright © 2010, Texas Instruments Incorporated  
 
PCB Layout Guideline  
2.4.4  
Charger Cut-Off by Thermistor  
1. Slowly increase the output voltage of PS2 until Ibat = 0 ± 10mA.  
Measure V(J4(TS)) = 2.44V ± 200mV  
Observe D7 (STAT1) off; D8 (STAT2) off.  
2. Slowly decrease the output voltage of PS2 to 1.4V ± 0.1V.  
Measure V(J4(TS)) = 1.4V ± 100mV  
Measure Ibat = 3000mA ± 300mA (bq24610/617)  
Measure Ibat = 0mA ± 100mA (bq24616)  
Measure Ibat = 375mA ± 150mA (bq2463x)  
Observe D7 (STAT1) on; D8 (STAT2) off (bq24610/617/630)  
Observe D7 (STAT1) off; D8 (STAT2) off (bq24616)  
3. Slowly decrease the output voltage of PS2.  
Charge will resume. Continue to decrease the output voltage of PS2 slowly until Ibat = 0 ±10mA.  
Measure V(J4(TS)) = 1.14V ± 200mV  
Observe D7 (STAT1) off; D8 (STAT2) off.  
4. Slowly increase the output voltage of PS2 to 1.8V ± 100mV.  
Measure Ibat = 3000mA ± 200mA  
Observe D7 (STAT1) on; D8 (STAT2) off.  
2.4.5  
Power Path Selection  
1. Take off JP5 (Disable the charging)  
Observe D3 (CE) off; D7 (STAT1) off.  
2. Set JP3 Jumper On 2-3 (VPULLUP and VEXT). Connect the output of the power supply #3 to  
J2(VEXT, GND). Set the power supply #3 for 3.3V ± 200mVDC, 1.0 ± 0.1A current limit.  
3. Set the Load #2 output voltage to 16.5V ± 500mV.  
4. Measure V(J5(SYS)) = 24V ± 1V (adapter connected to system)  
Observe D4 (ACDRV) on, D6 (BATDRV) off, D5 (PG) on, D7 (STAT1) off, D8 (STAT2) off.  
5. Turn off PS#1.  
6. Measure V(J5(SYS)) = 16.5V ± 0.5V (battery connected to system)  
7. Observe D4 (ACDRV) off, D6 (BATDRV) on, D5 (PG) off, D7 (STAT1) off, D8 (STAT2) off.  
8. Turn off power supply #2 and #3. Set JP3 on 1-2 (VPULLUP and VREF).  
3
PCB Layout Guideline  
1. It is critical that the exposed power pad on the backside of the bq2461x/bq2463x package be soldered  
to the PCB ground. Make sure there are sufficient thermal vias right underneath the IC, connecting to  
the ground plane on the other layers.  
2. The control stage and the power stage should be routed separately. At each layer, the signal ground  
and the power ground are connected only at the power pad.  
3. AC current sense resistor must be connected to ACP and ACN with a Kelvin contact. The area of this  
loop must be minimized. The decoupling capacitors for these pins should be placed as close to the IC  
as possible.  
4. Charge current sense resistor must be connected to SRP, SRN with a Kelvin contact. The area of this  
loop must be minimized. The decoupling capacitors for these pins should be placed as close to the IC  
as possible.  
5. Decoupling capacitors for DCIN, VREF, VCC, REGN should make the interconnections to the IC as  
short as possible.  
6. Decoupling capacitors for BAT must be placed close to the corresponding IC pins and make the  
interconnections to the IC as short as possible.  
7. Decoupling capacitor(s) for the charger input must be placed close to top buck FET's drain and bottom  
buck FET’s source.  
7
SLUU396AJanuary 2010Revised July 2010  
bq2461x/bq2463x EVM (HPA422) Multi-Cell Synchronous Switch-Mode Charger  
Copyright © 2010, Texas Instruments Incorporated  
   
Bill of Materials, Board Layout and Schematics  
4
Bill of Materials, Board Layout and Schematics  
4.1 Bill of Materials  
Table 4. Bill of Materials  
bq24610-001 bq24617-002 Bq24630-003 bq24616-004 Value  
RefDes  
Description  
Size  
Part Number Mfr  
1
0
0
0
1
6
0
1
0
0
1
6
0
0
1
0
1
6
0
0
0
1
1
6
bq24610RGE U1  
Charger Controller IC  
Charger Controller IC  
Charger Controller IC  
Charger Controller IC  
Capacitor, Ceramic, 16V, X7R, 5%,  
QFN-24 (RGE) bq24610RGE TI  
QFN-24 (RGE) bq24617RGE TI  
QFN-24 (RGE) bq24630RGE TI  
QFN-24 (RGE) bq24616RGE TI  
bq24617RGE U1  
bq24630RGE U1  
bq24616RGE U1  
0.1uF  
0.1uF  
C3  
603  
603  
STD  
STD  
STD  
C7,C8,C13,C1 Capacitor, Ceramic, 16V, X7R, 10%  
8,C19,C33  
STD  
6
6
6
6
0.1uF  
22p  
C4,C5,C16,C1 Capacitor, Ceramic, 50V, X7R, 10%  
7,C24,C26  
603  
STD  
STD  
1
0
1
0
1
0
1
0
C22  
Capacitor, Ceramic, 50V, X7R, 10%  
603  
603  
STD  
STD  
STD  
STD  
C9,C21,C30,C Capacitor, Ceramic, 50V, X7R, 10%  
31  
3
0
2
1
0
6
3
0
2
1
0
6
3
0
2
1
0
6
3
0
2
1
0
6
1.0uF  
C1,C6,C15  
C34  
Capacitor, Ceramic, 16V, X7R, 20%  
Capacitor, Ceramic, 50V, X7R, 10%  
Capacitor, Ceramic, 50V, X5R, 20%  
Capacitor, Ceramic, 50V, X7R, 20%  
Capacitor, Ceramic, 50V, X7R, 20%  
805  
STD  
STD  
STD  
STD  
STD  
STD  
STD  
STD  
STD  
STD  
STD  
STD  
805  
1.0uF/50V  
2.2uF/50V  
C12,C14  
C2  
1206  
1206  
1206  
1812  
C32  
10uF/50V  
C10,C11,C20, Capacitor, Ceramic, 50V, Y5V,  
C23,C28,C29 -20/+80%  
0
0
0
0
6
0
0
0
0
6
0
0
0
0
6
0
0
0
0
6
C25,C27  
D11  
Capacitor, Ceramic, 50V, X5R, 20%  
Diode, Zener, 7.5V, 350-mW  
Diode, Schottky, 200-mA, 30-V  
Diode, Zener, 7.5V, 350-mW  
1812  
STD  
STD  
SOT-23  
SOT23  
SOT-23  
BZX84C7V5  
BAT54  
Diodes  
D10  
Vishay-Liteon  
Diodes  
D9  
BZX84C7V5  
Green  
D3,D4,D5,D6, Diode, LED, Green, 2.1V, 20mA, 6mcd 603  
D7,D8  
LTST-  
C190GKT  
Lite On  
0
1
1
0
1
1
0
1
0
0
1
1
D2  
D1  
L1  
Diode, Schottky, 1A, 40V  
DO-214AA  
SOD-523  
MBRS140  
ZLLS350  
Fairchild  
Zetex  
ZLLS350  
6.8uH  
Diode, Schottky, 1.16A, 40-V  
Inductor, SMT, 9A, 19.8milliohm  
0.520 sq inch IHLP5050CEE Vishay  
R6R8M01  
0
3
0
3
1
3
0
3
8.2uH  
L1  
Inductor, SMT, 9.5A, 18.3milliohm  
Header, 2 pin, 100mil spacing,  
0.520 sq inch IHLP5050CEE Vishay  
R8R2M01  
PEC02SAAN  
JP2,JP4,JP5  
0.100 inch x 2 PEC02SAAN  
Sullins  
8
bq2461x/bq2463x EVM (HPA422) Multi-Cell Synchronous Switch-Mode Charger  
SLUU396AJanuary 2010Revised July 2010  
Copyright © 2010, Texas Instruments Incorporated  
     
Bill of Materials, Board Layout and Schematics  
Table 4. Bill of Materials (continued)  
bq24610-001 bq24617-002 Bq24630-003 bq24616-004 Value  
RefDes  
Description  
Size  
Part Number Mfr  
2
4
2
4
2
4
2
4
PEC03SAAN  
0
JP1,JP3  
Header, 3 pin, 100mil spacing,  
0.100 inch x 3 PEC03SAAN  
Sullins  
Std  
R10,R19,R26, Resistor, Chip, 1/16W, 1%  
R13  
402  
Std  
1
1
0
3
1
1
0
1
6
1
1
0
3
1
1
0
1
6
1
0
1
3
1
0
1
1
6
1
0
1
3
1
0
1
1
6
10  
R22  
R4  
Resistor, Chip, 1/4W, 1%  
Resistor, Chip, 1/16W, 1%  
Resistor, Chip, 1/16W, 1%  
1206  
402  
402  
402  
402  
402  
402  
603  
603  
Std  
Std  
Std  
Std  
Std  
Std  
Std  
Std  
Std  
Std  
Std  
Std  
Std  
Std  
Std  
Std  
Std  
Std  
9.31k  
2.2k  
1k  
R4  
R21,R24,R27 Resistor, Chip, 1/16W, 1%  
100  
430k  
6.8k  
0
R8  
Resistor, Chip, 1/16W, 1%  
Resistor, Chip, 1/16W, 1%  
Resistor, Chip, 1/16W, 1%  
Resistor, Chip, 1/16W, 1%  
R5  
R5  
R17  
2.21k  
R31,R34,R35, Resistor, Chip, 1/16W, 1%  
R36,R39,R40  
1
2
6
1
2
6
1
2
6
1
2
6
10  
R14  
Resistor, Chip, 1/16W, 1%  
Resistor, Chip, 1/16W, 1%  
Resistor, Chip, 1/16W, 1%  
603  
603  
603  
Std  
Std  
Std  
Std  
Std  
Std  
10k  
100k  
R29,R30  
R3,  
R20,R32,R33,  
R37,R38  
1
1
1
1
4
1
1
1
1
4
1
1
1
1
4
1
1
1
1
4
10k  
R16  
R15  
R12  
R7  
Resistor, Chip, 1/10W, 1%  
Resistor, Chip, 1/10W, 1%  
Resistor, Chip, 1/10W, 1%  
Resistor, Chip, 1/10W, 1%  
805  
805  
805  
805  
805  
Std  
Std  
Std  
Std  
Std  
Std  
Std  
Std  
Std  
Std  
100k  
22.1k  
32.4k  
100k  
R6,R11,R23,R Resistor, Chip, 1/10W, 1%  
28  
1
2
2
1
2
2
1
2
2
1
2
2
909k  
3.9  
R25  
Resistor, Chip, 1/10W, 1%  
Resistor, Chip, 1/8W, 5%  
Resistor, Chip, 1/2W, 1%  
805  
Std  
Std  
Std  
Std  
R1,R2  
R9,R18  
1206  
2010  
0.01  
WSL2010R01 Vishay  
00FEA  
1
2
1
1
1
2
1
1
1
2
1
1
1
2
1
1
ED1515  
J2  
Terminal Block, 3 pin, 6A, 3.5mm  
Terminal Block, 4 pin, 6A, 3.5mm  
Terminal Block, 2 pin, 15A, 5.1mm  
Terminal Block, 4 pin, 15A, 5.1mm  
0.41 x 0.25  
inch  
ED555\3DS  
ED555\4DS  
ED120/2DS  
ED120/4DS  
OST  
OST  
OST  
OST  
ED1516  
J3,J4  
J1  
0.55 x 0.25  
inch  
ED120/2DS  
ED120/4DS  
0.40 x 0.35  
inch  
J5  
0.80 x 0.35  
inch  
9
SLUU396AJanuary 2010Revised July 2010  
bq2461x/bq2463x EVM (HPA422) Multi-Cell Synchronous Switch-Mode Charger  
Copyright © 2010, Texas Instruments Incorporated  
Bill of Materials, Board Layout and Schematics  
Table 4. Bill of Materials (continued)  
bq24610-001 bq24617-002 Bq24630-003 bq24616-004 Value  
RefDes  
Description  
Size  
Part Number Mfr  
1
1
1
1
5001  
GND  
Test Point, Black, Thru Hole Color  
Keyed  
0.100 x 0.100 5001  
inch  
Keystone  
14  
14  
14  
14  
5002  
/ACDRV,/BAT Test Point, White, Thru Hole Color  
0.100 x 0.100 5002  
inch  
Keystone  
DRV,/PG,  
Keyed  
ACSET,CHGE  
N,ISET1,ISET  
2, REGN,  
STAT1,STAT2  
,TS,TTC,  
VCC,VREF  
5
3
3
5
3
3
5
3
3
5
3
3
131-4244-00  
2N7002DICT  
TP1,TP2,TP8, Adaptor, 3.5-mm probe clip ( or  
0.200 inch  
SOT23  
S0-8  
131-4244-00  
Tektronix  
TP9,TP12  
131-5031-00)  
Q6,Q8,Q9  
MOSFET, N-ch, 60V, 115mA,  
1.2Ohms  
2N7002DICT  
Vishay-Liteon  
SI4401BDY-  
T1-GE  
FDS4141  
Q1,Q2,Q5  
(Note 5)  
MOSFET, PChan, -40V, -18A,  
9.2millohm  
SI4401BDY  
FDS4141  
Vishay-  
Siliconxi  
Fairchild  
2
2
2
2
2
2
2
2
FDS8447  
Q3,Q4  
Q7,Q10  
PCB  
MOSFET, NChan, 40V, 50A, 4.5  
millohm  
S0-8  
FDS8447  
TP0610K  
Vishay-  
Siliconix  
TP0610K  
Mosfet, P-Ch, 60V, Rds 6 ohms, Id  
185 mA  
SOT-23  
Vishay-  
Siliconix  
1
5
1
5
1
5
1
5
4 layer 2oz. PCB  
HPA422  
929950-00  
Shorting jumpers, 2-pin, 100mil  
spacing  
929950-00  
3M/ESD  
4
4
4
4
4
4
4
4
STANDOFF M/F HEX 6-32 NYL .500"  
6-32 NYL Hex nuts  
4816  
Keystone  
NY HN 632  
Building  
Fasteners  
10  
bq2461x/bq2463x EVM (HPA422) Multi-Cell Synchronous Switch-Mode Charger  
SLUU396AJanuary 2010Revised July 2010  
Copyright © 2010, Texas Instruments Incorporated  
Board Layout  
5
Board Layout  
Figure 2. Top Layer  
11  
SLUU396AJanuary 2010Revised July 2010  
bq2461x/bq2463x EVM (HPA422) Multi-Cell Synchronous Switch-Mode Charger  
Copyright © 2010, Texas Instruments Incorporated  
   
Board Layout  
Figure 3. 2nd Layer  
12  
bq2461x/bq2463x EVM (HPA422) Multi-Cell Synchronous Switch-Mode Charger  
SLUU396AJanuary 2010Revised July 2010  
Copyright © 2010, Texas Instruments Incorporated  
 
Board Layout  
Figure 4. 3rd Layer  
13  
SLUU396AJanuary 2010Revised July 2010  
bq2461x/bq2463x EVM (HPA422) Multi-Cell Synchronous Switch-Mode Charger  
Copyright © 2010, Texas Instruments Incorporated  
 
Board Layout  
Figure 5. Bottom Layer  
14  
bq2461x/bq2463x EVM (HPA422) Multi-Cell Synchronous Switch-Mode Charger  
SLUU396AJanuary 2010Revised July 2010  
Copyright © 2010, Texas Instruments Incorporated  
 
Board Layout  
Figure 6. Top Assembly  
15  
SLUU396AJanuary 2010Revised July 2010  
bq2461x/bq2463x EVM (HPA422) Multi-Cell Synchronous Switch-Mode Charger  
Copyright © 2010, Texas Instruments Incorporated  
 
Board Layout  
Figure 7. Bottom Assembly  
16  
bq2461x/bq2463x EVM (HPA422) Multi-Cell Synchronous Switch-Mode Charger  
SLUU396AJanuary 2010Revised July 2010  
Copyright © 2010, Texas Instruments Incorporated  
 
Board Layout  
Figure 8. Top Silkscreen  
17  
SLUU396AJanuary 2010Revised July 2010  
bq2461x/bq2463x EVM (HPA422) Multi-Cell Synchronous Switch-Mode Charger  
Copyright © 2010, Texas Instruments Incorporated  
 
Board Layout  
Figure 9. Bottom Silkscreen  
18  
bq2461x/bq2463x EVM (HPA422) Multi-Cell Synchronous Switch-Mode Charger  
SLUU396AJanuary 2010Revised July 2010  
Copyright © 2010, Texas Instruments Incorporated  
 
Schematics  
6
Schematics  
Figure 10. bq2461x/bq2463x EVM Schematic  
19  
SLUU396AJanuary 2010Revised July 2010  
bq2461x/bq2463x EVM (HPA422) Multi-Cell Synchronous Switch-Mode Charger  
Copyright © 2010, Texas Instruments Incorporated  
   
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EVM Warnings and Restrictions  
It is important to operate this EVM within the input voltage range of 5 V to 28 V and the output voltage range of 0 V to 26 V .  
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Copyright © 2010, Texas Instruments Incorporated  
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