TPA3008D2
SLOS435A–MAY 2004–REVISED JULY 2004
10-W STEREO CLASS-D AUDIO POWER AMPLIFIER
FEATURES
DESCRIPTION
•
10-W/Channel Into an 16-Ω Load From a
The TPA3008D2 is a 10-W (per channel) efficient,
class-D audio amplifier for driving bridged-tied stereo
speakers. The TPA3008D2 can drive stereo speakers
as low as 8 Ω. The high efficiency of the TPA3008D2
eliminates the need for external heatsinks when
playing music.
17-V Supply
•
Up to 92% Efficient, Class-D Operation
Eliminates Need For Heatsinks
•
•
•
8.5-V to 18-V Single-Supply Operation
Four Selectable, Fixed Gain Settings
The gain of the amplifier is controlled by two gain
select pins. The gain selections are 15.3, 21.2, 27.2,
and 31.8 dB.
Differential Inputs Minimizes Common-Mode
Noise
•
•
•
Space-Saving, Thermally Enhanced
PowerPAD™ Packaging
The outputs are fully protected against shorts to
GND, VCC, and output-to-output shorts. A fault ter-
minal allows short-circuit fault reporting and automatic
recovery. Thermal protection ensures that the maxi-
mum junction temperature is not exceeded.
Thermal and Short-Circuit Protection
With Auto Recovery Option
Pinout Similar to TPA3000D Family
APPLICATIONS
•
LCD Monitors and TVs
•
All-In-One PCs
PVCC
PVCC
10 µF
10 µF
220 nF
220 nF
0.1 µF
0.1 µF
1 µF
Shutdown/Mute
Control
VCLAMPR
SHUTDOWN
NC
RINN
Right Differential
Inputs
0.47 µF
0.47 µF
0.47 µF
0.47 µF
0.47 µF
NC
RINP
AVCC
AVCC
V2P5
LINP
Left Differential
Inputs
NC
LINN
NC
AGND
10 µF
0.1 µF
TPA3008D2
AVDDREF
NC
AVDD
1 µF
GAIN0
GAIN1
FAULT
COSC
Gain
Control
220 pF
ROSC
120 kΩ
AGND
VCLAMPL
NC
1 µF
0.1 µF
0.1 µF
10 µF
10 µF
220 nF
PVCC
220 nF
PVCC
†
†Optional output filter for EMI suppression
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004, Texas Instruments Incorporated
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TPA3008D2
SLOS435A–MAY 2004–REVISED JULY 2004
AVAILABLE OPTIONS
TA
PACKAGED DEVICE
48-PIN HTQFP (PHP)(1)
-40°C to 85°C
TPA3008D2PHP
(1) The PHP package is available taped and reeled. To order a taped
and reeled part, add the suffix R to the part number (e.g.,
TPA3008D2PHPR).
DC ELECTRICAL CHARACTERISTICS
TA = 25°C, VCC = 12 V, RL = 8 Ω (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
5
MAX
UNIT
mV
V
Class-D output offset voltage
(measured differentially)
INN and INP connected together,
Gain = 31.8 dB
|VOO
|
2
55
V2P5
AVDD
2.5-V Bias voltage
No load
2.5
5
IL = 10 mA, SHUTDOWN = 2 V,
VCC = 8.5 V to 18 V
+5-V internal supply voltage
4.5
5.5
V
PSRR
ICC
Power supply rejection ratio
Quiescent supply current
VCC = 11.5 V to 12.5 V
-76
11
dB
SHUTDOWN = 2 V, no load
22
25
mA
Quiescent supply current in shut-
down mode
ICC(SD)
SHUTDOWN = 0 V
1.6
µA
High side
600
500
1100
15.3
21.2
27.2
31.8
16
VCC = 12 V,
Drain-source on-state resistance IO = 1 A,
rDS(on)
Low side
mΩ
TJ = 25°C
Total
1300
16.2
21.8
27.8
32.5
GAIN0 = 0.8 V
GAIN0 = 2 V
GAIN0 = 0.8 V
GAIN0 = 2 V
14.6
20.5
26.4
31.1
GAIN1 = 0.8 V
G
Gain
dB
GAIN1 = 2 V
ton
toff
Turnon time
Turnoff time
C(V2P5) = 1 µF, SHUTDOWN = 2 V
C(V2P5) = 1 µF, SHUTDOWN = 0.8 V
ms
µs
60
AC ELECTRICAL CHARACTERISTICS
TA = 25°C, VCC = 12 V, RL = 8 Ω, (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
200 mVPP ripple from 20 Hz to 1 kHz,
Gain = 15.6 dB, Inputs ac-coupled to GND
kSVR Supply voltage rejection ratio
-70
dB
THD+N = 0.13%, f = 1 kHz, RL = 8 Ω
5
THD+N = 10%, f = 1 kHz, RL = 8 Ω
8.5
THD+N = 0.16%, f = 1 kHz, RL = 16 Ω,
VCC = 17 V
PO
Continuous output power
W
5
THD+N = 10%, f = 1 kHz, RL = 16 Ω,
VCC = 17 V
10
Total harmonic distortion plus
noise
THD+N
Vn
PO = 1 W, f = 1 kHz, RL = 8 Ω
0.1%
20 Hz to 22 kHz, A-weighted filter,
Gain = 15.6 dB
Output integrated noise floor
Crosstalk
-80
-93
dB
dB
PO = 1 W, RL = 8 Ω, Gain = 15.6 dB,
f = 1 kHz
Maximum output at THD+N < 0.5%,
f = 1 kHz, Gain = 15.6 dB
SNR
Signal-to-noise ratio
97
dB
Thermal trip point
Thermal hystersis
150
20
°C
°C
3
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TPA3008D2
SLOS435A–MAY 2004–REVISED JULY 2004
FUNCTIONAL BLOCK DIAGRAM
V2P5
PVCC
V2P5
VClamp
Gen
VCLAMPR
BSRN
PVCCR(2)
Gate
Drive
ROUTN(2)
Deglitch
and
PWM
Mode
Logic
PGNDR
BSRP
PVCCR(2)
RINN
Gain
Adj.
RINP
V2P5
Gate
Drive
ROUTP(2)
PGNDR
To Gain Adj.
Blocks and
Start-up Logic
4
GAIN0
GAIN1
Gain
Control
FAULT
V2P5
SC
Detect
ROSC
COSC
Ramp
Start-up and
Protection
Logic
Biases
Generator
Thermal
VDDok
VCCok
VDD
and
References
AVCC
AV REF
DD
AVDD
AVCC
5-V LDO
AVDD
PVCC
AGND(2)
VCLAMPL
TTL Input
Buffer
(VCC Compl)
SHUTDOWN
VClamp
Gen
BSLN
PVCCL(2)
Gate
Drive
LOUTN(2)
V2P5
Deglitch
and
PWM
Mode
Logic
PGNDL
BSLP
PVCCL(2)
LINN
LINP
Gain
Adj.
Gate
Drive
LOUTP(2)
PGNDL
4
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TPA3008D2
SLOS435A–MAY 2004–REVISED JULY 2004
PHP PACKAGE
(TOP VIEW)
48 47 46 45 44 43 42 41 40 39 38 37
1
2
3
4
5
6
7
8
9
10
36
35
34
33
32
VCLAMPR
NC
SHUTDOWN
RINN
RINP
NC
AV
V2P5
CC
LINP
NC
LINN
NC
31
30
29
28
27
26
TPA3008D2
AV REF
AGND
DD
AV
NC
GAIN0
GAIN1
FAULT
NC
DD
COSC
ROSC
11
12
AGND
VCLAMPL
25
13 14 15 16 17 18 19 20 21 22 23 24
5
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TPA3008D2
SLOS435A–MAY 2004–REVISED JULY 2004
TERMINAL FUNCTIONS
PIN NAME
AGND
PIN NUMBER
26, 30
I/O
DESCRIPTION
-
-
Analog ground for digital/analog cells in core
AVCC
33
High-voltage analog power supply, not connected internally to PVCCR or PVCCL
5-V Regulated output for use by internal cells and GAIN0, GAIN1 pins only. Not
specified for driving other external circuitry.
AVDD
29
O
AVDDREF
BSLN
7
O
5-V Reference output—connect to gain setting resistor or directly to GAIN0, GAIN1.
Bootstrap I/O for left channel, negative high-side FET
13
24
48
37
28
-
-
BSLP
Bootstrap I/O for left channel, positive high-side FET
BSRN
BSRP
-
Bootstrap I/O for right channel, negative high-side FET
-
Bootstrap I/O for right channel, positive high-side FET
COSC
I/O
I/O for charge/discharging currents onto capacitor for ramp generator.
Short-circuit detect fault output.
FAULT = high, short-circuit detected.
FAULT = low, normal operation.
FAULT
11
O
Status is reset when power is cycled or SHUTDOWN is cycled.
GAIN0
GAIN1
LINN
9
10
I
I
Gain select least significant bit. TTL logic levels with compliance to AVDD.
Gain select most significant bit. TTL logic levels with compliance to AVDD
.
6
I
Negative audio input for left channel
LINP
5
I
Positive audio input for left channel
LOUTN
LOUTP
16, 17
20, 21
O
O
Class-D 1/2-H-bridge negative output for left channel
Class-D 1/2-H-bridge positive output for left channel
8, 12, 31, 32,
34, 35
NC
-
No internal connection
PGNDL
PGNDR
18, 19
42, 43
-
-
Power ground for left channel H-bridge
Power ground for right channel H-bridge
Power supply for left channel H-bridge (internally connected to pins 22 and 23), not
connected to PVCCR or AVCC
PVCCL
PVCCL
PVCCR
PVCCR
14, 15
22, 23
38, 39
46, 47
-
-
-
-
.
Power supply for left channel H-bridge (internally connected to pins 14 and 15), not
connected to PVCCR or AVCC
.
Power supply for right channel H-bridge (internally connected to pins 46 and 47),
not connected to PVCCL or AVCC
.
Power supply for right channel H-bridge (internally connected to pins 38 and 39),
not connected to PVCCL or AVCC
.
RINP
3
2
I
I
Positive audio input for right channel
RINN
Negative audio input for right channel
ROSC
ROUTN
ROUTP
27
I/O
O
O
I/O current setting resistor for ramp generator.
44, 45
40, 41
Class-D 1/2-H-bridge negative output for right channel
Class-D 1/2-H-bridge positive output for right channel
Shutdown signal for IC (low = shutdown, high = operational). TTL logic levels with
SHUTDOWN
1
I
compliance to VCC
.
VCLAMPL
VCLAMPR
V2P5
25
36
4
-
-
Internally generated voltage supply for left channel bootstrap capacitors.
Internally generated voltage supply for right channel bootstrap capacitors.
2.5-V Reference for analog cells.
O
Connect to AGND and PGND—should be the center point for both grounds. Internal
resistive connection to AGND.
Thermal Pad
-
-
6
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TPA3008D2
SLOS435A–MAY 2004–REVISED JULY 2004
TYPICAL CHARACTERISTICS
TABLE OF GRAPHS
FIGURE
THD+N
THD+N
Total harmonic distortion + noise
Total harmonic distortion + noise
Closed-loop response
Output power
vs Frequency
1, 2, 3, 4
5, 6
7
vs Output power
vs Supply voltage
vs Output power
vs Total output power
vs Total output power
vs Frequency
8, 9
10
Efficiency
Efficiency
11
VCC
Supply current
12
Crosstalk
13
kSVR
Supply ripple rejection ratio
Commom-mode rejection ratio
vs Frequency
14
CMRR
vs Frequency
15
TOTAL HARMONIC DISTORTION + NOISE
TOTAL HARMONIC DISTORTION + NOISE
vs
vs
FREQUENCY
FREQUENCY
10
10
V
= 18 V,
CC
V
= 12 V,
CC
R = 16 W,
Gain = 21.6 dB
L
R = 16 W,
Gain = 21.6 dB
L
1
1
P
O
= 0.5 W
0.1
0.1
0.01
P
O
= 2.5 W
P
O
= 1 W
P
= 1 W
O
0.01
P
= 2.5 W
O
P
O
= 0.5 W
0.005
20
100
1 k
10 k 20 k
1 k
20
100
10 k 20 k
f − Frequency − Hz
f − Frequency − Hz
Figure 1.
Figure 2.
7
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TPA3008D2
SLOS435A–MAY 2004–REVISED JULY 2004
TOTAL HARMONIC DISTORTION + NOISE
TOTAL HARMONIC DISTORTION + NOISE
vs
vs
FREQUENCY
FREQUENCY
10
10
V
CC
= 12 V,
V
= 18 V,
CC
R = 8 W
Gain = 21.6 dB
R = 8 W,
Gain = 21.6 dB
L
L
1
1
P
O
= 2.5 W
P
O
= 0.5 W
0.1
P
O
= 1 W
0.1
P
O
= 1 W
P
O
= 2.5 W
0.01
P
O
= 5 W
0.01
0.005
20
100
20
100
1 k
10 k 20 k
1 k
10 k 20 k
f − Frequency − Hz
f − Frequency − Hz
Figure 3.
Figure 4.
TOTAL HARMONIC DISTORTION + NOISE
TOTAL HARMONIC DISTORTION + NOISE
vs
vs
OUTPUT POWER
OUTPUT POWER
20
10
10
V
= 12 V,
V
= 18 V,
CC
CC
R = 8 W,
R = 16 W,
L
L
Gain = 21.6 dB
Gain = 21.6 dB
1
1
1 kHz
0.1
1 kHz
0.1
20 kHz
20 Hz
20 kHz
20 Hz
0.01
0.01
20m
100 m 200 m
1
2
10 20
20m
100 m 200 m
1
2
10 20
P
− Output Power − W
P
− Output Power − W
O
O
Figure 5.
Figure 6.
8
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TPA3008D2
SLOS435A–MAY 2004–REVISED JULY 2004
OUTPUT POWER
vs
SUPPLY VOLTAGE
CLOSED-LOOP RESPONSE
40
12
11
10
9
R = 16 W
L
150
100
50
36
32
28
24
20
16
12
8
THD+N = 10%
Gain
8
7
Phase
0
6
5
THD+N = 1%
−50
4
3
V
= 12 V,
CC
−100
−150
R = 8 Ω,
Gain = 32 dB
33 kHz, RC LPF
L
2
4
1
0
0
10
100
1k
10k
80k
10 11 12 13 14 15 16 17 18
8
9
V
CC
− Supply Voltage − V
f − Frequency − Hz
Figure 7.
Figure 8.
OUTPUT POWER
vs
SUPPLY VOLTAGE
EFFICIENCY
vs
OUTPUT POWER
12
100
V
CC
= 18 V,
R = 8 W
L
R = 16 W
L
11
10
90
80
9
8
7
70
60
50
THD+N = 10%
6
5
4
3
40
30
20
10
THD+N = 1%
Power represented by dashed line
may require external heatsinking
2
0
8
9
10
11
12
13
14
0
1
2
3
4
5
6
7
8
9
10
V
CC
− Supply Voltage − V
P
O
− Output Power (Per Channel) − W
Figure 9.
Figure 10.
9
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TPA3008D2
SLOS435A–MAY 2004–REVISED JULY 2004
EFFICIENCY
SUPPLY CURRENT
vs
TOTAL OUTPUT POWER
vs
TOTAL OUTPUT POWER
100
90
80
70
60
50
40
30
20
10
0
2.0
1.8
1.6
LC Filter,
Resistive Load,
Stereo Operation
16 W
8 W
V
= 12 V,
R = 8 W
L
CC
1.4
1.2
1
V
CC
= 12 V,
R = 16 W
L
0.8
0.6
0.4
0.2
V
= 18 V,
CC
R = 16 W
L
V
= 12 V,
CC
LC Filter,
Resistive Load,
Stereo Operation
0
0
1
2
3
4
5
6
7
8
9
10 11 12
0
2
4
6
8
10 12 14 16 18 20
P
O
− Total Output Power − W
P
O
− Total Output Power − W
Figure 11.
Figure 12.
CROSSTALK
vs
FREQUENCY
SUPPLY RIPPLE REJECTION RATIO
vs
FREQUENCY
0
0
V
P
= 12 V,
= 2.5 W,
CC
−10
O
V
CC
= 12 V,
−10
Gain = 21.6 dB
R = 8W
V
= 200 mV ,
PP
(RIPPLE)
−20
L
R = 8 W,
L
−20
−30
−40
−50
Gain = 15.6 dB
−30
−40
−50
−60
−70
−60
−70
−80
−90
−80
−90
−100
−100
20
100
1 k
10 k 20 k
20
100
1 k
10 k 20 k
f − Frequency − Hz
f − Frequency − Hz
Figure 13.
Figure 14.
10
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TPA3008D2
SLOS435A–MAY 2004–REVISED JULY 2004
COMMON-MODE REJECTION RATIO
vs
FREQUENCY
0
V
CC
= 12 V,
Gain = 15.6 dB,
R = 8 W,
L
−10
Output Referred
−20
−30
−40
−50
−60
−70
20
100
1 k
10 k 20 k
f − Frequency − Hz
Figure 15.
11
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TPA3008D2
SLOS435A–MAY 2004–REVISED JULY 2004
APPLICATION INFORMATION
*
*
1 nF
1 nF
PVCC
220 nF
PVCC
220 nF
10 mF
0.1 mF
10 mF
0.1 mF
1 mF
Shutdown/Mute
Control
SHUTDOWN
VCLAMPR
RINN
NC
NC
Right Differential
0.47 mF
0.47 mF
0.47 mF
0.47 mF
0.47 mF
Inputs
RINP
AVCC
V2P5
AVCC
LINP
Left Differential
Inputs
NC
NC
LINN
0.1 mF
10 mF
TPA3008D2
AVDDREF
NC
AGND
AVDD
COSC
1 mF
GAIN0
GAIN1
Gain
Control
220 pF
ROSC
120 kW
Fault Reporting
AGND
FAULT
NC
VCLAMPL
1 mF
0.1 mF
0.1 mF
10 mF
1 nF
10 mF
220 nF
PVCC
220 nF
PVCC
1 nF
*
*
*
Chip ferrite bead (example: Fair-Rite 251206700743) shown for EMI suppression.
Figure 16. Stereo Class-D With Differential Inputs
12
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TPA3008D2
SLOS435A–MAY 2004–REVISED JULY 2004
APPLICATION INFORMATION (continued)
CLASS-D OPERATION
This section focuses on the class-D operation of the TPA3008D2.
Traditional Class-D Modulation Scheme
The traditional class-D modulation scheme, which is used in the TPA032D0x family, has a differential output
where each output is 180 degrees out of phase and changes from ground to the supply voltage, VCC. Therefore,
the differential prefiltered output varies between positive and negative VCC, where filtered 50% duty cycle yields
0 V across the load. The traditional class-D modulation scheme with voltage and current waveforms is shown in
Figure 17. Note that even at an average of 0 V across the load (50% duty cycle), the current to the load is high,
causing high loss and thus causing a high supply current.
OUTP
OUTN
+12 V
Differential Voltage
0 V
Across Load
−12 V
Current
Figure 17. Traditional Class-D Modulation Scheme's Output Voltage and Current Waveforms Into an
Inductive Load With No Input
TPA3008D2 Modulation Scheme
The TPA3008D2 uses a modulation scheme that still has each output switching from 0 to the supply voltage.
However, OUTP and OUTN are now in phase with each other with no input. The duty cycle of OUTP is greater
than 50% and OUTN is less than 50% for positive output voltages. The duty cycle of OUTP is less than 50% and
OUTN is greater than 50% for negative output voltages. The voltage across the load sits at 0 V throughout most
of the switching period, greatly reducing the switching current, which reduces any I2R losses in the load.
13
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TPA3008D2
SLOS435A–MAY 2004–REVISED JULY 2004
APPLICATION INFORMATION (continued)
OUTP
OUTN
Output = 0 V
Differential
+12 V
Voltage
0 V
Across
−12 V
Load
Current
OUTP
OUTN
Output > 0 V
Differential
Voltage
Across
Load
+12 V
0 V
−12 V
Current
Figure 18. The TPA3008D2 Output Voltage and Current Waveforms Into an Inductive Load
Efficiency: LC Filter Required With the Traditional Class-D Modulation Scheme
The main reason that the traditional class-D amplifier needs an output filter is that the switching waveform results
in maximum current flow. This causes more loss in the load, which causes lower efficiency. The ripple current is
large for the traditional modulation scheme, because the ripple current is proportional to voltage multiplied by the
time at that voltage. The differential voltage swing is 2 x VCC, and the time at each voltage is half the period for
the traditional modulation scheme. An ideal LC filter is needed to store the ripple current from each half cycle for
the next half cycle, while any resistance causes power dissipation. The speaker is both resistive and reactive,
whereas an LC filter is almost purely reactive.
The TPA3008D2 modulation scheme has little loss in the load without a filter because the pulses are short and
the change in voltage is VCC instead of 2 x VCC. As the output power increases, the pulses widen, making the
ripple current larger. Ripple current could be filtered with an LC filter for increased efficiency, but for most
applications the filter is not needed.
An LC filter with a cutoff frequency less than the class-D switching frequency allows the switching current to flow
through the filter instead of the load. The filter has less resistance than the speaker, which results in less power
dissipation, therefore increasing efficiency.
14
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TPA3008D2
SLOS435A–MAY 2004–REVISED JULY 2004
APPLICATION INFORMATION (continued)
Effects of Applying a Square Wave Into a Speaker
Audio specialists have advised for years not to apply a square wave to speakers. If the amplitude of the
waveform is high enough and the frequency of the square wave is within the bandwidth of the speaker, the
square wave could cause the voice coil to jump out of the air gap and/or scar the voice coil. A 250-kHz switching
frequency, however, does not significantly move the voice coil, as the cone movement is proportional to 1/f2 for
frequencies beyond the audio band.
Damage may occur if the voice coil cannot handle the additional heat generated from the high-frequency
switching current. The amount of power dissipated in the speaker may be estimated by first considering the
overall efficiency of the system. If the on-resistance (rds(on)) of the output transistors is considered to cause the
dominant loss in the system, then the maximum theoretical efficiency for the TPA3008D2 with an 8-Ω load is as
follows:
R
8
L
Efficiency (theoretical, %) +
100% +
100% + 86%
(8 ) 1.3)
ǒ
ds(on)Ǔ
R ) r
L
(1)
The maximum measured output power is approximately 8.5 W with an 12-V power supply. The total theoretical
power supplied (P(total)) for this worst-case condition would therefore be as follows:
P
O
8.5 W
0.86
P
+
+
+ 9.88 W
(total)
Efficiency
(2)
The efficiency measured in the lab using an 8-Ω speaker was 81%. The power not accounted for as dissipated
across the rDS(on) may be calculated by simply subtracting the theoretical power from the measured power:
Other losses
P
(measured)
P
(theoretical)
10.49
9.88
0.61 W
(total)
(total)
(3)
The quiescent supply current at 12 V is measured to be 22 mA. It can be assumed that the quiescent current
encapsulates all remaining losses in the device, i.e., biasing and switching losses. It may be assumed that any
remaining power is dissipated in the speaker and is calculated as follows:
P
0.61 W
(12 V 22 mA)
0.35 W
(dis)
(4)
Note that these calculations are for the worst-case condition of 8.5 W delivered to the speaker. Because the 0.35
W is only 4% of the power delivered to the speaker, it may be concluded that the amount of power actually
dissipated in the speaker is relatively insignificant. Furthermore, this power dissipated is well within the
specifications of most loudspeaker drivers in a system, as the power rating is typically selected to handle the
power generated from a clipping waveform.
When to Use an Output Filter for EMI Suppression
Design the TPA3008D2 without the filter if the traces from amplifier to speaker are short (< 50 cm). Powered
speakers, where the speaker is in the same enclosure as the amplifier, is a typical application for class-D without
a filter.
Most applications require a ferrite bead filter. The ferrite filter reduces EMI around 1 MHz and higher (FCC and
CE only test radiated emissions greater than 30 MHz). When selecting a ferrite bead, choose one with high
impedance at high frequencies, but low impedance at low frequencies.
Use a LC output filter if there are low frequency (<1 MHz) EMI-sensitive circuits and/or there are long wires from
the amplifier to the speaker.
When both an LC filter and a ferrite bead filter are used, the LC filter should be placed as close as possible to
the IC followed by the ferrite bead filter.
15
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TPA3008D2
SLOS435A–MAY 2004–REVISED JULY 2004
APPLICATION INFORMATION (continued)
33 µH
OUTP
C
2
L
1
C
1
0.1 µF
0.47 µF
33 µH
OUTN
C
3
L
2
0.1 µF
Figure 19. Typical LC Output Filter, Cutoff Frequency of 27 kHz, Speaker Impedance = 8 Ω
Ferrite
Chip Bead
OUTP
1 nF
Ferrite
Chip Bead
OUTN
1 nF
Figure 20. Typical Ferrite Chip Bead Filter (Chip bead example: Fair-Rite 2512067007Y3)
Gain setting via GAIN0 and GAIN1 inputs
The gain of the TPA3008D2 is set by two input terminals, GAIN0 and GAIN1.
The gains listed in Table 1 are realized by changing the taps on the input resistors inside the amplifier. This
causes the input impedance (Zi) to be dependent on the gain setting. The actual gain settings are controlled by
ratios of resistors, so the gain variation from part-to-part is small. However, the input impedance may shift by
20% due to shifts in the actual resistance of the input resistors.
For design purposes, the input network (discussed in the next section) should be designed assuming an input
impedance of 26 kΩ, which is the absolute minimum input impedance of the TPA3008D2. At the lower gain
settings, the input impedance could increase as high as 165 kΩ
Table 1. Gain Setting
INPUT IMPEDANCE
AMPLIFIER GAIN (dB)
(kΩ)
TYP
137
88
GAIN1
GAIN0
TYP
15.3
21.2
27.2
31.8
0
0
1
1
0
1
0
1
52
33
INPUT RESISTANCE
Each gain setting is achieved by varying the input resistance of the amplifier that can range from its smallest
value, 33 kΩ, to the largest value, 137 kΩ. As a result, if a single capacitor is used in the input high-pass filter,
the -3 dB or cutoff frequency changes when changing gain steps.
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TPA3008D2
SLOS435A–MAY 2004–REVISED JULY 2004
Z
f
C
i
Z
i
IN
Input
Signal
The -3-dB frequency can be calculated using Equation 5. Use Table 1 for Zi values.
1
f +
2p Z C
i
i
(5)
INPUT CAPACITOR, CI
In the typical application, an input capacitor (Ci) is required to allow the amplifier to bias the input signal to the
proper dc level for optimum operation. In this case, Ci and the input impedance of the amplifier (Zi) form a
high-pass filter with the corner frequency determined in Equation 6.
−3 dB
1
f
+
c
2pZ C
i
i
f
c
(6)
The value of Ci is important, as it directly affects the bass (low-frequency) performance of the circuit. Consider
the example where Zi is 137 kΩ and the specification calls for a flat bass response down to 20 Hz. Equation 6 is
reconfigured as Equation 7.
1
C +
i
2pZ f
c
i
(7)
In this example, Ci is 58 nF; so, one would likely choose a value of 0.1 µF as this value is commonly used. If the
gain is known and is constant, use Zi from Table 1 to calculate Ci. A further consideration for this capacitor is the
leakage path from the input source through the input network (Ci) and the feedback network to the load. This
leakage current creates a dc offset voltage at the input to the amplifier that reduces useful headroom, especially
in high gain applications. For this reason, a low-leakage tantalum or ceramic capacitor is the best choice. When
polarized capacitors are used, the positive side of the capacitor should face the amplifier input in most
applications as the dc level there is held at 2.5 V, which is likely higher than the source dc level. Note that it is
important to confirm the capacitor polarity in the application.
For the best pop performance, CI should be less than or equal to 1µF.
Power Supply Decoupling,CS
The TPA3008D2 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling
to ensure that the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also
prevents oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is
achieved by using two capacitors of different types that target different types of noise on the power supply leads.
For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR)
ceramic capacitor, typically 0.1 µF placed as close as possible to the device VCC lead works best. For filtering
lower frequency noise signals, a larger aluminum electrolytic capacitor of 10 µF or greater placed near the audio
power amplifier is recommended. The 10-µF capacitor also serves as local storage capacitor for supplying
current during large signal transients on the amplifier outputs.
17
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TPA3008D2
SLOS435A–MAY 2004–REVISED JULY 2004
BSN and BSP Capacitors
The full H-bridge output stages use only NMOS transistors. Therefore, they require bootstrap capacitors for the
high side of each output to turn on correctly. A 220-nF ceramic capacitor, rated for at least 25 V, must be
connected from each output to its corresponding bootstrap input. Specifically, one 220-nF capacitor must be
connected from xOUTP to xBSP, and one 220-nF capacitor must be connected from xOUTN to xBSN. (See the
The bootstrap capacitors connected between the BSxx pins and corresponding output function as a floating
power supply for the high-side N-channel power MOSFET gate drive circuitry. During each high-side switching
cycle, the bootstrap capacitors hold the gate-to-source voltage high enough to keep the high-side MOSFETs
turned on.
VCLAMP Capacitors
To ensure that the maximum gate-to-source voltage for the NMOS output transistors is not exceeded, two
internal regulators clamp the gate voltage. Two 1-µF capacitors must be connected from VCLAMPL (pin 25) and
VCLAMPR (pin 36) to ground and must be rated for at least 25 V. The voltages at the VCLAMP terminals vary
with VCC and may not be used for powering any other circuitry.
Internal Regulated 5-V Supply (AVDD
)
The AVDD terminal (pin 29) is the output of an internally generated 5-V supply, used for the oscillator,
preamplifier, and volume control circuitry. It requires a 1-µF capacitor, placed close to the pin, to keep the
regulator stable.
This regulated voltage can be used to control GAIN0 and GAIN1 terminals, but should not be used to drive
external circuitry.
Differential Input
The differential input stage of the amplifier cancels any noise that appears on both input lines of the channel. To
use the TPA3008D2 with a differential source, connect the positive lead of the audio source to the INP input and
the negative lead from the audio source to the INN input. To use the TPA3008D2 with a single-ended source, ac
ground the INP or INN input through a capacitor equal in value to the input capacitor on INN or INP and apply
the audio source to either input. In a single-ended input application, the unused input should be ac grounded at
the audio source instead of at the device input for best noise performance.
SHUTDOWN OPERATION
The TPA3008D2 employs a shutdown mode of operation designed to reduce supply current (ICC) to the absolute
minimum level during periods of nonuse for power conservation. The SHUTDOWN input terminal should be held
high (see specification table for trip point) during normal operation when the amplifier is in use. Pulling
SHUTDOWN low causes the outputs to mute and the amplifier to enter a low-current state. Never leave
SHUTDOWN unconnected, because amplifier operation would be unpredictable.
For the best power-off pop performance, place the amplifier in the shutdown mode prior to removing the power
supply voltage.
USING LOW-ESR CAPACITORS
Low-ESR capacitors are recommended throughout this application section. A real (as opposed to ideal) capacitor
can be modeled simply as a resistor in series with an ideal capacitor. The voltage drop across this resistor
minimizes the beneficial effects of the capacitor in the circuit. The lower the equivalent value of this resistance,
the more the real capacitor behaves like an ideal capacitor.
18
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TPA3008D2
SLOS435A–MAY 2004–REVISED JULY 2004
SHORT-CIRCUIT PROTECTION AND AUTOMATIC RECOVERY FEATURE
The TPA3008D2 has short-circuit protection circuitry on the outputs that prevents damage to the device during
output-to-output shorts, output-to-GND shorts, and output-to-VCC shorts. When a short circuit is detected on the
outputs, the part immediately disables the output drive. This is a latched fault and must be reset by cycling the
voltage on the SHUTDOWN pin to a logic low and back to the logic high state for normal operation. This clears
the short-circuit flag and allows for normal operation if the short was removed. If the short was not removed, the
protection circuitry again activates.
The fault terminal can be used for automatic recovery from a short-circuit event, or used to monitor the status
with an external GPIO.
THERMAL PROTECTION
Thermal protection on the TPA3008D2 prevents damage to the device when the internal die temperature
exceeds 150°C. There is a ±15 degree tolerance on this trip point from device to device. Once the die
temperature exceeds the thermal set point, the device enters into the shutdown state and the outputs are
disabled. This is not a latched fault. The thermal fault is cleared once the temperature of the die is reduced by
20°C. The device begins normal operation at this point with no external system interaction.
PRINTED-CIRCUIT BOARD (PCB) LAYOUT
Because the TPA3008D2 is a class-D amplifier that switches at a high frequency, the layout of the printed-circuit
board (PCB) should be optimized according to the following guidelines for the best possible performance.
•
Decoupling capacitors—The high-frequency 0.1-µF decoupling capacitors should be placed as close to the
PVCC (pins 14, 15, 22, 23, 38, 39, 46, and 47) and AVCC (pin 33) terminals as possible. The V2P5 (pin 4)
capacitor, AVDD (pin 29) capacitor, and VCLAMP (pins 25 and 36) capacitor should also be placed as close
to the device as possible. Large (10 µF or greater) bulk power supply decoupling capacitors should be
placed near the TPA3008D2 on the PVCCL, PVCCR, and AVCC terminals.
•
Grounding—The AVCC (pin 33) decoupling capacitor, AVDD (pin 29) capacitor, V2P5 (pin 4) capacitor, COSC
(pin 28) capacitor, and ROSC (pin 27) resistor should each be grounded to analog ground (AGND, pins 26
and 30). The PVCC decoupling capacitors should each be grounded to power ground (PGND, pins 18, 19,
42, and 43). Analog ground and power ground may be connected at the PowerPAD, which should be used
as a central ground connection or star ground for the TPA3008D2. Basically, an island should be created
with a single connection to PGND at the PowerPAD.
•
•
Output filter—The ferrite EMI filter (Figure 20) should be placed as close to the output terminals as possible
for the best EMI performance. The LC filter (Figure 19) should be placed close to the outputs. The capacitors
used in both the ferrite and LC filters should be grounded to power ground. If both filters are used, the LC
filter should be placed first, following the outputs.
PowerPAD—The PowerPAD must be soldered to the PCB for proper thermal performance and optimal
reliability. The dimensions of the PowerPAD thermal land should be 5 mm by 5 mm (197 mils by 197 mils).
The PowerPAD size measures 4,55 x 4,55 mm. Four rows of solid vias (four vias per row, 0,3302 mm or 13
mils diameter) should be equally spaced underneath the thermal land. The vias should connect to a solid
copper plane, either on an internal layer or on the bottom layer of the PCB. The vias must be solid vias, not
thermal relief or webbed vias. For additional information, see the PowerPAD Thermally Enhanced Package
application note, (SLMA002).
For an example layout, see the TPA3008D2 Evaluation Module (TPA3008D2EVM) User Manual, (SLOU165).
Both the EVM user manual and the PowerPAD application note are available on the TI Web site at
19
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TPA3008D2
SLOS435A–MAY 2004–REVISED JULY 2004
BASIC MEASUREMENT SYSTEM
This application note focuses on methods that use the basic equipment listed below:
•
•
•
•
•
•
•
•
•
Audio analyzer or spectrum analyzer
Digital multimeter (DMM)
Oscilloscope
Twisted-pair wires
Signal generator
Power resistor(s)
Linear regulated power supply
Filter components
EVM or other complete audio circuit
Figure 21 shows the block diagrams of basic measurement systems for class-AB and class-D amplifiers. A sine
wave is normally used as the input signal because it consists of the fundamental frequency only (no other
harmonics are present). An analyzer is then connected to the APA output to measure the voltage output. The
analyzer must be capable of measuring the entire audio bandwidth. A regulated dc power supply is used to
reduce the noise and distortion injected into the APA through the power pins. A System Two audio measurement
system (AP-II) (Reference 1) by Audio Precision includes the signal generator and analyzer in one package.
The generator output and amplifier input must be ac-coupled. However, the EVMs already have the ac-coupling
capacitors, (CIN), so no additional coupling is required. The generator output impedance should be low to avoid
attenuating the test signal, and is important because the input resistance of APAs is not high. Conversely, the
analyzer-input impedance should be high. The output impedance, ROUT, of the APA is normally in the hundreds
of milliohms and can be ignored for all but the power-related calculations.
Figure 21(a) shows a class-AB amplifier system. It takes an analog signal input and produces an analog signal
output. This amplifier circuit can be directly connected to the AP-II or other analyzer input.
This is not true of the class-D amplifier system shown in Figure 21(b), which requires low-pass filters in most
cases in order to measure the audio output waveforms. This is because it takes an analog input signal and
converts it into a pulse-width modulated (PWM) output signal that is not accurately processed by some
analyzers.
20
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TPA3008D2
SLOS435A–MAY 2004–REVISED JULY 2004
Power Supply
Analyzer
20 Hz − 20 kHz
Signal
Generator
APA
RL
(a) Basic Class−AB
Power Supply
Class-D APA
Low-Pass RC
Filter
RL(A)
Analyzer
20 Hz − 20 kHz
Signal
Generator
Low-Pass RC
Filter
(b) Filter-Free and Traditional Class-D
(A)
For efficiency measurements with filter-free class-D, R should be an inductive load like a speaker.
L
Figure 21. Audio Measurement Systems
The TPA3008D2 uses a modulation scheme that does not require an output filter for operation, but they do
sometimes require an RC low-pass filter when making measurements. This is because some analyzer inputs
cannot accurately process the rapidly changing square-wave output and therefore record an extremely high level
of distortion. The RC low-pass measurement filter is used to remove the modulated waveforms so the analyzer
can measure the output sine wave.
DIFFERENTIAL INPUT AND BTL OUTPUT
All of the class-D APAs and many class-AB APAs have differential inputs and bridge-tied load (BTL) outputs.
Differential inputs have two input pins per channel and amplify the difference in voltage between the pins.
Differential inputs reduce the common-mode noise and distortion of the input circuit. BTL is a term commonly
used in audio to describe differential outputs. BTL outputs have two output pins providing voltages that are 180
degrees out of phase. The load is connected between these pins. This has the added benefits of quadrupling the
output power to the load and eliminating a dc blocking capacitor.
A block diagram of the measurement circuit is shown in Figure 22. The differential input is a balanced input,
meaning the positive (+) and negative (-) pins have the same impedance to ground. Similarly, the BTL output
equates to a balanced output.
21
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TPA3008D2
SLOS435A–MAY 2004–REVISED JULY 2004
Evaluation Module
Audio Power
Amplifier
Generator
CIN
Analyzer
Low−Pass
RC Filter
RGEN
RIN
RIN
ROUT
ROUT
RANA
CANA
RL
VGEN
CIN
Low−Pass
RC Filter
RGEN
RANA
CANA
Twisted-Pair Wire
Twisted-Pair Wire
Figure 22. Differential Input, BTL Output Measurement Circuit
The generator should have balanced outputs, and the signal should be balanced for best results. An unbalanced
output can be used, but it may create a ground loop that affects the measurement accuracy. The analyzer must
also have balanced inputs for the system to be fully balanced, thereby cancelling out any common-mode noise in
the circuit and providing the most accurate measurement.
The following general rules should be followed when connecting to APAs with differential inputs and BTL outputs:
•
•
•
•
•
Use a balanced source to supply the input signal.
Use an analyzer with balanced inputs.
Use twisted-pair wire for all connections.
Use shielding when the system environment is noisy.
Ensure that the cables from the power supply to the APA, and from the APA to the load, can handle the large
currents (see Table 2).
Table 2 shows the recommended wire size for the power supply and load cables of the APA system. The real
concern is the dc or ac power loss that occurs as the current flows through the cable. These recommendations
are based on 12-inch long wire with a 20-kHz sine-wave signal at 25°C.
Table 2. Recommended Minimum Wire Size for Power Cables
DC POWER LOSS
(MW)
AC POWER LOSS
(MW)
POUT (W)
RL(Ω)
AWG Size
10
4
4
8
8
18
18
22
22
22
22
28
28
16
3.2
2
40
8
18
3.7
2.1
1.6
42
8.5
8.1
6.2
2
1
8
< 0.75
1.5
6.1
CLASS-D RC LOW-PASS FILTER
An RC filter is used to reduce the square-wave output when the analyzer inputs cannot process the pulse-width
modulated class-D output waveform. This filter has little effect on the measurement accuracy because the cutoff
frequency is set above the audio band. The high frequency of the square wave has negligible impact on
measurement accuracy because it is well above the audible frequency range, and the speaker cone cannot
respond at such a fast rate. The RC filter is not required when an LC low-pass filter is used, such as with the
class-D APAs that employ the traditional modulation scheme (TPA032D0x, TPA005Dxx).
The component values of the RC filter are selected using the equivalent output circuit as shown in Figure 23. RL
is the load impedance that the APA is driving for the test. The analyzer input impedance specifications should be
available and substituted for RANA and CANA. The filter components, RFILT and CFILT, can then be derived for the
system. The filter should be grounded to the APA near the output ground pins or at the power supply ground pin
to minimize ground loops.
22
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TPA3008D2
SLOS435A–MAY 2004–REVISED JULY 2004
Load
RC Low-Pass Filters
RFILT
AP Analyzer Input
CANA
RANA
CFILT
VL= V
IN
RL
VOUT
RFILT
CANA
RANA
CFILT
To APA
GND
Figure 23. Measurement Low-Pass Filter Derivation Circuit-Class-D APAs
The transfer function for this circuit is shown in Equation 8 where ωO = REQCEQ, REQ = RFILT || RANA and
CEQ = (CFILT + CANA). The filter frequency should be set above fMAX, the highest frequency of the measurement
bandwidth, to avoid attenuating the audio signal. Equation 9 provides this cutoff frequency, fC. The value of RFILT
must be chosen large enough to minimize current that is shunted from the load, yet small enough to minimize the
attenuation of the analyzer-input voltage through the voltage divider formed by RFILT and RANA. A rule of thumb is
that RFILT should be small (~100 Ω) for most measurements. This reduces the measurement error to less than
1% for RANA ≥ 10 kΩ.
R
ANA
ǒ Ǔ
R
)R
V
ANA
FILT
OUT
+
ǒ Ǔ
V
w
IN
1 ) jǒwOǓ
(8)
(9)
Ǹ
f
+ 2 f
C
MAX
An exception occurs with the efficiency measurements, where RFILT must be increased by a factor of ten to
reduce the current shunted through the filter. CFILT must be decreased by a factor of ten to maintain the same
cutoff frequency. See Table 3 for the recommended filter component values.
Once fC is determined and RFILT is selected, the filter capacitance is calculated using Equation 9. When the
calculated value is not available, it is better to choose a smaller capacitance value to keep fC above the minimum
desired value calculated in Equation 10.
1
C
+
FILT
2p f R
C
FILT
(10)
Table 3 shows recommended values of RFILT and CFILT based on common component values. The value of fC
was originally calculated to be 28 kHz for an fMAX of 20 kHz. CFILT, however, was calculated to be 57,000 pF, but
the nearest values of 56,000 pF and 51,000 pF were not available. A 47,000-pF capacitor was used instead, and
fC is 34 kHz, which is above the desired value of 28 kHz.
Table 3. Typical RC Measurement Filter Values
MEASUREMENT
Efficiency
RFILT
1000 Ω
100 Ω
CFILT
5,600 pF
56,000 pF
All other measurements
23
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PACKAGE OPTION ADDENDUM
26-Mar-2007
PACKAGING INFORMATION
Orderable Device
TPA3008D2PHP
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
HTQFP
PHP
48
48
48
48
250 Green (RoHS & CU NIPDAU Level-4-260C-72 HR
no Sb/Br)
TPA3008D2PHPG4
TPA3008D2PHPR
TPA3008D2PHPRG4
HTQFP
HTQFP
HTQFP
PHP
PHP
PHP
250 Green (RoHS & CU NIPDAU Level-4-260C-72 HR
no Sb/Br)
1000 Green (RoHS & CU NIPDAU Level-4-260C-72 HR
no Sb/Br)
1000 Green (RoHS & CU NIPDAU Level-4-260C-72 HR
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
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PACKAGE MATERIALS INFORMATION
5-Oct-2007
TAPE AND REEL BOX INFORMATION
Device
Package Pins
Site
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) (mm) Quadrant
(mm)
(mm)
TPA3008D2PHPR
PHP
48
SITE 60
330
16
9.6
9.6
1.5
12
16
Q2
Pack Materials-Page 1
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PACKAGE MATERIALS INFORMATION
5-Oct-2007
Device
Package
Pins
Site
Length (mm) Width (mm) Height (mm)
TPA3008D2PHPR
PHP
48
SITE 60
346.0
346.0
33.0
Pack Materials-Page 2
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improvements, and other changes to its products and services at any time and to discontinue any product or service without notice.
Customers should obtain the latest relevant information before placing orders and should verify that such information is current and
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s
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TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
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Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Amplifiers
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DSP
Applications
Audio
amplifier.ti.com
dataconverter.ti.com
dsp.ti.com
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Military
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interface.ti.com
logic.ti.com
Logic
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RFID
power.ti.com
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microcontroller.ti.com
Telephony
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Wireless
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Wireless
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