TAS5518-5152K8EVM
Evaluation Module for TAS5518 Digital Audio PWM
Processor and TAS5152 Digital Amplifier Power-Output
Stage
User's Guide
June 2006
Digital Audio & Video Products
SLEU074
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Contents
Preface ............................................................................................................................... 5
1
Overview ................................................................................................................... 7
1.1
TAS5518-5152K8EVM Features.................................................................................. 8
PCB Key Map ....................................................................................................... 9
1.2
2
System Interfaces ..................................................................................................... 11
2.1
2.2
2.3
2.4
2.5
2.6
Power Supply (PSU) Interface (J901 and J900) .............................................................. 12
PSU Control Interface (J902) .................................................................................... 13
Loudspeaker Connectors (J101–J107)......................................................................... 14
Headphone Connector (J700) ................................................................................... 15
Control Interface (J40)............................................................................................ 15
Digital Audio Interface (J60) ..................................................................................... 16
3
Protection ................................................................................................................ 17
3.1
Short-Circuit Protection and Fault-Reporting Circuitry ....................................................... 18
Fault Reporting .................................................................................................... 18
3.2
Important Notices............................................................................................................... 19
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Contents
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List of Figures
1-1
1-2
2-1
2-2
2-3
2-4
2-5
Integrated PurePath Digital™ Amplifier System ......................................................................... 8
Physical Structure for TAS5518-5152K8EVM (Rough Outline) ....................................................... 9
Recommended Power-Up Sequence.................................................................................... 12
J901 and J900 Pin Numbers ............................................................................................. 12
J902 Pin Numbers ......................................................................................................... 13
J101–J107 Pin Numbers .................................................................................................. 14
J700 Pin Numbers ......................................................................................................... 15
List of Tables
1
Related Documentation From TI........................................................................................... 6
Recommended Supply Voltages ......................................................................................... 12
J901 Pin Description....................................................................................................... 12
J900 Pin Description....................................................................................................... 13
J902 Pin Description....................................................................................................... 13
J101–J107 Pin Description................................................................................................ 14
J700 Pin Description....................................................................................................... 15
J40 Pin Description ........................................................................................................ 15
J60 Pin Description ........................................................................................................ 16
TAS5152 Warning/Error Signal Decoding .............................................................................. 18
2-1
2-2
2-3
2-4
2-5
2-6
2-7
2-8
3-1
4
List of Figures
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Preface
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Read Me First
About This Manual
This manual describes the operation of the TAS5518-5152K8EVM evaluation module (EVM) from Texas
Instruments (TI).
How to Use This Manual
This document contains the following chapters:
Chapter 1 - Overview
Chapter 2 - System Interfaces
Chapter 3 - Protection
Information About Cautions and Warnings
This manual may contain cautions and warnings.
CAUTION
This is an example of a caution statement.
A caution statement describes a situation that could potentially damage your
software or equipment.
WARNING
This is an example of a warning statement.
A warning statement describes a situation that could potentially
cause harm to you.
The information in a caution or a warning is provided for your protection. Please read each caution and
warning carefully.
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Read Me First
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Related Documentation From TI
Related Documentation From TI
Table 1 contains a list of data manuals that have detailed descriptions of the integrated circuits used in the
Table 1. Related Documentation From TI
PART NUMBER
TAS5518
LITERATURE NUMBER
SLES115
TAS5152
SLES127
TPA112
SLOS212
TPS3801K33
LM317M
SLVS219
SLVS297
TPS76733
SLVS208
Additional Documentation
q TAS5518-5152K8EVM Application Report (SLEA061)
q PC Configuration Tool for TAS5518 (TAS5518 GUI Ver. 4.0 or later)
q General application notes
Trademarks
PurePath Digital, Equibit, PowerPAD are trademarks of Texas Instruments.
6
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Chapter 1
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Overview
The TAS5518-5152K8EVM PurePath Digital™ customer evaluation amplifier module
demonstrates two audio integrated circuits, TAS5518 and TAS5152, from Texas
Instruments (TI).
The TAS5518PAG is a high-performance 32-bit (24-bit input) multichannel PurePath
Digital pulse-width modulator (PWM) based on Equibit™ technology, with a fully
symmetrical AD modulation scheme. It accepts input sample rates from 32 kHz to
192 kHz. The device also has digital audio processing (DAP) that provides 48-bit signal
processing, advanced performance, and a high level of system integration. The device
has interfaces for headphone output and power supply volume control (PSVC).
The TAS5152DKD is a compact, high-power, digital amplifier power stage designed to
drive a 4-Ω loudspeaker up to 125 W (10% THD+N). It contains integrated gate drivers,
four matched and electrically isolated enhancement-mode N-channel power DMOS
transistors, and protection/fault-reporting circuitry.
The DKD PowerPAD™ package top side allows heat transfer through a heatsink. The
heatsink in this design is for evaluation purposes only.
This EVM, together with a TI input-USB board, is a complete 7-channel digital audio
amplifier system that includes digital input (S/PDIF), analog inputs, interface to PC, and
DAP features, such as digital volume control, input and output mixers, auto mute,
equalization, tone controls, loudness, dynamic range compression, and PSVC output.
There are configuration options for stereo line level output, stereo headphone output,
and power-stage failure protection.
This 6.1 system is designed for home-theater applications, such as A/V receivers, DVD
minicomponent systems, home theater in a box (HTIB), DVD receivers, or plasma
display panels (PDPs).
Topic .................................................................................................. Page
1.1
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Overview
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TAS5518-5152K8EVM Features
1.1 TAS5518-5152K8EVM Features
•
•
•
•
•
Stereo-channel line output
Stereo headphone output
Self-contained protection system (short circuit and thermal)
Standard inter-IC sound (I2S) and inter-integrated circuit (I2C)/control connector for TI input board
Double-sided plated-through printed circuit board (PCB) layout
2-Channel
Headphone Output
TAS5518-5152K8EVM
Module
7-/8-Channel Speaker Output
6-Channel
Analog
Input
Control Interface
USB
Interface
I2C Bus
I2C Bus
Optical
and
Coaxial
S/PDIF Input
Example
TI Input-USB
Board
Power Supply
Figure 1-1. Integrated PurePath Digital™ Amplifier System
8
Overview
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PCB Key Map
1.2 PCB Key Map
PSU
CONTROL
(J902)
PSU
INTERFACE
(J900)
J108
J105
J107
J106
J104
J102
J103
J101
SPEAKER OUTPUTS
SPEAKER OUTPUTS
TAS5518
HEADPHONE
OUTPUT
(J700)
3.3V
Regulator
CONTROL
INTERFACE (J40)
INPUT SIGNAL
INTERFACE (J60)
Figure 1-2. Physical Structure for TAS5518-5152K8EVM (Rough Outline)
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Overview
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PCB Key Map
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Overview
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Chapter 2
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System Interfaces
This chapter describes the TAS5518-5152K8EVM board, with regard to power supplies
and system interfaces.
Topic .................................................................................................. Page
2.1
2.2
2.3
2.4
2.6
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System Interfaces
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Power Supply (PSU) Interface (J901 and J900)
2.1 Power Supply (PSU) Interface (J901 and J900)
The TAS5518-5152K8EVM module must be powered from external power supplies. High-end audio
performance requires a stabilized power supply, with low ripple voltage and low output impedance.
Note: The length of power-supply cable must be minimized. Increasing the length of PSU cable
is equal to increasing the distortion for the amplifier at high output levels and low
frequencies.
Maximum output-stage supply voltage depends of the speaker load resistance. Check the recommended
maximum supply voltage in the TAS5152 data sheet.
Table 2-1. Recommended Supply Voltages
VOLTAGE LIMITATIONS
CURRENT
RECOMMENDATIONS
DESCRIPTION
(4-Ω LOAD)
System power supply
15 V to 20 V
0 V to 35 V
0.3 A
6 A(1)
Output-stage power supply
(1)
The rated current corresponds to two-channel full scale (80 W each), which is adequate for a
standard eight-channel amplifier design.
the RESET signal should be kept low during power up. RESET is pulled low during power up for 200 ms
by the onboard reset generator (U73).
System Power Supply
Output-Stage Power Supply
RESET
>1 ms
Figure 2-1. Recommended Power-Up Sequence
PCB Connector
(Top View)
4
3
2
1
Figure 2-2. J901 and J900 Pin Numbers
Table 2-2. J901 Pin Description
PIN
NO.
NET NAME
AT SCHEMATICS
DESCRIPTION
1
2
3
4
PVDD
SYSTEM
GND
Output-stage power supply
System power supply
Ground
GND
Ground
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PSU Control Interface (J902)
Table 2-3. J900 Pin Description(1)
PIN
NO.
NET NAME
DESCRIPTION
AT SCHEMATICS
1
2
3
4
PVDD
PVDD
GND
Extra output-stage power supply
Extras output-state power supply
Extra ground
GND
Extra ground
(1)
Optional – Use to decrease impedance to reach better performance
2.2 PSU Control Interface (J902)
This interface is used for onboard sensing of output supply voltage and for the power supply volume
control (PSVC) signal.
PCB Connector
(Top View)
5
4
3
2
1
Figure 2-3. J902 Pin Numbers
Table 2-4. J902 Pin Description
PIN
NO.
NET NAME
AT SCHEMATICS
DESCRIPTION
1
2
3
4
5
–
Reserved for future use
Sense of output power supply
Ground
PVDD
GND
RESET
PSVC
System reset (bidirectional)
Power supply volume control
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Loudspeaker Connectors (J101–J107)
2.3 Loudspeaker Connectors (J101–J107)
CAUTION
Both positive and negative speaker outputs are floating and may not be
connected to ground (e.g., through an oscilloscope).
PCB Connector
(Top View)
2
1
Figure 2-4. J101–J107 Pin Numbers
Table 2-5. J101–J107 Pin Description
PIN
NO.
NET NAME
AT SCHEMATICS
DESCRIPTION
1
2
OUT-1
OUT-2
Speaker negative output
Speaker positive output
14
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Headphone Connector (J700)
2.4 Headphone Connector (J700)
PCB Connector
(Top View)
1
2
3
4
Figure 2-5. J700 Pin Numbers
Table 2-6. J700 Pin Description
PIN
NO.
NET NAME
AT SCHEMATICS
DESCRIPTION
1
2
3
4
OUT-R
GND
–
Right headphone output
Ground
Reserved
OUT-L
Left headphone output
2.5 Control Interface (J40)
This interface connects the TAS5518-5152K8EVM board to a TI input-USB board.
Table 2-7. J40 Pin Description
NET NAME
AT SCHEMATICS
PIN NO.
DESCRIPTION
1, 3, 11, 17,
25, 26, 31, 32
GND
Ground
2, 8, 9,
13–16, 18,
19, 27–30
–
Reserved
4
RESET
Backend error (or soft reset). Provides reduced click and pop reset, without resetting I2C
volume register settings.
5
BKND-ERR
6
7
MUTE
PDN
SDA
SCL
Ramp volume from any setting to noiseless soft mute. Mute also can be activated by I2C.
Power down. The TAS5518 goes to power-down state when activated.
10
12
I2C data clock
I2C bit clock
Shutdown reporting. Activated if one or more TAS5152 has high current or high temperature
20
21
22
23
SD
SD
Shutdown reporting. Activated if one or more TAS5152 has high current or high temperature
Overtemperature warning. Activated if one or more TAS5152 has reached temperature
warning level.
OTW
OTW
Overtemperature warning. Activated if one or more TAS5152 has reached temperature
warning level. Pin 23 connected to pin 22.
Headphone select. Headphone active when LOW and inactive when HIGH. To use this pin, a
100-Ω resistor must be placed for R50.
24
HP-SEL
5 V
33, 34
5-V dc power supply (output)
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Digital Audio Interface (J60)
2.6 Digital Audio Interface (J60)
The digital audio interface contains digital audio signal data (I2S), clocks, etc. Please refer to the TAS5518
Data Manual for signal timing and details not covered in this document.
Table 2-8. J60 Pin Description
NET NAME
PIN
AT
DESCRIPTION
NO.
SCHEMATICS
1, 3, 10,
12, 14, 16
GND
Ground
Master clock input. Low-jitter system clock for PWM generation and reclocking. Ground connection
from source to the TAS5518 must be a low-impedance connection.
2
MCLK
3
GND
SDIN1
SDIN2
SDIN3
SDIN4
—
Ground
4
I2S data 1, channel 1 and 2
I2S data 2, channel 3 and 4
I2S data 3, channel 5 and 6
I2S data 4, channel 7 and 8
Reserved
5
6
7
8, 9, 15
11
SCLK
LRCLK
I2S bit clock
I2S left-right clock
13
16
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Chapter 3
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Protection
This section describes the short-circuit protection and fault-reporting circuitry of the
TAS5152 device.
Topic .................................................................................................. Page
3.1
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Short-Circuit Protection and Fault-Reporting Circuitry
3.1 Short-Circuit Protection and Fault-Reporting Circuitry
The TAS5152 is a self-protecting device that provides fault reporting (including high-temperature
protection and short-circuit protection). The TAS5152 is configured in back-end auto-recovery mode and,
therefore, resets automatically after all errors (M1, M2, and M3 are set low). This means that the device
restarts itself after an error and reports shortly through the SD error signal.
3.2 Fault Reporting
The OTW and SD outputs from the TAS5152 indicate fault conditions. Please refer to the TAS5152 Data
Manual for a description of these pins.
Table 3-1. TAS5152 Warning/Error Signal Decoding
OTW
SD
0
DEVICE CONDITION
High-temperature error and/or high-current error
High-temperature warning
0
0
1
1
1
0
Undervoltage lockout or high-current error
Normal operation, no errors/warnings
1
The temperature warning signals at the TAS5518-5152K8EVM board are wired-OR to one temperature
warning signal (OTW– pin 22 in the control interface connector). Shutdown signals are wired-OR into one
shutdown signal (SD– pin 20 in the control interface connector).
The shutdown signals will activate with the temperature warning signal to give chip-state information as
18
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EVALUATION BOARD/KIT IMPORTANT NOTICE
Texas Instruments (TI) provides the enclosed product(s) under the following conditions:
This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION
PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the
product(s) must have electronics training and observe good engineering practice standards. As such, the goods being provided are
not intended to be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations,
including product safety and environmental measures typically found in end products that incorporate such semiconductor
components or circuit boards. This evaluation board/kit does not fall within the scope of the European Union directives regarding
electromagnetic compatibility, restricted substances (RoHS), recycling (WEEE), FCC, CE or UL, and therefore may not meet the
technical requirements of these directives or other related directives.
Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30
days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY
SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING
ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE.
The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all
claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to
take any and all appropriate precautions with regard to electrostatic discharge.
EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER
FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.
TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not exclusive.
TI assumes no liability for applications assistance, customer product design, software performance, or infringement of
patents or services described herein.
Please read the User’s Guide and, specifically, the Warnings and Restrictions notice in the User’s Guide prior to handling the
product. This notice contains important safety information about temperatures and voltages. For additional information on TI’s
environmental and/or safety programs, please contact the TI application engineer or visit www.ti.com/esh.
No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, or
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FCC Warning
This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION
PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. It generates, uses, and
can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15
of FCC rules, which are designed to provide reasonable protection against radio frequency interference. Operation of this
equipment in other environments may cause interference with radio communications, in which case the user at his own expense
will be required to take whatever measures may be required to correct this interference.
EVM WARNINGS AND RESTRICTIONS
It is important to operate this EVM within the input voltage range of 0-35 V and the output voltage range of 15-20 V.
Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are
questions concerning the input range, please contact a TI field representative prior to connecting the input power.
Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the
EVM. Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the load
specification, please contact a TI field representative.
During normal operation, some circuit components may have case temperatures greater than 75°C. The EVM is designed to
operate properly with certain components above 75°C as long as the input and output ranges are maintained. These components
include but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types of
devices can be identified using the EVM schematic located in the EVM User's Guide. When placing measurement probes near
these devices during operation, please be aware that these devices may be very warm to the touch.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2006, Texas Instruments Incorporated
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