TZA3046
Fiber Channel/Gigabit Ethernet transimpedance amplifier
Rev. 01 — 19 May 2006
Product data sheet
1. General description
The TZA3046 is a transimpedance amplifier with Automatic Gain Control (AGC), designed
to be used in Fiber Channel/Gigabit Ethernet (FC/GE) fiber optic links. It amplifies the
current generated by a photo detector (PIN diode or avalanche photodiode) and converts
it to a differential output voltage. It offers a current mirror of average photo current for
RSSI monitoring to be used in SFF-8472 compliant modules.
The low noise characteristics makes it suitable for FC/GE applications, but also for
FTTx applications.
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken
during transport and handling.
2. Features
I Low equivalent input noise current, typically 126 nA (RMS)
I Wide dynamic range, typically 2.5 µA to 1.7 mA (p-p)
I Differential transimpedance of 7.5 kΩ (typical)
I Bandwidth from DC to 1050 MHz (typical)
I Differential outputs
I On-chip AGC with possibility of external control
I Single supply voltage 3.3 V, range 2.97 V to 3.6 V
I Bias voltage for PIN diode
I On-chip current mirror of average photo current for RSSI monitoring
I Identical ports available on both sides of die for easy bond layout and RF polarity
selection
3. Applications
I Digital fiber optic receiver modules in telecommunications transmission systems, in
high-speed data networks or in FTTx systems.
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Fiber Channel/Gigabit Ethernet transimpedance amplifier
6. Pinning information
6.1 Pinning
3
2
1
V
4
5
17
16
V
CC
CC
IDREF_MON
AGC
IDREF_MON
AGC
6
15
TZA3046
OUTQ
OUT
7
14
OUT
8
13
OUTQ
GND
GND
9
12
GND
10
11
GND
001aae512
Fig 2. Pin configuration
6.2 Pin description
Table 2:
Bonding pad description
Symbol
Pad
X
Y
Type
Description
DREF
1
−493.6 140
output
bias voltage output for PIN diode; connect cathode of PIN diode to
pad 1 or pad 3
IPHOTO
DREF
2
3
−493.6
0
input
current input; anode of PIN diode should be connected to this pad
−493.6 −140
output
bias voltage output for PIN diode; connect cathode of PIN diode to
pad 1 or pad 3
VCC
4
5
−353.6 −278.6 supply
supply voltage; connect supply voltage to pad 4 or pad 17
IDREF_MON
−213.6 −278.6 output
current output for RSSI measurements; connect a resistor to pad 5
or pad 16 and ground
AGC
OUTQ
OUT
6
7
8
9
−73.6
66.4
−278.6 input
−278.6 output
−278.6 output
−278.6 ground
AGC voltage; use pad 6 or pad 15
data output; complement of pad OUT; use pad 7 or pad 13
data output; use pad 8 or pad 14 [1]
206.4
346.4
GND
ground; connect together pads 9, 10, 11 and pad 12 as many as
possible
GND
10
486.4
−278.6 ground
ground; connect together pads 9, 10, 11 and pad 12 as many as
possible
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Fiber Channel/Gigabit Ethernet transimpedance amplifier
Table 2:
Bonding pad description …continued
Bonding pad locations with respect to the center of the die (see Figure 10); X and Y are in µm.
Symbol
Pad
X
Y
Type
Description
GND
11
486.4
278.6
ground
ground; connect together pads 9, 10, 11 and pad 12 as many as
possible
GND
12
346.4
278.6
ground
ground; connect together pads 9, 10, 11 and pad 12 as many as
possible
OUTQ
OUT
13
14
15
206.4
66.4
278.6
278.6
278.6
output
output
input
data output; complement of pad OUT; use pad 7 or pad 13
data output; use pad 8 or pad 14 [1]
AGC
−73.6
AGC voltage; use pad 6 or pad 15
IDREF_MON 16
−213.6 278.6
output
current output for RSSI measurements; connect a resistor to pad 5
or pad 16 and ground
VCC 17
−353.6 278.6
supply
supply voltage; connect supply voltage to pad 4 or pad 17
[1] These pads go HIGH when current flows into pad IPHOTO.
7. Functional description
The TZA3046 is a TransImpedance Amplifier (TIA) intended for use in fiber optic receivers
for signal recovery in FC/GE or FTTx applications. It amplifies the current generated by a
photo detector (PIN diode or avalanche photodiode) and converts it to a differential output
voltage.
The most important characteristics of the TZA3046 are high receiver sensitivity, wide
dynamic range and large bandwidth. Excellent receiver sensitivity is achieved by
minimizing transimpedance amplifier noise.
The TZA3046 has a wide dynamic range to handle the signal current generated by the
PIN diode which can vary from 2.5 µA to 1.7 mA (p-p). This is implemented by an AGC
loop which reduces the preamplifier feedback resistance so that the amplifier remains
linear over the whole input range. The AGC loop hold capacitor is integrated on-chip, so
an external capacitor is not required.
The bandwidth of TZA3046 is optimized for FC/GE application. It works from DC onward
due to the absence of offset control loops. Therefore the amount of Consecutive Identical
Digits (CID) will not effect the output waveform. A differential amplifier converts the output
of the preamplifier to a differential voltage.
7.1 PIN diode connections
The performance of an optical receiver is largely determined by the combined effect of the
transimpedance amplifier and the PIN diode. In particular, the method used to connect the
PIN diode to the input (pad IPHOTO) and the layout around the input pad strongly
influences the main parameters of a transimpedance amplifier, such as sensitivity,
bandwidth, and PSRR.
Sensitivity is most affected by the value of the total capacitance at the input pad.
Therefore, to obtain the highest possible sensitivity the total capacitance should be as low
as possible.
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Fiber Channel/Gigabit Ethernet transimpedance amplifier
The parasitic capacitance can be minimized through:
1. Reducing the capacitance of the PIN diode. This is achieved by proper choice of PIN
diode and typically a high reverse voltage.
2. Reducing the parasitics around the input pad. This is achieved by placing the PIN
diode as close as possible to the TIA.
diode biased positively, using the on-chip bias pad DREF. The voltage at DREF is derived
from VCC by a low-pass filter comprising internal resistor RDREF and external capacitor C2
which decouples any supply voltage noise. The value of external capacitor C2 affects the
value of PSRR and should have a minimum value of 470 pF. Increasing this value
improves the value of PSRR. The current through RDREF is measured and sourced at pad
If the biasing for the PIN diode is done external to the IC, pad DREF can be left
be used. In this configuration, the direction of the signal current is reversed to that shown
achieve the best sensitivity.
For maximum freedom on bonding location, 2 outputs are available for DREF (pads 1
and 3). These are internally connected. Both outputs can be used if necessary. If only one
is used, the other can be left open.
V
CC
V
CC
4 or 17
4 or 17
R
DREF
DREF 1 or 3
R
DREF
DREF 1 or 3
290 Ω
I
290 Ω
PIN
C2
470 pF
IPHOTO
2
IPHOTO
2
I
PIN
TZA3046
TZA3046
negative
001aae513
bias voltage
001aae514
Fig 3. The PIN diode connected between
the input and pad DREF
Fig 4. The PIN diode connected between
the input and a negative supply
voltage
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Fiber Channel/Gigabit Ethernet transimpedance amplifier
7.2 Automatic gain control
The TZA3046 transimpedance amplifier can handle input currents from 2.5 µA to 1.7 mA
which is equivalent to a dynamic range of 56 dB (electrical equivalent with 28 dB optical).
At low input currents, the transimpedance must be high to obtain enough output voltage,
and the noise should be low enough to guarantee a minimum bit error rate. At high input
currents however, the transimpedance should be low to prevent excessive distortion at the
output stage. To achieve the dynamic range, the gain of the amplifier depends on the level
of the input signal. This is achieved in the TZA3046 by an AGC loop.
The AGC loop comprises a peak detector and a gain control circuit. The peak detector
detects the amplitude of the signal and stores it in a hold capacitor. The hold capacitor
voltage is compared to a threshold voltage. The AGC is only active when the input signal
level is larger than the threshold level and is inactive when the input signal is smaller than
the threshold level.
When the AGC is inactive, the transimpedance is at its maximum. When the AGC is
active, the feedback resistor value of the transimpedance amplifier is reduced, reducing its
as function of the input current.
To reduce sensitivity to offsets and output loads, the AGC detector senses the output just
001aae515
001aae516
10
3.5
V
AGC
(V)
transimpedance
(kΩ)
2.5
1
1.5
0.5
−1
10
2
3
4
2
3
4
1
10
10
10
10
1
10
10
10
10
I
(µA)
I
(µA)
PIN
PIN
Fig 5. Transimpedance as function of the PIN diode
current
Fig 6. AGC voltage as function of the PIN diode
current
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Fiber Channel/Gigabit Ethernet transimpedance amplifier
For applications where the transimpedance is controlled by the TIA it is advised to leave
the AGC pads unconnected to achieve fast attack and decay times.
The AGC function can be overruled by applying a voltage to pad AGC. In this
configuration, connecting pad AGC to ground gives maximum transimpedance and
AGC voltage should be derived from the VCC for proper functioning.
For maximum freedom on bonding location, 2 pads are available for AGC (pads 6 and 15).
These pads are internally connected. Both pads can be used if necessary.
001aae517
10
transimpedance
(kΩ)
1
−1
10
0.3
0.5
0.7
0.9
V
/V
AGC CC
Fig 7. Transimpedance as function of the AGC voltage
7.3 Monitoring RSSI via IDREF_MON
To facilitate RSSI monitoring in modules (e.g. SFF-8472 compliant SFP modules), a
current output is provided. This output gives a current which is 20 % of the average DREF
current through the 290 Ω bias resistor. By connecting a resistor to the IDREF_MON
output, a voltage proportional to the average input power can be obtained.
The RSSI monitoring is implemented by measuring the voltage over the 290 Ω bias
resistor. This method is preferred over a simple current mirror because at small photo
currents the voltage drop over the resistor is very small. This gives a higher bias voltage
yielding better performance of the photodiode.
For maximum freedom on bonding location, 2 pads are available for IDREF_MON (pads 5
and 16). These pads are internally connected. Both pads can be used if necessary. If only
one is used, the other can be left open.
TZA3046_1
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Fiber Channel/Gigabit Ethernet transimpedance amplifier
8. Limiting values
Table 3:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
Min
Max
Unit
VCC
Vn
supply voltage
−0.5
+3.8
V
voltage on any other
pin
pad
IPHOTO
−0.5
−0.5
−0.5
−0.5
+2.0
V
V
V
V
OUT, OUTQ
AGC, IDREF_MON
DREF
VCC + 0.5
VCC + 0.5
VCC + 0.5
In
current on any other
pin
pad
IPHOTO
−4.0
−10
−0.2
−4.0
-
+4.0
+10
+0.2
+4.0
300
mA
mA
mA
mA
mW
°C
OUT, OUTQ
AGC, IDREF_MON
DREF
Ptot
Tamb
Tj
total power dissipation
ambient temperature
junction temperature
storage temperature
−40
-
+85
150
°C
Tstg
−65
+150
°C
9. Characteristics
Table 4:
Characteristics
Typical values at Tj = 25 °C and VCC = 3.3 V; minimum and maximum values are valid over the entire ambient temperature
range and supply voltage range; all voltages are measured with respect to ground; unless otherwise specified.
Symbol
VCC
Parameter
Conditions
Min
2.97
-
Typ
3.3
21
Max
3.6
23
Unit
V
supply voltage
supply current
ICC
AC-coupled; RL(dif) = 100 Ω;
excluding IDREF and IIDREF_MON
mA
Ptot
Tj
total power dissipation
junction temperature
ambient temperature
VCC = 3.3 V
-
70
-
76
mW
°C
−40
−40
5.5
+125
+85
10.5
Tamb
Rtr
+25
7.5
°C
small-signal
transresistance
measured differentially;
AC-coupled, RL(dif) = 100 Ω
kΩ
f-3dB(h)
high frequency
−3 dB point
CPIN = 0.5 pF
800
-
1050
126
-
MHz
nA
In(rms)(itg)(tot)
total integrated RMS noise referenced to input;
current over bandwidth PIN = 0.5 pF;
-3dB(min) = 875 MHz
164
C
f
Automatic gain control loop: pad AGC
tatt
attack time
decay time
AGC pad unconnected
AGC pad unconnected
-
-
-
14
-
-
-
µs
tdecay
40
µs
Vth(AGC)(p-p)
peak-to-peak AGC
threshold voltage
referenced to output;
measured differentially
125
mV
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Fiber Channel/Gigabit Ethernet transimpedance amplifier
Table 4:
Characteristics …continued
Typical values at Tj = 25 °C and VCC = 3.3 V; minimum and maximum values are valid over the entire ambient temperature
range and supply voltage range; all voltages are measured with respect to ground; unless otherwise specified.
Symbol
Bias voltage: pad DREF
R(DREF-VCC) resistance between pin
Parameter
Conditions
Min
Typ
Max
Unit
tested at DC level;
Tamb = 25 °C
260
-
290
320
-
Ω
DREF and pin VCC
TCRDREF
temperature coefficient of
RDREF
0.33
Ω/°C
Input: pad IPHOTO
IIPHOTO(p-p)
peak-to-peak current on
pad IPHOTO
−1000 +1700
-
µA
Vbias(i)
input bias voltage
700
850
1000
mV
Monitor: pad IDREF_MON
Vmon
monitor voltage
0
-
VCC − 0.4 V
IIDREF_MON/IDREF monitor current ratio
ratio IIDREF_MON / IDREF
19.5
20
10
30
20.5
20
-
%
Ioffset(mon)
monitor offset current
Tamb = 25 °C
0
-
µA
TCI(offset)mon
temperature coefficient of
monitor offset current
nA/°C
Data outputs: pads OUT and OUTQ
VO(cm)
common mode output
voltage
AC-coupled; RL(dif) = 100 Ω
-
VCC − 1.2 -
V
Vo(dif)(p-p)
peak-to-peak differential
output voltage
AC-coupled; RL(dif) = 100 Ω
IPIN = 2.5 µA (p-p) × Rtr
IPIN = 100 µA (p-p)
14
-
19
-
mV
mV
mV
Ω
120
325
100
-
IPIN = 1500 µA (p-p)
tested at DC level
-
600
-
RO(dif)
differential output
resistance
-
tr
tf
rise time
20 % to 80 %;
-
-
150
150
-
-
ps
ps
I
PIN = 100 µA (p-p)
80 % to 20 %;
PIN = 100 µA (p-p)
fall time
I
[1] Guaranteed by design.
[2] Max input current is guaranteed for BER < 10−10
[3] Max input current is guaranteed for Tamb = 25°
[4] Max value of 500 mV belongs to IPIN = 1250 µA (p-p)
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Fiber Channel/Gigabit Ethernet transimpedance amplifier
10. Application information
For maximum freedom on bonding location, 2 outputs are available for OUT and OUTQ.
The outputs should be used in pairs: pad 14 with pad 7 or pad 8 with pad 13. Pad 8 is
internally connected with pad 14, pad 7 is internally connected with pad 13. The device is
guaranteed with only one pair used. The other pair should be left open. Two examples of
V
V
CC
CC
IDREF_MON
IDREF_MON
C
C
PIN
PIN
C
C
TZA3046U
TZA3046U
OUT
OUTQ
OUTQ
OUT
GND
GND
001aae518
Fig 8. Application diagram highlighting flexible pad lay out
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NETWORK ANALYZER
S-PARAMETER TEST SET
PORT1
PORT2
Z = 50 Ω
Z
o
= 50 Ω
o
V
CC
SAMPLING OSCILLOSCOPE
TRIGGER
DC-IN
4 or 17
8 or 14
22 nF
22 nF
OUT
1
2
INPUT
8.2
kΩ
Z
= 50 Ω
o
TZA3046
22 nF
330 Ω
IPHOTO
PATTERN
2
OUTQ
R
GENERATOR
7 or 13
DATA
55 Ω
9, 10, 11, 12
GND
CLOCK
001aae519
Total impedance of the test circuit (Ztot(tc)) is calculated by the equation Ztot(tc) = s21 × (R + Zi) × 2, where s21 is the insertion loss of ports 1 and 2.
Typical values: R = 330 Ω, Zi = 30 Ω.
Fig 9. Test circuit
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Fiber Channel/Gigabit Ethernet transimpedance amplifier
12. Bare die information
17
16
15
14
13
12
11
1
2
3
Y
X
(0,0)
4
5
6
7
8
9
10
001aac627
Origin is center of die.
Fig 10. Bonding pad locations
Table 5:
Physical characteristics of the bare die
Value
Parameter
Glass passivation
0.3 µm PSG (PhosphoSilicate Glass) on top of 0.8 µm silicon nitride
Bonding pad
dimension
minimum dimension of exposed metallization is 90 µm × 90 µm
(pad size = 100 µm × 100 µm) except pads 2 and 3 which have exposed
metallization of 80 µm × 80 µm (pad size = 90 µm × 90 µm)
Metallization
Thickness
2.8 µm AlCu
380 µm nominal
Die dimension
Backing
820 µm × 1300 µm (± 20 µm2)
silicon; electrically connected to GND potential through substrate contacts
< 440 °C; recommended die attach is glue
< 15 s
Attach temperature
Attach time
13. Package outline
Not applicable.
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14. Handling information
14.1 General
Inputs and outputs are protected against electrostatic discharge in normal handling.
However, to be completely safe you must take normal precautions appropriate to handling
MOS devices; see JESD625-A and/or IEC61340-5.
14.2 Additional information
Pad IPHOTO has limited protection to ensure good RF performance. This pad should be
handled with extreme care.
15. Abbreviations
Table 6.
Abbreviations
Description
Acronym
BER
Bit Error Rate
FTTx
OC3
Fiber To The “x”
Optical Carrier level 3 (155.52 Mbit/s)
Positive Intrinsic Negative
PIN
PSRR
RSSI
SDH
Power Supply Rejection Ratio
Received Signal Strength Indicator
Synchronous Digital Hierarchy
Small Form-factor Pluggable
Synchronous Optical NETwork
Synchronous Transport Module 1 (155.52 Mbit/s
SFP
SONET
STM1
16. Revision history
Table 7.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
TZA3046_1
20060519
Product data sheet
-
-
TZA3046_1
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17. Legal information
17.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.semiconductors.philips.com.
Limiting values — Stress above one or more limiting values (as defined in
17.2 Definitions
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and and
operation of the device at these or any other conditions above those given in
the Characteristics sections of this document is not implied. Exposure to
limiting values for extended periods may affect device reliability.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Philips Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Terms and conditions of sale — Philips Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
pertaining to warranty, intellectual property rights infringement and limitation
of liability, unless explicitly otherwise agreed to in writing by Philips
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local Philips Semiconductors
sales office. In case of any inconsistency or conflict with the short data sheet,
the full data sheet shall prevail.
Semiconductors. In case of any inconsistency or conflict between information
in this document and such terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
17.3 Disclaimers
Bare die — All die are tested on compliance with all related technical
specifications as stated in this data sheet up to the point of wafer sawing for a
period of ninety (90) days from the date of delivery by Philips
Semiconductors. If there are data sheet limits not guaranteed, these will be
separately indicated in the data sheet. There are no post-packing tests
performed on individual die or wafers.
General — Information in this document is believed to be accurate and
reliable. However, Philips Semiconductors does not give any representations
or warranties, expressed or implied, as to the accuracy or completeness of
such information and shall have no liability for the consequences of use of
such information.
Philips Semiconductors has no control of third party procedures in the
sawing, handling, packing or assembly of the die. Accordingly, Philips
Semiconductors assumes no liability for device functionality or performance
of the die or systems after third party sawing, handling, packing or assembly
of the die. It is the responsibility of the customer to test and qualify their
application in which the die is used.
Right to make changes — Philips Semiconductors reserves the right to
make changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
All die sales are conditioned upon and subject to the customer entering into a
written die sale agreement with Philips Semiconductors through its legal
department.
Suitability for use — Philips Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of a Philips Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. Philips Semiconductors accepts no liability for inclusion and/or use
of Philips Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is for the customer’s own risk.
17.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Philips Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
18. Contact information
TZA3046_1
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 19 May 2006
14 of 15
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TZA3046
Philips Semiconductors
Fiber Channel/Gigabit Ethernet transimpedance amplifier
19. Contents
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© Koninklijke Philips Electronics N.V. 2006.
All rights reserved.
Date of release: 19 May 2006
Document identifier: TZA3046_1
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