USER GUIDE
NI sbRIO-960x
Single-Board RIO OEM Devices
This document provides dimensions, pinouts, connectivity information,
and specifications for the National Instruments sbRIO-9601 and
sbRIO-9602. The devices are referred to inclusively in this document as
the sbRIO-960x.
Caution National Instruments makes no product safety, electromagnetic compatibility
(EMC), or CE marking compliance claims for the sbRIO-960x. The end-product supplier
is responsible for conformity to any and all compliance requirements.
Caution Exercise caution when placing the sbRIO-960x inside an enclosure. Auxiliary
cooling may be necessary to keep the device under the maximum ambient temperature
rating of 55 °C.
The following figure shows the sbRIO-960x.
Figure 1. sbRIO-960x
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Dimensions
This section contains dimensional drawings of the sbRIO devices. For
three-dimensional models, go to ni.com/singleboard and look on the
Resource tab for the sbRIO device you are using.
Note The plated mounting holes are all connected to P1, the ground lug. Connect P1 or
one of the plated mounting holes securely to earth ground.
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The following figure shows the dimensions of the sbRIO-960x.
7X Ø .134 (3.4)
3.520 (89.41)
3.650 (92.71)
3.520 (89.41)
2.440 (61.98)
.550 (13.97)
.275 (6.99)
.140 (3.56)
.450 (11.43)
.000 (0)
.469 (11.91)
.327 (8.31)
.080 (2.03)
.000 (0)
2MM CLEARANCE REQUIRED
ABOVE THIS CAPACITOR
2X 4-40 THREADS
.380 (9.65)
.365 (9.28)
.651 (16.54)
.220 (5.59)
.625 (15.88)
.327 (8.31)
.242 (6.16)
.180 (4.57)
.080 (2.03)
.000 (0)
Figure 2. sbRIO-960x Dimensions in Inches (Millimeters)
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You can install up to three board-only C Series I/O modules on the
sbRIO-960x. The following figure shows the dimensions of the
sb-RIO-960x with three board-only C Series I/O modules installed.
6.565 (166.75)
5.515 (140.08)
4.265 (108.33)
3.965 (100.71)
3.650 (92.71)
8X Ø .125 (3.18)
2.885 (73.28)
2.514 (63.86)
Ø.512 (13)
1.212 (30.78)
.000 (0)
Figure 3. sbRIO-960x with C Series Modules, Dimensions in Inches (Millimeters)
Note To maintain isolation clearances on the C Series modules, do not use mounting
hardware larger than 0.240 in. (6.1 mm) in diameter and maintain an air gap of at least
0.200 in. (5.0 mm) from the modules to anything else.
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I/O and Other Connectors on the sbRIO Device
The following figure shows the locations of parts on the sbRIO device.
1
2
3
4
5
6
7
8
15
14
13
12
11
10
9
1
2
3
4
5
J11, Connector for C Series Module
P5, 3.3 V Digital I/O
J10, Connector for C Series Module
P4, 3.3 V Digital I/O
6
7
8
9
DIP Switches
Backup Battery
P2, 3.3 V Digital I/O
11 Reset Button
12 P1, Ground Lug
13 LEDs
14 J3, Power Connector
15 P3, 3.3 V Digital I/O
J5, RJ-45 Ethernet Port
J9, Connector for C Series Module
10 J1, RS-232 Serial Port
Figure 4. sbRIO-960x Parts Locator Diagram
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The following table lists and describes the connectors on sbRIO devices
and lists the part number and manufacturer of each connector. Refer to the
manufacturer for information about using and matching these connectors.
Table 1. sbRIO Connector Descriptions
Connector
Description
Part Number and Manufacturer
J3, Power
2-position MINI-COMBICON header
and plug, 0.285 in. (7.24 mm) high
1727566 from Phoenix Contact;
accepts 1714977 from Phoenix
Contact (Included)
J1, RS-232
Serial Port
9-Pin DSUB plug, 0.318 in. (8.08 mm)
high, with 4-40 jacksockets
5747840-6 from Amphenol
P2, P3, P4, P5
50-pin polarized header plug,
N2550-6002RB from 3M
0.100 × 0.100 in. (2.54 × 2.54 mm)
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The following figures show the pinouts of the I/O connectors on the sbRIO
devices.
D GND
D GND
D GND
D GND
D GND
D GND
D GND
D GND
D GND
D GND
D GND
D GND
D GND
D GND
50 49 Port2/DIO8
48 47 Port2/DIO7
46 45 Port2/DIO6
44 43 Port2/DIO5
42 41 Port2/DIO4
40 39 Port6/DIO8
38 37 Port6/DIO7
36 35 Port6/DIO6
34 33 Port6/DIO5
32 31 Port6/DIO4
30 29 Port6/DIO3
28 27 Port6/DIO2
26 25 Port6/DIO1
24 23 Port6/DIO0
Pin 50
Port6/DIOCTL 22 21 Port6/DIO9
D GND
D GND
D GND
D GND
D GND
5V
20 19 Port5/DIO8
18 17 Port5/DIO7
16 15 Port5/DIO6
14 13 Port5/DIO5
12 11 Port5/DIO4
Pin 1
10
8
9
7
5
3
1
Port5/DIO3
Port5/DIO2
Port5/DIO1
Port5/DIO0
D GND
D GND
5V
6
Port5/DIO9
Port5/DIOCTL
4
2
Figure 5. Pinout of I/O Connector P2, 3.3 V Digital I/O
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D GND
5V
50 49 Port9/DIO8
48 47 Port9/DIO7
46 45 Port9/DIO6
44 43 Port9/DIO5
42 41 Port9/DIO4
40 39 Port9/DIO3
38 37 Port9/DIO2
36 35 Port9/DIO1
34 33 Port9/DIO0
D GND
5V
Pin 50
D GND
D GND
D GND
D GND
D GND
Pin 1
Port9/DIOCTL 32 31 Port9/DIO9
D GND
D GND
D GND
D GND
D GND
D GND
D GND
D GND
D GND
30 29 Port8/DIO8
28 27 Port8/DIO7
26 25 Port8/DIO6
24 23 Port8/DIO5
22 21 Port8/DIO4
20 19 Port8/DIO3
18 17 Port8/DIO2
16 15 Port8/DIO1
14 13 Port8/DIO0
Port8/DIOCTL 12 11 Port8/DIO9
D GND
10
8
9
7
5
3
1
Port7/DIO8
Port7/DIO7
Port7/DIO6
Port7/DIO5
D GND
D GND
D GND
6
D GND
4
Port7/DIO4
2
Figure 6. Pinout of I/O Connector P3, 3.3 V Digital I/O
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D GND
D GND
D GND
D GND
50 49 Port2/DIO3
48 47 Port2/DIO2
46 45 Port2/DIO1
44 43 Port2/DIO0
Port2/DIOCTL 42 41 Port2/DIO9
D GND
D GND
D GND
D GND
D GND
D GND
D GND
D GND
D GND
40 39 Port1/DIO8
38 37 Port1/DIO7
36 35 Port1/DIO6
34 33 Port1/DIO5
32 31 Port1/DIO4
30 29 Port1/DIO3
28 27 Port1/DIO2
26 25 Port1/DIO1
24 23 Port1/DIO0
Pin 50
Port1/DIOCTL 22 21 Port1/DIO9
D GND
D GND
D GND
D GND
D GND
5V
20 19 Port0/DIO8
18 17 Port0/DIO7
16 15 Port0/DIO6
14 13 Port0/DIO5
12 11 Port0/DIO4
Pin 1
10
8
9
7
5
3
1
Port0/DIO3
Port0/DIO2
Port0/DIO1
Port0/DIO0
D GND
D GND
5V
6
Port0/DIO9
Port0/DIOCTL
4
2
Figure 7. Pinout of I/O Connector P4, 3.3 V Digital I/O
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D GND
5V
50 49 Port4/DIO8
48 47 Port4/DIO7
46 45 Port4/DIO6
44 43 Port4/DIO5
42 41 Port4/DIO4
40 39 Port4/DIO3
38 37 Port4/DIO2
36 35 Port4/DIO1
34 33 Port4/DIO0
D GND
5V
Pin 50
D GND
D GND
D GND
D GND
D GND
Pin 1
Port4/DIOCTL 32 31 Port4/DIO9
D GND
D GND
D GND
D GND
D GND
D GND
D GND
D GND
D GND
30 29 Port3/DIO8
28 27 Port3/DIO7
26 25 Port3/DIO6
24 23 Port3/DIO5
22 21 Port3/DIO4
20 19 Port3/DIO3
18 17 Port3/DIO2
16 15 Port3/DIO1
14 13 Port3/DIO0
Port3/DIOCTL 12 11 Port3/DIO9
D GND
10
8
9
7
5
3
1
Port7/DIO3
Port7/DIO2
Port7/DIO1
Port7/DIO0
D GND
D GND
D GND
6
Port7/DIO9
Port7/DIOCTL
4
2
Figure 8. Pinout of I/O Connector P5, 3.3 V Digital I/O
The following figure and table show the signals on J1, the RS-232 serial
port.
Pin 1 Pin 5
Pin 6 Pin 9
Figure 9. J1, RS-232 Serial Port
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Table 2. RS-232 Serial Port Pin Descriptions
Pin
1
Signal
DCD
RXD
TXD
DTR
GND
DSR
RTS
CTS
RI
2
3
4
5
6
7
8
9
Connecting the sbRIO Device to a Network
Use a standard Category 5 (CAT-5) or better Ethernet cable to connect the
RJ-45 Ethernet port to an Ethernet network.
Caution To prevent data loss and to maintain the integrity of your Ethernet installation,
do not use a cable longer than 100 m.
If you need to build your own cable, refer to the Cabling section for more
information about Ethernet cable wiring connections.
The host computer communicates with the device over a standard Ethernet
connection. If the host computer is on a network, you must configure
the device on the same subnet as the host computer. If neither the host
computer nor the device is connected to a network, you can connect the
two directly using a crossover cable.
If you want to use the device on a subnet other than the one the host
computer is on, first connect the device on the same subnet as the host
computer. Use DHCP to assign an IP address or reassign a static IP address
for the subnet where you want it to be and physically move it to the other
subnet. Refer to the Measurement & Automation Explorer Help for more
information about configuring the device in Measurement & Automation
Explorer (MAX).
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Powering the sbRIO Device
The sbRIO device requires a power supply connected to J3. The supply
voltage and current must meet the specifications in the Power
Requirements section of this document, but the actual power requirement
depends on how the device is physically configured, programmed, and
used. To determine the power requirement of your application, you must
measure the power consumption during execution, and add 20% to your
estimates to account for transient and startup conditions.
has some internal power-supply filtering on the positive side, but a low-quality power
supply can inject noise into the ground path, which is unfiltered.
Four elements of the sbRIO device can require power: sbRIO internal
operation; 3.3 V DIO; 5 V output; and board-only C Series modules
formulas and examples for calculating power requirements for different
configurations and application types.
Complete the following steps to connect a power supply to the device.
1. Remove the MINI-COMBICON plug from connector J3 of the
sbRIO-960x. Refer to Figure 4 for the location of J3.
2. Connect the positive lead of the power supply to the V terminal of
the MINI-COMBICON plug.
3. Connect the negative lead of the power supply to the C terminal of
the MINI-COMBICON plug.
4. Re-install the MINI-COMBICON connector in connector J3.
When you apply power to the sbRIO-960x, the device runs a power-on self
test (POST). During the POST, the Power and Status LEDs turn on. The
Status LED turns off, indicating that the POST is complete. If the LEDs do
not behave in this way when the system powers on, refer to the
Understanding LED Indications section.
You can configure the device to launch an embedded stand-alone
LabVIEW RT application each time it is booted. Refer to the Running a
Stand-Alone Real-Time Application (RT Module) topic of the LabVIEW
Help for more information.
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Boot Options
Table 3 lists the reset options available on sbRIO devices. These options
determine how the FPGA behaves when the device is reset in various
conditions.
Table 3. sbRIO Reset Options
Reset Option
Do Not Autoload VI
Behavior
Does not load the FPGA bit stream from flash memory.
Autoload VI on Device Power-Up Loads the FPGA bit stream from flash memory to the FPGA
when the device powers on.
Autoload VI on Device Reboot
Loads the FPGA bit stream from flash to the FPGA when you
reboot the device either with or without cycling power.
Note If you want a VI to run when loaded to the FPGA, complete the following steps.
1. Right-click the FPGA Target item in the Project Explorer window in
LabVIEW.
2. Select Properties.
3. In the General category of the FPGA Target Properties dialog box,
place a check in the Run when loaded to FPGA checkbox.
4. Compile the FPGA VI.
Connecting Serial Devices to the sbRIO Device
The sbRIO-960x has an RS-232 serial port to which you can connect
devices such as displays or input devices. Use the Serial VIs to read from
and write to the serial port from a LabVIEW RT application. For more
information about using the Serial VIs, refer to the Serial VIs and
Functions topic of the LabVIEW Help.
Using the Internal Real-Time Clock
The system clock of the sbRIO device gets the date and time from the
internal real-time clock at startup. This synchronization provides
timestamp data to the device.
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Configuring DIP Switches
AMP 0650
1-5435802-7
OFF
1
2
SAFE MODE
CONSOLE OUT
3
4
IP RESET
NO APP
5
6
USER1
NO FPGA
Figure 10. DIP Switches
All of the DIP switches are in the OFF (up) position when the sbRIO device
is shipped from National Instruments.
SAFE MODE Switch
The position of the SAFE MODE switch determines whether the embedded
LabVIEW Real-Time engine launches at startup. If the switch is in the OFF
position, the LabVIEW Real-Time engine launches. Keep this switch in the
OFF position during normal operation. If the switch is in the ON position
at startup, the sbRIO device launches only the essential services required
for updating its configuration and installing software. The LabVIEW
Real-Time engine does not launch.
Push the SAFE MODE switch to the ON position if the software on the
sbRIO device is corrupted. Even if the switch is not in the ON position, if
there is no software installed on the device, the device automatically boots
into safe mode. The SAFE MODE switch must be in the ON position to
reformat the drive on the device. Refer to the Measurement & Automation
Explorer Help for more about installing software and reformatting the
drive.
CONSOLE OUT Switch
With a serial-port terminal program, you can use the serial port to read the
IP address and firmware version of the sbRIO device. Use a null-modem
cable to connect the serial port on the device to a computer. Push the
CONSOLE OUT switch to the ON position. Make sure that the serial-port
terminal program is configured to the following settings:
•
•
•
9,600 bits per second
Eight data bits
No parity
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•
•
One stop bit
No flow control
Keep this switch in the OFF position during normal operation. If
CONSOLE OUT is enabled, LabVIEW RT cannot communicate with the
serial port.
NO APP Switch
Push the IP RESET switch to the ON position and reboot the sbRIO device
to reset the IP address to 0.0.0.0. If the device is on your local subnet and
the IP RESET switch is in the ON position, the device appears in MAX
with IP address 0.0.0.0. You can configure a new IP address for the
device in MAX. Refer to the Resetting the Network Configuration of the
sbRIO Device section for more information about resetting the IP address.
Push the NO APP switch to the ON position to prevent a LabVIEW RT
startup application from running at startup. If you want to permanently
disable a LabVIEW RT application from running at startup, you must
disable it in LabVIEW. To run an application at startup, push the NO APP
switch to the OFF position, create an application using the LabVIEW
Application Builder, and configure the application in LabVIEW to launch
at startup. For more information about automatically launching VIs at
startup and disabling VIs from launching at startup, refer to the Running a
Stand-Alone Real-Time Application (RT Module) topic of the LabVIEW
Help.
USER1 Switch
You can define the USER1 switch for your application. To define the
purpose of this switch in your embedded application, use the RT Read
Switch VI in your LabVIEW RT embedded VI. For more information
NO FPGA Switch
Push the NO FPGA switch to the ON position to prevent a LabVIEW
FPGA application from loading at startup. The NO FPGA switch overrides
the options described in the Boot Options section. After startup you can
download bit files to flash memory from a LabVIEW project regardless of
switch position. If you already have an application configured to launch at
startup and you push the NO FPGA switch from ON to OFF, the startup
application is automatically enabled.
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Using the Reset Button
Pressing the Reset button reboots the processor. The FPGA continues to
run unless you select the Autoload VI on Device Reboot boot option.
Refer to the Boot Options section for more information.
Understanding LED Indications
3
4
1
2
1
2
FPGA
USER
3
4
POWER
STATUS
Figure 11. sbRIO-960x LEDs
FPGA LED
USER LED
You can use the FPGA LED to help debug your application or easily
retrieve application status. Use the LabVIEW FPGA Module and NI-RIO
software to define the FPGA LED to meet the needs of your application.
Refer to LabVIEW Help for information about programming this LED.
You can define the USER LED to meet the needs of your application. To
define the LED, use the RT LEDs VI in LabVIEW. For more information
about the RT LEDs VI, refer to the LabVIEW Help.
POWER LED
STATUS LED
The POWER LED is lit while the sbRIO device is powered on. This LED
indicates that the 5 V and 3.3 V rails are stable.
The STATUS LED is off during normal operation. The sbRIO device
indicates specific error conditions by flashing the STATUS LED a certain
number of times as shown in Table 4.
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Table 4. Status LED Indications
Indication
Number of Flashes
1
The device is unconfigured. Use MAX to configure the device. Refer to
the Measurement & Automation Explorer Help for information about
configuring the device.
2
The device has detected an error in its software. This usually occurs
when an attempt to upgrade the software is interrupted. Reinstall
software on the device. Refer to the Measurement & Automation
Explorer Help for information about installing software on the device.
3
4
The device is in safe mode because the Safe Mode DIP switch is in
the ON position. Refer to the Configuring DIP Switches section for
information about the Safe Mode DIP switch.
The software has crashed twice without rebooting or cycling power
between crashes. This usually occurs when the device runs out of
memory. Review your RT VI and check the memory usage. Modify
the VI as necessary to solve the memory usage issue.
Continuous flashing
or solid
The device may be configured for DHCP but unable to get an IP address
because of a problem with the DHCP server. Check the network
connection and try again. If the problem persists, contact National
Instruments.
Resetting the Network Configuration
of the sbRIO Device
If the sbRIO device is not able to communicate with the network, you can
use the IP RESET switch to manually restore the device to the factory
network settings. When you restore the device to the factory network
settings, the IP address, subnet mask, DNS address, gateway, and Time
Server IP are set to 0.0.0.0. Power-on defaults, watchdog settings, and
VIs are unaffected.
Complete the following steps to restore the device to the factory network
settings.
1. Move the IP RESET DIP switch to the ON position.
2. Press the Reset button.
3. Move the IP RESET switch to the OFF position.
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The network settings are restored. You can reconfigure the settings in MAX
from a computer on the same subnet. Refer to the Measurement &
Automation Explorer Help for more information about configuring the
device.
Note If the device is restored to the factory network settings, the LabVIEW run-time
engine does not load. You must reconfigure the network settings and reboot the device for
the LabVIEW run-time engine to load.
Integrated 3.3 V Digital I/O
The four 40-pin IDC headers, P2–P5, provide connections for
110 low-voltage DIO channels, 82 DGND, and eight +5 V voltage outputs.
The following figure represents a single DIO channel.
+5 V
D1
R1
User
Spartan III FPGA
U1
Connection
D2
1
2
3
U1: 5 V to 3.3 V Level Shifter, SN74CBTD3384CDGV from Texas Instruments
D1 and D2: ESD Rated Protection Diodes, NUP4302MR6T1G from On Semiconductor
R1: Current-Limiting Posistor, PRG18BB330MS1RB from Murata
Figure 12. Circuitry of One 3.3 V DIO Channel
I/O Protection
The 33 Ω current-limiting posistor, R1, and the protection diodes, D1 and
D2, protect each DIO channel against externally applied voltages of 20 V
and ESD events. The combination of R1 and D1 protects against
overvoltage, and the combination of R1 and D2 protects against
undervoltage. The resistance of R1 increases rapidly with temperature.
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During overvoltage conditions, high current flows through R1 and into the
protection diodes. High current causes internal heating in the posistor,
which increases the resistance and limits the current. Refer to the
Specifications section for current-limiting and resistance values.
Drive Strength
Signal Integrity
The sbRIO devices were tested with all 110 DIO channels driving 3 mA
DC loads, for a total of 330 mA sourcing from the FPGA. The FPGA uses
minimum 8 mA drivers, but the devices are not characterized for loads
higher than 3 mA.
The sbRIO boards were designed with 60 Ω characteristic trace impedance.
The characteristic impedance of most IDC ribbon cables is 110 Ω, which is
grossly mismatched from the board. However, headers P2–P5 were
designed such that the signals are interwoven with ground
(signal/ground/signal/ground, etc.), which greatly improves the signal
integrity. This is sufficient for most applications
For the best possible signal integrity, use 3M™ ribbon cable #3353, which
has a characteristic impedance of 65 Ω. This cable has a ground plane that
connects to the ground plane of the board at pin 1 and pin 50. The internal
ground plane of this cable also reduces noise and radiated emissions.
Using +5 V Power from 3.3 V DIO Headers P2–P5
Each of the four DIO headers has two pins to provide +5 V power for
external applications. This +5 V outputs are referenced to DGND on the
headers and are connected directly to the internal 5 V power plane of the
sbRIO device. The +5 V source has current limiting and overvoltage
clamps. Nevertheless, sudden current steps and noisy loads can inject
high-frequency transients into the power planes of the device. Such
transients can cause intermittent failures in the digital timing and lead to
unexpected behavior. Add filters and/or additional current limiting
between the external load and the +5 V output if the external load is not a
quiet, slowly ramping DC load. An LC filter of 6.8 μH and 100 μF per
200 mA load should be sufficient, but the OEM user is responsible for final
requirements and testing.
The sbRIO power supply is designed for a total of 2 A external load at 5 V.
This total includes 200 mA per installed C Series module. For example, if
three C Series modules are installed, only 2 A – (3 × 0.2) = 1.4 A is
available for use on headers P2–P5. Each pin on the headers is rated for 2 A,
but a typical 28 AWG ribbon cable is rated for only 225 mA per conductor.
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The OEM user is responsible for determining cabling requirements and
ensuring that current limits are not exceeded.
Specifications
The following specifications are typical for the range –20 to 55 °C unless
otherwise noted.
Network
Network interface................................... 10BaseT and 100BaseTX
Ethernet
Compatibility ......................................... IEEE 802.3
Communication rates ............................. 10 Mbps, 100 Mbps,
auto-negotiated
Maximum cabling distance .................... 100 m/segment
Processor Speed
Memory
sbRIO-9601............................................ 266 MHz
sbRIO-9602............................................ 400 MHz
Non-volatile memory
sbRIO-9601..................................... 128 MB
sbRIO-9602..................................... 256 MB
System memory
sbRIO-9601..................................... 64 MB
sbRIO-9602..................................... 128 MB
Xilinx Spartan 3 Reconfigurable FPGA
Number of logic cells
sbRIO-9601..................................... 17,280
sbRIO-9602..................................... 46,080
Available embedded RAM
sbRIO-9601..................................... 432 kbits
sbRIO-9602..................................... 720 kbits
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3.3 V Digital I/O
Number of DIO channels........................110
Maximum tested current per channel .....3 mA
Maximum total current, all lines.............330 mA
Maximum tested DIO frequency ............10 MHz
Input logic levels
Input high voltage, VIH ....................2.0 V min; 5.25 V max
Input low voltage, VIL ......................0 V min; 0.8 V max
Output logic levels
Output high voltage, VOH
sourcing 3 mA .................................2.7 V min; 3.3 V max
Output low voltage, VOL
,
,
sinking 3 mA ...................................0.07 V min; 0.54 V max
Overvoltage protection
at –20 to 70 °C........................................ 20 V (maximum 2 pins
in overvoltage)
Posistor (PRG18BB330MS1RB from Murata)
Maximum peak
abnormal-condition current .............760 mA
Maximum hold current at 25 °C......36 mA
Maximum hold current at 70 °C......20 mA
Trip current at 25 °C........................71 mA
Resistance at 25 °C..........................33 Ω 20%
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Resistance-temperature characteristics, typical curve
Resistance-Temperature Characteristics
Graph-1
Typical Curve
1000
100
10
1
0.1
–40 –20
0
20
40
60
80
100 120 140 160
Temperature (°C)
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Power Requirements
The sbRIO device requires a power supply connected to connector J3.
Refer to Figure 4 for the location of J3. Refer to the Powering the sbRIO
Device section for information about connecting the power supply.
Power supply voltage range....................19–30 VDC1
Power supply current limit .....................1.8 A
Power connector internal fuse ................2 A non-replaceable
Total power requirement = Pint + PDIO + P5V + PCSer
,
where
Pint is the consumption by sbRIO internal operation
PDIO is the consumption by the 3.3 V DIO
P5V is the consumption by the 5 V voltage output
PCSer is the consumption by installed board-only C Series
modules.
Note You must add 20% to the calculated or measured total power requirement to account
for transient and startup conditions.
Maximum Pint .........................................6.0 W
Maximum PDIO .......................................1.28 W
PDIO = Total DIO Current × 3.3 V/0.85
Maximum P5V .........................................11.1 W
P5V = Total 5 V Output Current × 5 V/0.9
Maximum PCSer.......................................3.3 W; each installed C Series
module consumes up to 1.1 W
1
The sbRIO device is 1–2% more efficient with a 19 V supply than with a 30 V supply.
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Example power requirement calculations
For an sbRIO-9602 with three installed board-only C Series modules,
20 mA total current through 3.3 V DIO pins, and 1 A of current through
5 V output, calculate the total power requirement as follows:
Pint = 6.0 W
PCSer = 3.30 W
PDIO = 0.08 W
P5V = 5.55 W
Adding 20% for transient conditions, 14.93 W × 1.2 = 17.92 W
Total power requirement = 17.92 W
For an sbRIO-9601 with one installed board-only C Series module,
330 mA total current through 3.3 V DIO pins, and no 5 V output used,
calculate the total power requirement as follows:
Pint = 6.0 W
PCSer = 1.10 W
PDIO = 1.28 W
P5V = 0.00 W
Adding 20% for transient conditions, 8.38 W × 1.2 = 10.06 W
Total power requirement = 10.06 W
Backup battery ....................................... 3 V lithium coin cell, BR2032
Working I/O Voltages
Connect only voltages that are within these limits.
V terminal to C terminal ........................ 35 VDC max,
Measurement Category I
Caution Do not connect the system to signals or use for measurements within
Measurement Categories II, III, or IV.
Environmental Management
National Instruments is committed to designing and manufacturing
products in an environmentally responsible manner. NI recognizes that
eliminating certain hazardous substances from our products is beneficial
not only to the environment but also to NI customers.
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For additional environmental information, refer to the NI and the
Environment Web page at ni.com/environment. This page contains the
environmental regulations and directives with which NI complies, as well
as other environmental information not included in this document.
Waste Electrical and Electronic Equipment (WEEE)
EU Customers At the end of their life cycle, all products must be sent to a WEEE recycling
center. For more information about WEEE recycling centers and National Instruments
WEEE initiatives, visit ni.com/environment/weee.htm.
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(For information about China RoHS compliance, go to
.)
Environmental
The sbRIO-960x is intended for indoor use only.
Ambient temperature in enclosure
(IEC 60068-2-1, IEC 60068-2-2).................–20 to 55 °C
Storage temperature
(IEC 60068-2-1, IEC 60068-2-2).................–40 to 85 °C
Operating humidity
(IEC 60068-2-56) ......................................10 to 90% RH, noncondensing
Storage humidity
(IEC 60068-2-56) ......................................5 to 95% RH, noncondensing
Maximum altitude...................................2,000 m
Pollution Degree (IEC 60664)................2
Physical Characteristics
Torque for screw terminals on J3 ...........0.5 to 0.6 N · m
(4.4 to 5.3 lb · in.)
Weight ....................................................198.45 g (7.0 oz)
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Cabling
Table 5 shows the standard Ethernet cable wiring connections for both
normal and crossover cables.
Table 5. Ethernet Cable Wiring Connections
Connector 2
(Normal)
Connector 2
(Crossover)
Pin
1
Connector 1
white/orange
orange
white/orange
orange
white/green
green
2
3
white/green
blue
white/green
blue
white/orange
blue
4
5
white/blue
green
white/blue
green
white/blue
orange
6
7
white/brown
brown
white/brown
brown
white/brown
brown
8
Connector 1
Connector 2
Pin 8
Pin 1
Pin 8
Pin 1
Figure 13. Ethernet Connector Pinout
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Where to Go for Support
The National Instruments Web site is your complete resource for technical
support. At ni.com/support you have access to everything from
troubleshooting and application development self-help resources to email
and phone assistance from NI Application Engineers.
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