SA58670A
2.1 W/channel stereo class-D audio amplifier
Rev. 02 — 23 October 2008
Product data sheet
1. General description
The SA58670A is a stereo, filter-free class-D audio amplifier which is available in an
HVQFN20 package with the exposed Die Attach Paddle (DAP).
The SA58670A features independent shutdown controls for each channel. The gain may
be set at 6 dB, 12 dB, 18 dB or 24 dB with gain select pins G0 and G1. Improved immunity
to noise and RF rectification is increased by high PSRR and differential circuit topology.
Fast start-up time and small package makes it an ideal choice for both cellular handsets
and PDAs.
The SA58670A delivers 1.4 W/channel at 5.0 V and 720 mW/channel at 3.6 V into 8 Ω. It
delivers 2.1 W/channel at 5.0 V into 4 Ω. The maximum power efficiency is excellent at
70 % to 74 % into 4 Ω and 84 % to 88 % into 8 Ω. The SA58670A provides thermal and
short-circuit shutdown protection.
2. Features
I Output power:
N 2.1 W/channel into 4 Ω at 5.0 V
N 1.4 W/channel into 8 Ω at 5.0 V
N 720 mW/channel into 8 Ω at 3.6 V
I Supply voltage: 2.5 V to 5.5 V
I Independent shutdown control for each channel
I Selectable gain: 6 dB, 12 dB, 18 dB and 24 dB
I High SVRR: −77 dB at 217 Hz
I Fast start-up time: 3.5 ms
I Low supply current
I Low shutdown current
I Short-circuit and thermal protection
I Space savings with 4 mm × 4 mm HVQFN20 package
I Low junction to ambient thermal resistance of 24 K/W with exposed DAP
3. Applications
I Wireless and cellular handset and PDA
I Portable DVD player
I USB speaker
I Notebook PC
I Portable radio and gaming
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SA58670A
NXP Semiconductors
2.1 W/channel stereo class-D audio amplifier
6. Pinning information
6.1 Pinning
terminal 1
index area
1
2
3
4
5
15
14
13
12
11
G1
OUTLP
PVDD
G0
OUTRP
PVDD
PGND
OUTRN
SA58670ABS
PGND
OUTLN
(1)
DAP
002aad664
Transparent top view
(1) Exposed Die Attach Paddle (DAP).
Fig 2. Pin configuration for HVQFN20
6.2 Pin description
Table 2.
Symbol
Pin description
Pin
Description
G1
1
gain select input 1
left channel positive output
OUTLP
PVDD
PGND
OUTLN
n.c.
2
3
power supply voltage (level same as AVDD)
power ground
4
5
left channel negative output
not connected
6
SDL
7
left channel shutdown input (active LOW)
right channel shutdown input (active LOW)
analog supply voltage (level same as PVDD)
not connected
SDR
8
AVDD
n.c.
9
10
11
12
13
14
15
16
17
18
OUTRN
PGND
PVDD
OUTRP
G0
right channel negative output
power ground
power supply voltage (level same as AVDD)
right channel positive output
gain select input 0
INRP
INRN
AGND
right channel positive input
right channel negative input
analog ground
SA58670A_2
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Product data sheet
Rev. 02 — 23 October 2008
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SA58670A
NXP Semiconductors
2.1 W/channel stereo class-D audio amplifier
Table 2.
Pin description …continued
Symbol
INLN
INLP
-
Pin
19
Description
left channel negative input
20
left channel positive input
(DAP)
exposed die attach paddle; connect to ground plane heat spreader
7. Limiting values
Table 3.
Limiting values
Symbol Parameter
Conditions
Min
Max
Unit
V
VDD
supply voltage
Active mode
Shutdown mode
pin SDL
−0.3
−0.3
GND
GND
−0.3
+6.0
+7.0
V
VI
input voltage
VDD
V
pin SDR
VDD
V
other pins
VDD + 0.3
V
P
power dissipation
derating factor 41.6 mW/K
Tamb = 25 °C
Tamb = 75 °C
Tamb = 85 °C
operating in free air
operating
-
5.2
3.12
2.7
+85
+150
+85
-
W
W
W
°C
°C
°C
V
-
-
Tamb
Tj
ambient temperature
junction temperature
storage temperature
−40
−40
−65
±2000
±200
Tstg
Vesd
electrostatic discharge human body model
voltage
machine model
-
V
[1] VDD is the supply voltage on pins PVDD and pin AVDD.
GND is the voltage ground on pins PGND and pin AGND.
SA58670A_2
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Product data sheet
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SA58670A
NXP Semiconductors
2.1 W/channel stereo class-D audio amplifier
8. Static characteristics
Table 4.
Static characteristics
Symbol Parameter
Conditions
Min
Typ
-
Max
5.5
6
Unit
V
VDD
IDD
supply voltage
supply current
operating
2.5
VDD = 2.5 V; no load
VDD = 3.6 V; no load
VDD = 5.5 V; no load
no input signal;
-
-
-
-
4
mA
mA
mA
nA
5
7.5
9
6
IDD(sd)
shutdown mode supply current
10
1000
VSDR = VSDL = GND
PSRR
Vi(cm)
power supply rejection ratio
common-mode input voltage
common mode rejection ratio
VDD = 2.5 V to 5.5 V
-
−75
-
−55
dB
V
0.5
-
VDD − 0.8
−50
CMRR
inputs are shorted together;
VDD = 2.5 V to 5.5 V
−69
dB
VIH
VIL
HIGH-level input voltage
LOW-level input voltage
VDD = 2.5 V to 5.5 V;
pins SDL, SDR, G0, G1
1.3
0
-
-
VDD
V
V
VDD = 2.5 V to 5.5 V;
0.35
pins SDL, SDR, G0, G1
IIH
HIGH-level input current
LOW-level input current
switching frequency
VDD = 5.5 V; VI = VDD
VDD = 5.5 V; VI = 0 V
VDD = 2.5 V to 5.5 V
VG0 = VG1 = 0.35 V
VG0 = VDD; VG1 = 0.35 V
VG0 = 0.35 V; VG1 = VDD
VG0 = VG1 = VDD
-
-
50
µA
µA
kHz
dB
dB
dB
dB
IIL
-
-
5
fsw
250
5.5
11.5
17.5
23.5
300
6
350
6.5
12.5
18.5
24.5
Gv(cl)
closed-loop voltage gain
12
18
24
Pins OUTLP, OUTLN, OUTRP and OUTRN
RDSon
drain-source on-state resistance
VDD = 2.5 V
VDD = 3.6 V
VDD = 5.5 V
-
-
-
-
700
570
500
5
-
mΩ
mΩ
mΩ
mV
-
-
|VO(offset)
|
output offset voltage
measured differentially; inputs
AC grounded; Gv(cl) = 6 dB;
10
VDD = 2.5 V to 5.5 V
Zo(sd)
shutdown mode output impedance VSDR = VSDL = 0.35 V
-
2
-
kΩ
[1] VDD is the supply voltage on pins PVDD and pin AVDD.
GND is the ground supply voltage on pins PGND and pin AGND.
SA58670A_2
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Product data sheet
Rev. 02 — 23 October 2008
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SA58670A
NXP Semiconductors
2.1 W/channel stereo class-D audio amplifier
9. Dynamic characteristics
Table 5.
Dynamic characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Po
output power
per channel; f = 1 kHz; THD+N = 10 %
RL = 8 Ω; VDD = 3.6 V
RL = 8 Ω; VDD = 5.0 V
RL = 4 Ω; VDD = 5.0 V
VDD = 5.0 V; Gv(cl) = 6 dB; f = 1 kHz
Po = 0.5 W
-
-
-
0.72
1.4
-
-
-
W
W
W
2.1
THD+N
SVRR
total harmonic
distortion-plus-noise
-
-
0.11
0.14
-
-
%
%
Po = 1.0 W
supply voltage ripple
rejection
Gv(cl) = 6 dB; f = 217 Hz
VDD = 3.6 V
-
-
-
−73
−77
−69
-
-
-
dB
dB
dB
VDD = 5.0 V
CMRR
Zi
common mode rejection VDD = 5.0 V; Gv(cl) = 6 dB; f = 217 Hz
ratio
input impedance
Gv(cl) = 6 dB
Gv(cl) = 12 dB
Gv(cl) = 18 dB
Gv(cl) = 24 dB
VDD = 3.6 V
-
-
-
-
-
28.1
17.3
9.8
-
-
-
-
-
kΩ
kΩ
kΩ
kΩ
ms
5.2
td(sd-startup)
Vn(o)
delay time from
shutdown to start-up
3.5
output noise voltage
VDD = 3.6 V; f = 20 Hz to 20 kHz;
inputs are AC grounded
no weighting
A weighting
-
-
35
27
-
-
µV
µV
[1] VDD is the supply voltage on pins PVDD and pin AVDD.
SA58670A_2
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Product data sheet
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SA58670A
NXP Semiconductors
2.1 W/channel stereo class-D audio amplifier
10. Typical performance curves
001aah484
2
10
THD+N
(%)
10
1
(1)
(2) (3)
−1
10
−2
10
10
−5
−4
−3
−2
−1
10
10
10
10
1
10
P
(W)
o
a. Gv(cl) = 24 dB
001aah485
2
10
THD+N
(%)
10
1
(1)
(2) (3)
−1
10
−2
10
10
−5
−4
−3
−2
−1
10
10
10
10
1
10
P
(W)
o
b. Gv(cl) = 6 dB.
fi = 1 kHz.
(1) VDD = 2.5 V.
(2) VDD = 3.6 V.
(3) VDD = 5.0 V.
Fig 3. Total harmonic distortion-plus-noise as a function of output power; RL = 8 Ω
SA58670A_2
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Product data sheet
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SA58670A
NXP Semiconductors
2.1 W/channel stereo class-D audio amplifier
001aah486
2
10
THD+N
(%)
10
1
(1)
(2) (3)
−1
10
−2
10
10
−5
−4
−3
−2
−1
10
10
10
10
1
10
P
(W)
o
a. Gv(cl) = 24 dB.
001aah487
2
10
THD+N
(%)
(1)
(2) (3)
10
1
−1
10
−2
10
10
−5
−4
−3
−2
−1
10
10
10
10
1
10
P
(W)
o
b. Gv(cl) = 6 dB.
fi = 1 kHz.
(1) VDD = 2.5 V.
(2) VDD = 3.6 V.
(3) VDD = 5.0 V.
Fig 4. Total harmonic distortion-plus-noise as a function of output power; RL = 4 Ω
SA58670A_2
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Product data sheet
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SA58670A
NXP Semiconductors
2.1 W/channel stereo class-D audio amplifier
001aah488
1
THD+N
(%)
−1
(1)
(2)
10
(3)
−2
10
−3
10
2
3
4
5
10
10
10
10
10
f (Hz)
(1) Po = 350 mW; Vi = 590 mV (RMS).
(2) Po = 240 mW; Vi = 490 mV (RMS).
(3) Po = 120 mW; Vi = 346 mV (RMS).
a. RL = 4 Ω
001aah489
1
THD+N
(%)
(1)
(2)
−1
10
(3)
−2
10
−3
10
2
3
4
5
10
10
10
10
10
f (Hz)
(1) Po = 260 mW; Vi = 721.1 mV (RMS).
(2) Po = 180 mW; Vi = 600 mV (RMS).
(3) Po = 90 mW; Vi = 424.3 mV (RMS).
b. RL = 8 Ω
Gv(cl) = 6 dB.
Fig 5. Total harmonic distortion-plus-noise as a function of frequency; VDD = 2.5 V
SA58670A_2
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SA58670A
NXP Semiconductors
2.1 W/channel stereo class-D audio amplifier
001aah490
1
THD+N
(%)
(1)
−1
10
(3)
(2)
−2
10
−3
10
2
3
4
5
10
10
10
10
10
f (Hz)
(1) Po = 825 mW; Vi = 908.3 mV (RMS).
(2) Po = 550 mW; Vi = 741.6 mV (RMS).
(3) Po = 275 mW; Vi = 524.4 mV (RMS).
a. RL = 4 Ω
001aah491
1
THD+N
(%)
(1)
−1
10
(2)
(3)
−2
10
−3
10
2
3
4
5
10
10
10
10
10
f (Hz)
(1) Po = 560 mW; Vi = 1.058 V (RMS).
(2) Po = 375 mW; Vi = 866 mV (RMS).
(3) Po = 190 mW; Vi = 616.4 mV (RMS).
b. RL = 8 Ω
Gv(cl) = 6 dB.
Fig 6. Total harmonic distortion-plus-noise as a function of frequency; VDD = 3.6 V
SA58670A_2
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SA58670A
NXP Semiconductors
2.1 W/channel stereo class-D audio amplifier
001aah492
1
THD+N
(%)
−1
10
(1)
−2
(2)
(3)
10
−3
10
2
3
4
5
10
10
10
10
10
f (Hz)
(1) Po = 1.65 W; Vi = 1.285 V (RMS).
(2) Po = 1.1 W; Vi = 1.05 V (RMS).
(3) Po = 550 mW; Vi = 741.6 mV (RMS).
a. RL = 4 Ω
001aah493
10
THD+N
(%)
(1)
1
−1
10
(2)
(3)
−2
10
−3
10
2
3
4
5
10
10
10
10
10
f (Hz)
(1) Po = 1.16 W; Vi = 1.523 V (RMS).
(2) Po = 775 mW; Vi = 1.245 V (RMS).
(3) Po = 380 mW; Vi = 871.8 mV (RMS).
b. RL = 8 Ω
Gv(cl) = 6 dB.
Fig 7. Total harmonic distortion-plus-noise as a function of frequency; VDD = 5.0 V
SA58670A_2
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SA58670A
NXP Semiconductors
2.1 W/channel stereo class-D audio amplifier
001aah495
−60
α
ct
(dB)
−80
(1)
(2)
−100
(3)
(4)
−120
3
4
5
10
10
10
f (Hz)
(1) VDD = 3.6 V; L channel to R channel.
(2) VDD = 3.6 V; R channel to L channel.
(3) VDD = 5.0 V; L channel to R channel.
(4) VDD = 5.0 V; R channel to L channel.
Fig 8. Crosstalk (stepped all-to-one) as a function of frequency
001aah497
−3
10
V
n(o)
(V)
−4
10
10
10
(1)
(2)
−5
−6
2
3
4
10
10
10
10
f (Hz)
(1) Left channel.
(2) Right channel.
Fig 9. Noise output voltage (RMS value) as a function of frequency
SA58670A_2
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SA58670A
NXP Semiconductors
2.1 W/channel stereo class-D audio amplifier
001aah505
−60
α
ct
(dB)
−80
(1)
(2)
(3)
−100
−120
2
4
6
8
10
12
14
16
18
20
f (kHz)
a. RL = 4 Ω
001aah506
−60
α
ct
(dB)
−80
(1)
(2)
−100
(3)
−120
2
4
6
8
10
12
14
16
18
20
f (kHz)
b. RL = 8 Ω
(1) VDD = 2.5 V.
(2) VDD = 3.6 V.
(3) VDD = 5.0 V.
Fig 10. Crosstalk (one-to-one) as a function of frequency
SA58670A_2
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SA58670A
NXP Semiconductors
2.1 W/channel stereo class-D audio amplifier
001aah507
5 V
001aah508
6
5.5
(1)
(2)
V
(V)
I
DD
(mA)
DD
(3)
4
2
0
4.5
3.6 V
2.5 V
3.5
2.5
0
1
2
3
2.5
3.5
4.5
5.5
V
V
(V)
V
(V)
DD
SDR; SDL
(1) left channel; RL = 8 Ω.
(2) right channel; RL = 4 Ω.
(3) right channel; RL = 8 Ω.
Fig 11. Supply voltage as a function of shutdown
voltage
Fig 12. Supply current as a function of supply voltage
001aah509
001aah510
1600
800
I
I
DD
DD
(mA)
(mA)
1200
600
800
400
0
400
200
0
(1)
(2)
(3)
(1)
(2)
(3)
0
0.4
0.8
1.2
1.6
2.0
0
0.4
0.8
1.2
1.6
P
(W)
P
(W)
o
o
a. RL = 4 Ω
b. RL = 8 Ω
(1) VDD = 2.5 V.
(2) VDD = 3.6 V.
(3) VDD = 5.0 V.
Fig 13. Supply current as a function of output power
SA58670A_2
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SA58670A
NXP Semiconductors
2.1 W/channel stereo class-D audio amplifier
001aah511
(1)
001aah512
(1)
0.8
0.4
P
(W)
P
(W)
0.6
0.4
0.3
(2)
0.2
0.1
0
(2)
(3)
0.2
(3)
0
0
0.4
0.8
1.2
1.6
2.0
0
0.4
0.8
1.2
1.6
P
(W)
P
(W)
o
o
a. RL = 4 Ω
b. RL = 8 Ω
(1) VDD = 5.0 V.
(2) VDD = 3.6 V.
(3) VDD = 2.5 V.
Fig 14. Power dissipation as a function of output power
001aah514
(1)
001aah513
100
100
η
η
po
po
80
80
60
40
20
0
(3)
(1)
(2)
(2)
(3)
60
40
20
0
0
0.4
0.8
1.2
1.6
2.0
0
0.4
0.8
1.2
1.6
P
(W)
P
(W)
o
o
a. RL = 4 Ω
b. RL = 8 Ω
(1) VDD = 5.0 V.
(2) VDD = 3.6 V.
(3) VDD = 2.5 V.
Fig 15. Output power efficiency as a function of output power
SA58670A_2
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SA58670A
NXP Semiconductors
2.1 W/channel stereo class-D audio amplifier
11. Application information
differential inputs
left channel
differential inputs
right channel
1 µF
1 µF
1 µF
1 µF
V
V
DD
DD
INLP INLN AGND
INRN INRP
G1
G0
FB
FB
FB
FB
OUTLP
OUTLN
OUTRP
1 nF
1 nF
1 nF
1 nF
SA58670A
OUTRN
V
V
DD
PVDD
PGND
PVDD
PGND
DD
10 µF
1 µF
10 µF
1 µF
SDL
SDR AVDD
V
DD
10 µF
1 µF
002aad665
Fig 16. SA58670A application schematic
11.1 Power supply decoupling considerations
The SA58670A is a stereo class-D audio amplifier that requires proper supply voltage
decoupling to ensure the rated performance for THD+N and power efficiency. To decouple
high frequency transients, supply voltage spikes and digital noise on the supply voltage
bus line, a low Equivalent Series Resistance (ESR) capacitor of typically 1 µF is placed as
close as possible to the PVDD pins of the SA58670A. It is important to place the
decoupling capacitor at the supply voltage pins of the SA58670A because any resistance
or inductance in the PCB trace between the SA58670A and the capacitor can cause a
loss in efficiency. Additional decoupling using a larger capacitor, 4.7 µF or greater, may be
done on the supply voltage connection on the PCB to filter low frequency signals. Usually
this is not required due to high PSRR of the SA58670A.
11.2 Input capacitor selection
The SA58670A does not require input coupling capacitors when used with a differential
audio source that is biased from 0.5 V to VDD − 0.8 V. In other words, the input signal must
be biased within the common-mode input voltage (Vi(cm)) range. If high-pass filtering is
required or if it is driven using a single-ended source, input coupling capacitors are
required.
The 3 dB cut-off frequency created by the input coupling capacitor and the input resistors
1
f –3dB
=
(1)
-----------------------------
2π × Ri × Ci
SA58670A_2
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SA58670A
NXP Semiconductors
2.1 W/channel stereo class-D audio amplifier
Table 6.
Gain selection
G1
G0
Gain (V/V)
Gain (dB)
Input impedance (kΩ)
LOW
LOW
HIGH
HIGH
LOW
HIGH
LOW
HIGH
2
6
28.1
17.3
9.8
4
12
18
24
8
16
5.2
Since the value of the input decoupling capacitor and the input resistance determined by
the gain setting affects the low frequency performance of the audio amplifier, it is
important to consider this during the system design. Small speakers in wireless and
cellular phones usually do not respond well to low frequency signals, so the 3 dB cut-off
frequency may be increased to block the low frequency signals to the speakers. Not using
input coupling capacitors may increase the output offset voltage.
1
Ci =
(2)
-------------------------------------
2π × Ri × f –3dB
11.3 PCB layout considerations
Component location is very important for performance of the SA58670A. Place all
external components very close to the SA58670A. Placing decoupling capacitors directly
at the power supply voltage pins increases efficiency because the resistance and
inductance in the trace between the SA58670A power supply voltage pins and the
decoupling capacitor causes a loss in power efficiency.
The trace width and routing are also very important for power output and noise
considerations.
For high current pins (PVDD, PGND and audio output), the trace widths should be
maximized to ensure proper performance and output power. Use at least 500 µm wide
traces.
For the input pins (INRP, INRN, INLP and INLN), the traces must be symmetrical and run
side-by-side to maximize common-mode cancellation.
11.4 Filter-free operation and ferrite bead filters
A ferrite bead low-pass filter can be used to reduce radio frequency emissions in
applications that have circuits sensitive to frequencies greater than 1 MHz. A ferrite bead
low-pass filter functions well for amplifiers that must pass FCC unintentional radiation
requirements for frequencies greater than 30 MHz. Choose a bead with high-impedance
at high frequencies and very low-impedance at low frequencies. In order to prevent
distortion of the output signal, select a ferrite bead with adequate current rating.
For applications in which there are circuits that are EMI sensitive to low frequencies
(< 1 MHz) and there are long leads from amplifier to speaker, it is necessary to use an LC
output filter.
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11.5 Efficiency and thermal considerations
The maximum ambient operating temperature depends on the heat transferring ability of
factor is given as 41.6 mW/K. The device thermal resistance, Rth(j-a) is the reciprocal of the
1
1
Rth( j-a)
=
=
= 24 K/W
(3)
-----------------------------------------
derating factor
---------------
0.0416
For a maximum allowable junction temperature Tj = 150 °C and Rth(j-a) = 24 K/W and a
maximum device dissipation of 1.5 W (750 mW per channel) and for 2.1 W per channel
output power, 4 Ω load, 5 V supply, the maximum ambient temperature is calculated using
Tamb(max) = T j(max) – (Rth( j-a) × Pmax) = 150 – (24 × 1.5) = 114 °C
(4)
The maximum ambient temperature is 114 °C at maximum power dissipation for 5 V
supply and 4 Ω load. If the junction temperature of the SA58670A rises above 150 °C, the
thermal protection circuitry turns the SA58670A off; this prevents damage to IC. Using
speakers greater than 4 Ω further enhances thermal performance and battery lifetime by
reducing the output load current and increasing amplifier efficiency.
11.6 Additional thermal information
The SA58670A HVQFN20 package incorporates an exposed DAP that is designed to
solder the mount directly to the PCB heat spreader. By the use of thermal vias, the DAP
may be soldered directly to a ground plane or special heat sinking layer designed into the
PCB. The thickness and area of the heat spreader may be maximized to optimize heat
transfer and achieve lowest package thermal resistance.
12. Test information
15 µH
INxP
INxN
OUTxP
DUT
AP585
AUDIO
ANALYZER
AUX0025
30 kHz
LOW-PASS FILTER
R
L
OUTxN
15 µH
−
+
AP585
MEASUREMENT
INPUTS
POWER
SUPPLY
002aad417
Fig 17. Test circuit
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13. Package outline
HVQFN20: plastic thermal enhanced very thin quad flat package; no leads;
20 terminals; body 4 x 4 x 0.85 mm
SOT917-1
B
A
E
D
terminal 1
index area
A
A
1
c
detail X
C
e
1
y
y
v
M
M
C
C
A
B
C
1
e
b
w
6
10
L
11
15
5
1
e
e
E
2
h
terminal 1
index area
20
16
D
h
X
0
2.5
scale
5 mm
DIMENSIONS (mm are the original dimensions)
(1)
A
max.
(1)
(1)
UNIT
A
b
c
E
h
e
e
1
e
2
y
D
D
E
L
v
w
y
1
h
1
0.05 0.30
0.00 0.18
4.1
3.9
2.45 4.1
2.15 3.9
2.45
2.15
0.6
0.4
mm
0.05
0.1
1
0.2
0.5
2
2
0.1
0.05
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
05-10-08
05-10-31
SOT917 -1
- - -
MO-220
- - -
Fig 18. Package outline SOT917-1 (HVQFN20)
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14. Soldering of SMD packages
This text provides a very brief insight into a complex technology. A more in-depth account
of soldering ICs can be found in Application Note AN10365 “Surface mount reflow
soldering description”.
14.1 Introduction to soldering
Soldering is one of the most common methods through which packages are attached to
Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both
the mechanical and the electrical connection. There is no single soldering method that is
ideal for all IC packages. Wave soldering is often preferred when through-hole and
Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not
suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high
densities that come with increased miniaturization.
14.2 Wave and reflow soldering
Wave soldering is a joining technology in which the joints are made by solder coming from
a standing wave of liquid solder. The wave soldering process is suitable for the following:
• Through-hole components
• Leaded or leadless SMDs, which are glued to the surface of the printed circuit board
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless
packages which have solder lands underneath the body, cannot be wave soldered. Also,
leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,
due to an increased probability of bridging.
The reflow soldering process involves applying solder paste to a board, followed by
component placement and exposure to a temperature profile. Leaded packages,
packages with solder balls, and leadless packages are all reflow solderable.
Key characteristics in both wave and reflow soldering are:
• Board specifications, including the board finish, solder masks and vias
• Package footprints, including solder thieves and orientation
• The moisture sensitivity level of the packages
• Package placement
• Inspection and repair
• Lead-free soldering versus SnPb soldering
14.3 Wave soldering
Key characteristics in wave soldering are:
• Process issues, such as application of adhesive and flux, clinching of leads, board
transport, the solder wave parameters, and the time during which components are
exposed to the wave
• Solder bath specifications, including temperature and impurities
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14.4 Reflow soldering
Key characteristics in reflow soldering are:
• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
higher minimum peak temperatures (see Figure 19) than a SnPb process, thus
reducing the process window
• Solder paste printing issues including smearing, release, and adjusting the process
window for a mix of large and small components on one board
• Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature) and cooling down. It is imperative that the peak
temperature is high enough for the solder to make reliable solder joints (a solder paste
characteristic). In addition, the peak temperature must be low enough that the
packages and/or boards are not damaged. The peak temperature of the package
depends on package thickness and volume and is classified in accordance with
Table 7 and 8
Table 7.
SnPb eutectic process (from J-STD-020C)
Package thickness (mm) Package reflow temperature (°C)
Volume (mm3)
< 350
≥ 350
220
< 2.5
235
220
≥ 2.5
220
Table 8.
Lead-free process (from J-STD-020C)
Package thickness (mm) Package reflow temperature (°C)
Volume (mm3)
< 350
260
350 to 2000
> 2000
260
< 1.6
260
250
245
1.6 to 2.5
> 2.5
260
245
250
245
Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 19.
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maximum peak temperature
= MSL limit, damage level
temperature
minimum peak temperature
= minimum soldering temperature
peak
temperature
time
001aac844
MSL: Moisture Sensitivity Level
Fig 19. Temperature profiles for large and small components
For further information on temperature profiles, refer to Application Note AN10365
“Surface mount reflow soldering description”.
15. Abbreviations
Table 9.
Abbreviations
Description
Acronym
DAP
DVD
EMI
Die Attach Paddle
Digital Video Disc
ElectroMagnetic Interference
Equivalent Series Resistance
inductor-capacitor filter
Personal Computer
ESR
LC
PC
PCB
PDA
PWM
USB
Printed-Circuit Board
Personal Digital Assistant
Pulse Width Modulator
Universal Serial Bus
16. Revision history
Table 10. Revision history
Document ID
SA58670A_2
Modifications:
Release date
Data sheet status
Change notice
Supersedes
20081023
Product data sheet
-
SA58670A_1
added IDD(sd) specification
20080220 Product data sheet
–
SA58670A_1
-
-
SA58670A_2
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17. Legal information
17.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
malfunction of an NXP Semiconductors product can reasonably be expected
17.2 Definitions
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
17.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
17.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
18. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
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19. Contents
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2008.
All rights reserved.
For sales office addresses, please send an email to: [email protected]
Date of release: 23 October 2008
Document identifier: SA58670A_2
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